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Fri, 21 Aug 2020 07:39:35 +0200 Authentication-Results: garm.ovh; auth=pass (GARM-98R002a5916cc3-b1bd-4a26-9c6d-0feec1d6325c, 75F2C724DC147A8CFF44EDCF727470C0E1FB3540) smtp.auth=clg@kaod.org Subject: Re: [PATCH v2] spapr/xive: Use the xics flag to check for XIVE-only IRQ backends To: David Gibson References: <20200820140106.2357228-1-clg@kaod.org> <20200820232237.GU271315@yekko.fritz.box> From: =?UTF-8?Q?C=c3=a9dric_Le_Goater?= Message-ID: <83b3dff5-0b6c-699d-cc29-577ee009d038@kaod.org> Date: Fri, 21 Aug 2020 07:39:34 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.10.0 MIME-Version: 1.0 In-Reply-To: <20200820232237.GU271315@yekko.fritz.box> Content-Type: text/plain; charset="windows-1252" Content-Language: en-US Content-Transfer-Encoding: 8bit X-Originating-IP: [37.59.142.98] X-ClientProxiedBy: DAG9EX1.mxp5.local (172.16.2.81) To DAG4EX1.mxp5.local (172.16.2.31) X-Ovh-Tracer-GUID: 3253c77f-2254-4ca7-babd-dbfa02066781 X-Ovh-Tracer-Id: 6780169243066207200 X-VR-SPAMSTATE: OK X-VR-SPAMSCORE: -100 X-VR-SPAMCAUSE: gggruggvucftvghtrhhoucdtuddrgeduiedrudduuddgleefucetufdoteggodetrfdotffvucfrrhhofhhilhgvmecuqfggjfdpvefjgfevmfevgfenuceurghilhhouhhtmecuhedttdenucesvcftvggtihhpihgvnhhtshculddquddttddmnecujfgurhepuffvfhfhkffffgggjggtgfhisehtkeertddtfeehnecuhfhrohhmpeevrogurhhitggpnfgvpgfiohgrthgvrhcuoegtlhhgsehkrghougdrohhrgheqnecuggftrfgrthhtvghrnhepgeelgfejveehieefffduueehvdevfedtleeiudekjeegveeigfeifefhtdfffedtnecukfhppedtrddtrddtrddtpdefjedrheelrddugedvrdelkeenucevlhhushhtvghrufhiiigvpedtnecurfgrrhgrmhepmhhouggvpehsmhhtphdqohhuthdphhgvlhhopehmgihplhgrnhehrdhmrghilhdrohhvhhdrnhgvthdpihhnvghtpedtrddtrddtrddtpdhmrghilhhfrhhomheptghlgheskhgrohgurdhorhhgpdhrtghpthhtohepuggrvhhiugesghhisghsohhnrdgurhhophgsvggrrhdrihgurdgruh Received-SPF: pass client-ip=178.32.125.2; envelope-from=clg@kaod.org; helo=smtpout1.mo529.mail-out.ovh.net X-detected-operating-system: by eggs.gnu.org: First seen = 2020/08/21 01:39:37 X-ACL-Warn: Detected OS = Linux 3.11 and newer X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-ppc@nongnu.org, qemu-devel@nongnu.org, Gustavo Romero Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 8/21/20 1:22 AM, David Gibson wrote: > On Thu, Aug 20, 2020 at 04:01:06PM +0200, Cédric Le Goater wrote: >> The sPAPR machine has four different IRQ backends, each implementing >> the XICS or XIVE interrupt mode or both in the case of the 'dual' >> backend. >> >> If a machine is started in P8 compat mode, QEMU should necessarily >> support the XICS interrupt mode and in that case, the XIVE-only IRQ >> backend is invalid. Currently, spapr_irq_check() tests the pointer >> value to the IRQ backend to check for this condition, instead use the >> 'xics' flag. It's equivalent and it will ease the introduction of new >> XIVE-only IRQ backends if needed. >> >> Signed-off-by: Cédric Le Goater > > Thanks, applied to ppc-for-5.2. > > I still kind of want to remove the last vestiges of those > "backends", but I'm unlikely to have time to do so soon. What did you have in mind ? Move the 'xics' and 'xive' flags directly under the spapr machine ? It would add state. C. > >> --- >> hw/ppc/spapr_irq.c | 2 +- >> 1 file changed, 1 insertion(+), 1 deletion(-) >> >> diff --git a/hw/ppc/spapr_irq.c b/hw/ppc/spapr_irq.c >> index 80cf1c3d6bb2..d036c8fef519 100644 >> --- a/hw/ppc/spapr_irq.c >> +++ b/hw/ppc/spapr_irq.c >> @@ -172,7 +172,7 @@ static int spapr_irq_check(SpaprMachineState *spapr, Error **errp) >> * To cover both and not confuse the OS, add an early failure in >> * QEMU. >> */ >> - if (spapr->irq == &spapr_irq_xive) { >> + if (!spapr->irq->xics) { >> error_setg(errp, "XIVE-only machines require a POWER9 CPU"); >> return -1; >> } >