From: Richard Henderson <richard.henderson@linaro.org>
To: Michael Rolnik <mrolnik@gmail.com>
Cc: Sarah Harris <S.E.Harris@kent.ac.uk>,
QEMU Developers <qemu-devel@nongnu.org>,
Richard Henderson <rth@twiddle.net>
Subject: Re: [Qemu-devel] [PATCH v21 4/7] target/avr: Add instruction translation
Date: Tue, 11 Jun 2019 13:47:10 -0700 [thread overview]
Message-ID: <8429d379-c7e5-72b2-31cf-c4fa80f70695@linaro.org> (raw)
In-Reply-To: <CAK4993gLwXopG=EFNePsHJYmTZ5uU7EgbGe3Ad4ofOdCxQX-Mg@mail.gmail.com>
On 6/11/19 1:21 PM, Michael Rolnik wrote:
> I merged all you fixes and I get an assert(use_icount) in cpu_loop_exec_tb
> function, it happens on an instruction following SBRC.
> what might cause it?
No idea. What is your test case? And your tree, just in case there was an
error in the merging.
Looking through output from
qemu-avr-tests/instruction-tests/bin/SBR.elf
14a: 00 fc sbrc r0, 0
14c: 0f ef ldi r16, 0xFF ; 255
it works for me:
---- 000000a5
movi_i32 tmp2,$0x1
and_i32 tmp1,r0,tmp2
---- 000000a6
movi_i32 tmp2,$0x0
brcond_i32 tmp1,tmp2,eq,$L1
movi_i32 r16,$0xff
set_label $L1
r~
next prev parent reply other threads:[~2019-06-11 20:50 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-06-06 19:30 [Qemu-devel] [PATCH v21 0/7] QEMU AVR 8 bit cores Michael Rolnik
2019-06-06 19:30 ` [Qemu-devel] [PATCH v21 1/7] target/avr: Add outward facing interfaces and core CPU logic Michael Rolnik
2019-06-06 19:30 ` [Qemu-devel] [PATCH v21 2/7] target/avr: Add instruction helpers Michael Rolnik
2019-06-06 19:30 ` [Qemu-devel] [PATCH v21 3/7] target/avr: Add instruction decoding Michael Rolnik
2019-06-10 15:05 ` Richard Henderson
2019-06-06 19:30 ` [Qemu-devel] [PATCH v21 4/7] target/avr: Add instruction translation Michael Rolnik
2019-06-10 15:09 ` Richard Henderson
2019-06-10 20:09 ` Richard Henderson
2019-06-10 20:35 ` Richard Henderson
2019-06-10 20:50 ` Richard Henderson
2019-06-10 21:20 ` Richard Henderson
2019-06-11 20:21 ` Michael Rolnik
2019-06-11 20:47 ` Richard Henderson [this message]
2019-06-11 21:02 ` Michael Rolnik
2019-06-12 16:36 ` Richard Henderson
2019-06-06 19:30 ` [Qemu-devel] [PATCH v21 5/7] target/avr: Add limited support for USART and 16 bit timer peripherals Michael Rolnik
2019-06-06 19:30 ` [Qemu-devel] [PATCH v21 6/7] target/avr: Add example board configuration Michael Rolnik
2019-06-06 19:30 ` [Qemu-devel] [PATCH v21 7/7] target/avr: Register AVR support with the rest of QEMU, the build system, and the MAINTAINERS file Michael Rolnik
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