* [Qemu-devel] [PATCH 0/4] Misc MIPS fulong2e improvements @ 2019-02-11 4:01 BALATON Zoltan 2019-02-11 4:01 ` [Qemu-devel] [PATCH 4/4] mips_fulong2e: Add on-board graphics chip BALATON Zoltan ` (3 more replies) 0 siblings, 4 replies; 12+ messages in thread From: BALATON Zoltan @ 2019-02-11 4:01 UTC (permalink / raw) To: qemu-devel; +Cc: Aurelien Jarno, Aleksandar Markovic, Huacai Chen Hello, These are some misc patches to get the fulong2e emulation in a better shape. With my recent via-ide changes and the separately submitted hw/display: Add basic ATI VGA emulation patch and after this series the pmon_2e.bin firmware from https://mirrors.cloud.tencent.com/loongson/pmon/ can actually run and appears to work. I could not find an image to boot so I could not test that further but this appears to be an improvement that worth submitting now. Regards, BALATON Zoltan BALATON Zoltan (4): hw/pci-host/bonito.c: Add PCI mem region mapped at the correct address mips_fulong2e: Fix bios flash size mips_fulong2e: Dynamically generate SPD EEPROM data mips_fulong2e: Add on-board graphics chip hw/mips/mips_fulong2e.c | 46 +++++++++++++++++++++++----------------------- hw/pci-host/bonito.c | 5 ++++- 2 files changed, 27 insertions(+), 24 deletions(-) -- 2.13.7 ^ permalink raw reply [flat|nested] 12+ messages in thread
* [Qemu-devel] [PATCH 4/4] mips_fulong2e: Add on-board graphics chip 2019-02-11 4:01 [Qemu-devel] [PATCH 0/4] Misc MIPS fulong2e improvements BALATON Zoltan @ 2019-02-11 4:01 ` BALATON Zoltan 2019-02-11 23:54 ` Philippe Mathieu-Daudé 2019-02-11 4:01 ` [Qemu-devel] [PATCH 2/4] mips_fulong2e: Fix bios flash size BALATON Zoltan ` (2 subsequent siblings) 3 siblings, 1 reply; 12+ messages in thread From: BALATON Zoltan @ 2019-02-11 4:01 UTC (permalink / raw) To: qemu-devel; +Cc: Aurelien Jarno, Aleksandar Markovic, Huacai Chen Add (partial) emulation of the on-board GPU of the machine. This allows the PMON2000 firmware to run and should also work with Linux console but probably not with X yet. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> --- Depends on hw/display: Add basic ATI VGA emulation hw/mips/mips_fulong2e.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/hw/mips/mips_fulong2e.c b/hw/mips/mips_fulong2e.c index eec6fd02c8..68bd030fc1 100644 --- a/hw/mips/mips_fulong2e.c +++ b/hw/mips/mips_fulong2e.c @@ -287,6 +287,7 @@ static void mips_fulong2e_init(MachineState *machine) I2CBus *smbus; MIPSCPU *cpu; CPUMIPSState *env; + DeviceState *dev; /* init CPUs */ cpu = MIPS_CPU(cpu_create(machine->cpu_type)); @@ -347,6 +348,11 @@ static void mips_fulong2e_init(MachineState *machine) vt82c686b_southbridge_init(pci_bus, FULONG2E_VIA_SLOT, env->irq[5], &smbus, &isa_bus); + /* GPU */ + dev = DEVICE(pci_create(pci_bus, -1, "ati-vga")); + qdev_prop_set_uint16(dev, "device_id", 0x5159); + qdev_init_nofail(dev); + /* Populate SPD eeprom data */ spd_data = spd_data_generate(DDR, ram_size, &err); if (err) { -- 2.13.7 ^ permalink raw reply related [flat|nested] 12+ messages in thread
* Re: [Qemu-devel] [PATCH 4/4] mips_fulong2e: Add on-board graphics chip 2019-02-11 4:01 ` [Qemu-devel] [PATCH 4/4] mips_fulong2e: Add on-board graphics chip BALATON Zoltan @ 2019-02-11 23:54 ` Philippe Mathieu-Daudé 2019-02-13 0:01 ` BALATON Zoltan 0 siblings, 1 reply; 12+ messages in thread From: Philippe Mathieu-Daudé @ 2019-02-11 23:54 UTC (permalink / raw) To: BALATON Zoltan, qemu-devel, Gerd Hoffmann Cc: Huacai Chen, Aleksandar Markovic, Aurelien Jarno On 2/11/19 5:01 AM, BALATON Zoltan wrote: > Add (partial) emulation of the on-board GPU of the machine. This > allows the PMON2000 firmware to run and should also work with Linux > console but probably not with X yet. > > Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> > --- > Depends on hw/display: Add basic ATI VGA emulation > > hw/mips/mips_fulong2e.c | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/hw/mips/mips_fulong2e.c b/hw/mips/mips_fulong2e.c > index eec6fd02c8..68bd030fc1 100644 > --- a/hw/mips/mips_fulong2e.c > +++ b/hw/mips/mips_fulong2e.c > @@ -287,6 +287,7 @@ static void mips_fulong2e_init(MachineState *machine) > I2CBus *smbus; > MIPSCPU *cpu; > CPUMIPSState *env; > + DeviceState *dev; > > /* init CPUs */ > cpu = MIPS_CPU(cpu_create(machine->cpu_type)); > @@ -347,6 +348,11 @@ static void mips_fulong2e_init(MachineState *machine) > vt82c686b_southbridge_init(pci_bus, FULONG2E_VIA_SLOT, env->irq[5], > &smbus, &isa_bus); > > + /* GPU */ > + dev = DEVICE(pci_create(pci_bus, -1, "ati-vga")); You missed in your cover: Based-on: 20190211040434.1C98674569F@zero.eik.bme.hu Else testing we get: qemu-system-mips64el: Unknown device 'ati-vga' for bus 'PCI' Aborted (core dumped) > + qdev_prop_set_uint16(dev, "device_id", 0x5159); > + qdev_init_nofail(dev); > + > /* Populate SPD eeprom data */ > spd_data = spd_data_generate(DDR, ram_size, &err); > if (err) { > Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [Qemu-devel] [PATCH 4/4] mips_fulong2e: Add on-board graphics chip 2019-02-11 23:54 ` Philippe Mathieu-Daudé @ 2019-02-13 0:01 ` BALATON Zoltan 0 siblings, 0 replies; 12+ messages in thread From: BALATON Zoltan @ 2019-02-13 0:01 UTC (permalink / raw) To: Philippe Mathieu-Daudé Cc: qemu-devel, Gerd Hoffmann, Huacai Chen, Aleksandar Markovic, Aurelien Jarno On Tue, 12 Feb 2019, Philippe Mathieu-Daudé wrote: > On 2/11/19 5:01 AM, BALATON Zoltan wrote: >> Add (partial) emulation of the on-board GPU of the machine. This >> allows the PMON2000 firmware to run and should also work with Linux >> console but probably not with X yet. >> >> Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> >> --- >> Depends on hw/display: Add basic ATI VGA emulation >> >> hw/mips/mips_fulong2e.c | 6 ++++++ >> 1 file changed, 6 insertions(+) >> >> diff --git a/hw/mips/mips_fulong2e.c b/hw/mips/mips_fulong2e.c >> index eec6fd02c8..68bd030fc1 100644 >> --- a/hw/mips/mips_fulong2e.c >> +++ b/hw/mips/mips_fulong2e.c >> @@ -287,6 +287,7 @@ static void mips_fulong2e_init(MachineState *machine) >> I2CBus *smbus; >> MIPSCPU *cpu; >> CPUMIPSState *env; >> + DeviceState *dev; >> >> /* init CPUs */ >> cpu = MIPS_CPU(cpu_create(machine->cpu_type)); >> @@ -347,6 +348,11 @@ static void mips_fulong2e_init(MachineState *machine) >> vt82c686b_southbridge_init(pci_bus, FULONG2E_VIA_SLOT, env->irq[5], >> &smbus, &isa_bus); >> >> + /* GPU */ >> + dev = DEVICE(pci_create(pci_bus, -1, "ati-vga")); > > You missed in your cover: > Based-on: 20190211040434.1C98674569F@zero.eik.bme.hu I forgot what this was called, thanks for reminding. But patchew seems to be down anyway. Regards, BALATON Zoltan > > Else testing we get: > qemu-system-mips64el: Unknown device 'ati-vga' for bus 'PCI' > Aborted (core dumped) > >> + qdev_prop_set_uint16(dev, "device_id", 0x5159); >> + qdev_init_nofail(dev); >> + >> /* Populate SPD eeprom data */ >> spd_data = spd_data_generate(DDR, ram_size, &err); >> if (err) { >> > > Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> > Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> > > ^ permalink raw reply [flat|nested] 12+ messages in thread
* [Qemu-devel] [PATCH 2/4] mips_fulong2e: Fix bios flash size 2019-02-11 4:01 [Qemu-devel] [PATCH 0/4] Misc MIPS fulong2e improvements BALATON Zoltan 2019-02-11 4:01 ` [Qemu-devel] [PATCH 4/4] mips_fulong2e: Add on-board graphics chip BALATON Zoltan @ 2019-02-11 4:01 ` BALATON Zoltan 2019-02-11 23:59 ` Philippe Mathieu-Daudé 2019-02-11 4:01 ` [Qemu-devel] [PATCH 3/4] mips_fulong2e: Dynamically generate SPD EEPROM data BALATON Zoltan 2019-02-11 4:01 ` [Qemu-devel] [PATCH 1/4] hw/pci-host/bonito.c: Add PCI mem region mapped at the correct address BALATON Zoltan 3 siblings, 1 reply; 12+ messages in thread From: BALATON Zoltan @ 2019-02-11 4:01 UTC (permalink / raw) To: qemu-devel; +Cc: Aurelien Jarno, Aleksandar Markovic, Huacai Chen According to both the specifications on linux-mips.org referenced in a comment at the beginning of the file and the flash chip part number the bios size should be 512k not 1M. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> --- hw/mips/mips_fulong2e.c | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/hw/mips/mips_fulong2e.c b/hw/mips/mips_fulong2e.c index 02549d5c7e..10e6ed585a 100644 --- a/hw/mips/mips_fulong2e.c +++ b/hw/mips/mips_fulong2e.c @@ -21,6 +21,7 @@ #include "qemu/osdep.h" #include "qemu/units.h" #include "qapi/error.h" +#include "cpu.h" #include "hw/hw.h" #include "hw/i386/pc.h" #include "hw/dma/i8257.h" @@ -35,7 +36,6 @@ #include "audio/audio.h" #include "qemu/log.h" #include "hw/loader.h" -#include "hw/mips/bios.h" #include "hw/ide.h" #include "elf.h" #include "hw/isa/vt82c686.h" @@ -51,6 +51,8 @@ #define ENVP_NB_ENTRIES 16 #define ENVP_ENTRY_SIZE 256 +/* fulong 2e has a 512k flash: Winbond W39L040AP70Z */ +#define BIOS_SIZE (512 * KiB) #define MAX_IDE_BUS 2 /* @@ -307,12 +309,9 @@ static void mips_fulong2e_init(MachineState *machine) /* fulong 2e has 256M ram. */ ram_size = 256 * MiB; - /* fulong 2e has a 1M flash.Winbond W39L040AP70Z */ - bios_size = 1 * MiB; - /* allocate RAM */ memory_region_allocate_system_memory(ram, NULL, "fulong2e.ram", ram_size); - memory_region_init_ram(bios, NULL, "fulong2e.bios", bios_size, + memory_region_init_ram(bios, NULL, "fulong2e.bios", BIOS_SIZE, &error_fatal); memory_region_set_readonly(bios, true); -- 2.13.7 ^ permalink raw reply related [flat|nested] 12+ messages in thread
* Re: [Qemu-devel] [PATCH 2/4] mips_fulong2e: Fix bios flash size 2019-02-11 4:01 ` [Qemu-devel] [PATCH 2/4] mips_fulong2e: Fix bios flash size BALATON Zoltan @ 2019-02-11 23:59 ` Philippe Mathieu-Daudé 0 siblings, 0 replies; 12+ messages in thread From: Philippe Mathieu-Daudé @ 2019-02-11 23:59 UTC (permalink / raw) To: BALATON Zoltan, qemu-devel Cc: Huacai Chen, Aleksandar Markovic, Aurelien Jarno On 2/11/19 5:01 AM, BALATON Zoltan wrote: > According to both the specifications on linux-mips.org referenced in a This link: https://www.linux-mips.org/wiki/Fulong#Front: > comment at the beginning of the file and the flash chip part number > the bios size should be 512k not 1M. > > Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> > --- > hw/mips/mips_fulong2e.c | 9 ++++----- > 1 file changed, 4 insertions(+), 5 deletions(-) > > diff --git a/hw/mips/mips_fulong2e.c b/hw/mips/mips_fulong2e.c > index 02549d5c7e..10e6ed585a 100644 > --- a/hw/mips/mips_fulong2e.c > +++ b/hw/mips/mips_fulong2e.c > @@ -21,6 +21,7 @@ > #include "qemu/osdep.h" > #include "qemu/units.h" > #include "qapi/error.h" > +#include "cpu.h" > #include "hw/hw.h" > #include "hw/i386/pc.h" > #include "hw/dma/i8257.h" > @@ -35,7 +36,6 @@ > #include "audio/audio.h" > #include "qemu/log.h" > #include "hw/loader.h" > -#include "hw/mips/bios.h" > #include "hw/ide.h" > #include "elf.h" > #include "hw/isa/vt82c686.h" > @@ -51,6 +51,8 @@ > #define ENVP_NB_ENTRIES 16 > #define ENVP_ENTRY_SIZE 256 > > +/* fulong 2e has a 512k flash: Winbond W39L040AP70Z */ > +#define BIOS_SIZE (512 * KiB) > #define MAX_IDE_BUS 2 > > /* > @@ -307,12 +309,9 @@ static void mips_fulong2e_init(MachineState *machine) > /* fulong 2e has 256M ram. */ > ram_size = 256 * MiB; > > - /* fulong 2e has a 1M flash.Winbond W39L040AP70Z */ > - bios_size = 1 * MiB; > - > /* allocate RAM */ > memory_region_allocate_system_memory(ram, NULL, "fulong2e.ram", ram_size); > - memory_region_init_ram(bios, NULL, "fulong2e.bios", bios_size, > + memory_region_init_ram(bios, NULL, "fulong2e.bios", BIOS_SIZE, > &error_fatal); > memory_region_set_readonly(bios, true); > > ^ permalink raw reply [flat|nested] 12+ messages in thread
* [Qemu-devel] [PATCH 3/4] mips_fulong2e: Dynamically generate SPD EEPROM data 2019-02-11 4:01 [Qemu-devel] [PATCH 0/4] Misc MIPS fulong2e improvements BALATON Zoltan 2019-02-11 4:01 ` [Qemu-devel] [PATCH 4/4] mips_fulong2e: Add on-board graphics chip BALATON Zoltan 2019-02-11 4:01 ` [Qemu-devel] [PATCH 2/4] mips_fulong2e: Fix bios flash size BALATON Zoltan @ 2019-02-11 4:01 ` BALATON Zoltan 2019-02-12 0:00 ` Philippe Mathieu-Daudé 2019-02-14 17:15 ` Aleksandar Markovic 2019-02-11 4:01 ` [Qemu-devel] [PATCH 1/4] hw/pci-host/bonito.c: Add PCI mem region mapped at the correct address BALATON Zoltan 3 siblings, 2 replies; 12+ messages in thread From: BALATON Zoltan @ 2019-02-11 4:01 UTC (permalink / raw) To: qemu-devel; +Cc: Aurelien Jarno, Aleksandar Markovic, Huacai Chen The machine comes with 256M memory module by default but it's upgradable so it could have different memory size. There was a TODO comment to replace static SPD EEPROM data with dynamically generated one to support this. Now that we have a function for that, it's easy to do. Although this would allow larger RAM sizes, the peculiar memory map of the machine may need some special handling to map it as low and high memory. Because I don't know what the correct place would be for highmem, I've left memory size fixed at 256M for now and TODO is moved there instead. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> --- hw/mips/mips_fulong2e.c | 31 +++++++++++++------------------ 1 file changed, 13 insertions(+), 18 deletions(-) diff --git a/hw/mips/mips_fulong2e.c b/hw/mips/mips_fulong2e.c index 10e6ed585a..eec6fd02c8 100644 --- a/hw/mips/mips_fulong2e.c +++ b/hw/mips/mips_fulong2e.c @@ -214,20 +214,6 @@ static void main_cpu_reset(void *opaque) } } -static const uint8_t eeprom_spd[0x80] = { - 0x80,0x08,0x07,0x0d,0x09,0x02,0x40,0x00,0x04,0x70, - 0x70,0x00,0x82,0x10,0x00,0x01,0x0e,0x04,0x0c,0x01, - 0x02,0x20,0x80,0x75,0x70,0x00,0x00,0x50,0x3c,0x50, - 0x2d,0x20,0xb0,0xb0,0x50,0x50,0x00,0x00,0x00,0x00, - 0x00,0x41,0x48,0x3c,0x32,0x75,0x00,0x00,0x00,0x00, - 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, - 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, - 0x00,0x00,0x00,0x9c,0x7b,0x07,0x00,0x00,0x00,0x00, - 0x00,0x00,0x00,0x00,0x48,0x42,0x35,0x34,0x41,0x32, - 0x35,0x36,0x38,0x4b,0x4e,0x2d,0x41,0x37,0x35,0x42, - 0x20,0x30,0x20 -}; - static void vt82c686b_southbridge_init(PCIBus *pci_bus, int slot, qemu_irq intc, I2CBus **i2c_bus, ISABus **p_isa_bus) { @@ -284,7 +270,6 @@ static void network_init (PCIBus *pci_bus) static void mips_fulong2e_init(MachineState *machine) { - ram_addr_t ram_size = machine->ram_size; const char *kernel_filename = machine->kernel_filename; const char *kernel_cmdline = machine->kernel_cmdline; const char *initrd_filename = machine->initrd_filename; @@ -292,7 +277,10 @@ static void mips_fulong2e_init(MachineState *machine) MemoryRegion *address_space_mem = get_system_memory(); MemoryRegion *ram = g_new(MemoryRegion, 1); MemoryRegion *bios = g_new(MemoryRegion, 1); + ram_addr_t ram_size = machine->ram_size; long bios_size; + uint8_t *spd_data; + Error *err = NULL; int64_t kernel_entry; PCIBus *pci_bus; ISABus *isa_bus; @@ -306,7 +294,7 @@ static void mips_fulong2e_init(MachineState *machine) qemu_register_reset(main_cpu_reset, cpu); - /* fulong 2e has 256M ram. */ + /* TODO: support more than 256M RAM as highmem */ ram_size = 256 * MiB; /* allocate RAM */ @@ -359,8 +347,14 @@ static void mips_fulong2e_init(MachineState *machine) vt82c686b_southbridge_init(pci_bus, FULONG2E_VIA_SLOT, env->irq[5], &smbus, &isa_bus); - /* TODO: Populate SPD eeprom data. */ - smbus_eeprom_init(smbus, 1, eeprom_spd, sizeof(eeprom_spd)); + /* Populate SPD eeprom data */ + spd_data = spd_data_generate(DDR, ram_size, &err); + if (err) { + warn_report_err(err); + } + if (spd_data) { + smbus_eeprom_init_one(smbus, 0x50, spd_data); + } mc146818_rtc_init(isa_bus, 2000, NULL); @@ -374,6 +368,7 @@ static void mips_fulong2e_machine_init(MachineClass *mc) mc->init = mips_fulong2e_init; mc->block_default_type = IF_IDE; mc->default_cpu_type = MIPS_CPU_TYPE_NAME("Loongson-2E"); + mc->default_ram_size = 256 * MiB; } DEFINE_MACHINE("fulong2e", mips_fulong2e_machine_init) -- 2.13.7 ^ permalink raw reply related [flat|nested] 12+ messages in thread
* Re: [Qemu-devel] [PATCH 3/4] mips_fulong2e: Dynamically generate SPD EEPROM data 2019-02-11 4:01 ` [Qemu-devel] [PATCH 3/4] mips_fulong2e: Dynamically generate SPD EEPROM data BALATON Zoltan @ 2019-02-12 0:00 ` Philippe Mathieu-Daudé 2019-02-14 17:15 ` Aleksandar Markovic 1 sibling, 0 replies; 12+ messages in thread From: Philippe Mathieu-Daudé @ 2019-02-12 0:00 UTC (permalink / raw) To: BALATON Zoltan, qemu-devel Cc: Huacai Chen, Aleksandar Markovic, Aurelien Jarno On 2/11/19 5:01 AM, BALATON Zoltan wrote: > The machine comes with 256M memory module by default but it's > upgradable so it could have different memory size. There was a TODO > comment to replace static SPD EEPROM data with dynamically generated > one to support this. Now that we have a function for that, it's easy > to do. Although this would allow larger RAM sizes, the peculiar memory > map of the machine may need some special handling to map it as low and > high memory. Because I don't know what the correct place would be for > highmem, I've left memory size fixed at 256M for now and TODO is moved > there instead. > > Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> > --- > hw/mips/mips_fulong2e.c | 31 +++++++++++++------------------ > 1 file changed, 13 insertions(+), 18 deletions(-) > > diff --git a/hw/mips/mips_fulong2e.c b/hw/mips/mips_fulong2e.c > index 10e6ed585a..eec6fd02c8 100644 > --- a/hw/mips/mips_fulong2e.c > +++ b/hw/mips/mips_fulong2e.c > @@ -214,20 +214,6 @@ static void main_cpu_reset(void *opaque) > } > } > > -static const uint8_t eeprom_spd[0x80] = { > - 0x80,0x08,0x07,0x0d,0x09,0x02,0x40,0x00,0x04,0x70, > - 0x70,0x00,0x82,0x10,0x00,0x01,0x0e,0x04,0x0c,0x01, > - 0x02,0x20,0x80,0x75,0x70,0x00,0x00,0x50,0x3c,0x50, > - 0x2d,0x20,0xb0,0xb0,0x50,0x50,0x00,0x00,0x00,0x00, > - 0x00,0x41,0x48,0x3c,0x32,0x75,0x00,0x00,0x00,0x00, > - 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, > - 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, > - 0x00,0x00,0x00,0x9c,0x7b,0x07,0x00,0x00,0x00,0x00, > - 0x00,0x00,0x00,0x00,0x48,0x42,0x35,0x34,0x41,0x32, > - 0x35,0x36,0x38,0x4b,0x4e,0x2d,0x41,0x37,0x35,0x42, > - 0x20,0x30,0x20 > -}; > - > static void vt82c686b_southbridge_init(PCIBus *pci_bus, int slot, qemu_irq intc, > I2CBus **i2c_bus, ISABus **p_isa_bus) > { > @@ -284,7 +270,6 @@ static void network_init (PCIBus *pci_bus) > > static void mips_fulong2e_init(MachineState *machine) > { > - ram_addr_t ram_size = machine->ram_size; > const char *kernel_filename = machine->kernel_filename; > const char *kernel_cmdline = machine->kernel_cmdline; > const char *initrd_filename = machine->initrd_filename; > @@ -292,7 +277,10 @@ static void mips_fulong2e_init(MachineState *machine) > MemoryRegion *address_space_mem = get_system_memory(); > MemoryRegion *ram = g_new(MemoryRegion, 1); > MemoryRegion *bios = g_new(MemoryRegion, 1); > + ram_addr_t ram_size = machine->ram_size; > long bios_size; > + uint8_t *spd_data; > + Error *err = NULL; > int64_t kernel_entry; > PCIBus *pci_bus; > ISABus *isa_bus; > @@ -306,7 +294,7 @@ static void mips_fulong2e_init(MachineState *machine) > > qemu_register_reset(main_cpu_reset, cpu); > > - /* fulong 2e has 256M ram. */ > + /* TODO: support more than 256M RAM as highmem */ > ram_size = 256 * MiB; > > /* allocate RAM */ > @@ -359,8 +347,14 @@ static void mips_fulong2e_init(MachineState *machine) > vt82c686b_southbridge_init(pci_bus, FULONG2E_VIA_SLOT, env->irq[5], > &smbus, &isa_bus); > > - /* TODO: Populate SPD eeprom data. */ > - smbus_eeprom_init(smbus, 1, eeprom_spd, sizeof(eeprom_spd)); > + /* Populate SPD eeprom data */ > + spd_data = spd_data_generate(DDR, ram_size, &err); > + if (err) { > + warn_report_err(err); > + } > + if (spd_data) { > + smbus_eeprom_init_one(smbus, 0x50, spd_data); > + } > > mc146818_rtc_init(isa_bus, 2000, NULL); > > @@ -374,6 +368,7 @@ static void mips_fulong2e_machine_init(MachineClass *mc) > mc->init = mips_fulong2e_init; > mc->block_default_type = IF_IDE; > mc->default_cpu_type = MIPS_CPU_TYPE_NAME("Loongson-2E"); > + mc->default_ram_size = 256 * MiB; > } > > DEFINE_MACHINE("fulong2e", mips_fulong2e_machine_init) > ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [Qemu-devel] [PATCH 3/4] mips_fulong2e: Dynamically generate SPD EEPROM data 2019-02-11 4:01 ` [Qemu-devel] [PATCH 3/4] mips_fulong2e: Dynamically generate SPD EEPROM data BALATON Zoltan 2019-02-12 0:00 ` Philippe Mathieu-Daudé @ 2019-02-14 17:15 ` Aleksandar Markovic 2019-02-14 17:45 ` BALATON Zoltan 1 sibling, 1 reply; 12+ messages in thread From: Aleksandar Markovic @ 2019-02-14 17:15 UTC (permalink / raw) To: BALATON Zoltan, qemu-devel@nongnu.org; +Cc: Aurelien Jarno, Huacai Chen > From: BALATON Zoltan <balaton@eik.bme.hu> > Sent: Monday, February 11, 2019 5:01 AM > To: qemu-devel@nongnu.org > Cc: Aurelien Jarno; Aleksandar Markovic; Huacai Chen > Subject: [PATCH 3/4] mips_fulong2e: Dynamically generate SPD EEPROM data > > The machine comes with 256M memory module by default but it's > upgradable so it could have different memory size. There was a TODO > comment to replace static SPD EEPROM data with dynamically generated > one to support this. Now that we have a function for that, it's easy > to do. Although this would allow larger RAM sizes, the peculiar memory > map of the machine may need some special handling to map it as low and > high memory. Because I don't know what the correct place would be for > highmem, I've left memory size fixed at 256M for now and TODO is moved > there instead. > > Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> > --- > hw/mips/mips_fulong2e.c | 31 +++++++++++++------------------ > 1 file changed, 13 insertions(+), 18 deletions(-) > Hello, Zoltan. Thank you for your work in this area. I genarally support this series. (When can we expect v2? I would like to integrate this series before 4.0 soft freeze planned for March 12th.) However, I have just a couple of questions: 1. Is this series dependent on the patches outside of this series? (meaning, the functionality won't work unless those other patches are in the tree?) 2. Can you spell out the test procedure that you used, after this series (and possibly other needed patches) is applied? 3. What exactly this series fixes, or improves? Thanks again! Aleksandar > diff --git a/hw/mips/mips_fulong2e.c b/hw/mips/mips_fulong2e.c > index 10e6ed585a..eec6fd02c8 100644 > --- a/hw/mips/mips_fulong2e.c > +++ b/hw/mips/mips_fulong2e.c > @@ -214,20 +214,6 @@ static void main_cpu_reset(void *opaque) > } > } > > -static const uint8_t eeprom_spd[0x80] = { > - 0x80,0x08,0x07,0x0d,0x09,0x02,0x40,0x00,0x04,0x70, > - 0x70,0x00,0x82,0x10,0x00,0x01,0x0e,0x04,0x0c,0x01, > - 0x02,0x20,0x80,0x75,0x70,0x00,0x00,0x50,0x3c,0x50, > - 0x2d,0x20,0xb0,0xb0,0x50,0x50,0x00,0x00,0x00,0x00, > - 0x00,0x41,0x48,0x3c,0x32,0x75,0x00,0x00,0x00,0x00, > - 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, > - 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, > - 0x00,0x00,0x00,0x9c,0x7b,0x07,0x00,0x00,0x00,0x00, > - 0x00,0x00,0x00,0x00,0x48,0x42,0x35,0x34,0x41,0x32, > - 0x35,0x36,0x38,0x4b,0x4e,0x2d,0x41,0x37,0x35,0x42, > - 0x20,0x30,0x20 > -}; > - > static void vt82c686b_southbridge_init(PCIBus *pci_bus, int slot, qemu_irq intc, > I2CBus **i2c_bus, ISABus **p_isa_bus) > { > @@ -284,7 +270,6 @@ static void network_init (PCIBus *pci_bus) > > static void mips_fulong2e_init(MachineState *machine) > { > - ram_addr_t ram_size = machine->ram_size; > const char *kernel_filename = machine->kernel_filename; > const char *kernel_cmdline = machine->kernel_cmdline; > const char *initrd_filename = machine->initrd_filename; > @@ -292,7 +277,10 @@ static void mips_fulong2e_init(MachineState *machine) > MemoryRegion *address_space_mem = get_system_memory(); > MemoryRegion *ram = g_new(MemoryRegion, 1); > MemoryRegion *bios = g_new(MemoryRegion, 1); > + ram_addr_t ram_size = machine->ram_size; > long bios_size; > + uint8_t *spd_data; > + Error *err = NULL; > int64_t kernel_entry; > PCIBus *pci_bus; > ISABus *isa_bus; > @@ -306,7 +294,7 @@ static void mips_fulong2e_init(MachineState *machine) > > qemu_register_reset(main_cpu_reset, cpu); > > - /* fulong 2e has 256M ram. */ > + /* TODO: support more than 256M RAM as highmem */ > ram_size = 256 * MiB; > > /* allocate RAM */ > @@ -359,8 +347,14 @@ static void mips_fulong2e_init(MachineState *machine) > vt82c686b_southbridge_init(pci_bus, FULONG2E_VIA_SLOT, env->irq[5], > &smbus, &isa_bus); > > - /* TODO: Populate SPD eeprom data. */ > - smbus_eeprom_init(smbus, 1, eeprom_spd, sizeof(eeprom_spd)); > + /* Populate SPD eeprom data */ > + spd_data = spd_data_generate(DDR, ram_size, &err); > + if (err) { > + warn_report_err(err); > + } > + if (spd_data) { > + smbus_eeprom_init_one(smbus, 0x50, spd_data); > + } > > mc146818_rtc_init(isa_bus, 2000, NULL); > > @@ -374,6 +368,7 @@ static void mips_fulong2e_machine_init(MachineClass *mc) > mc->init = mips_fulong2e_init; > mc->block_default_type = IF_IDE; > mc->default_cpu_type = MIPS_CPU_TYPE_NAME("Loongson-2E"); > + mc->default_ram_size = 256 * MiB; > } > > DEFINE_MACHINE("fulong2e", mips_fulong2e_machine_init) > -- > 2.13.7 > ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [Qemu-devel] [PATCH 3/4] mips_fulong2e: Dynamically generate SPD EEPROM data 2019-02-14 17:15 ` Aleksandar Markovic @ 2019-02-14 17:45 ` BALATON Zoltan 0 siblings, 0 replies; 12+ messages in thread From: BALATON Zoltan @ 2019-02-14 17:45 UTC (permalink / raw) To: Aleksandar Markovic Cc: qemu-devel@nongnu.org, Aurelien Jarno, Huacai Chen, Philippe Mathieu-Daudé Hello, On Thu, 14 Feb 2019, Aleksandar Markovic wrote: >> The machine comes with 256M memory module by default but it's >> upgradable so it could have different memory size. There was a TODO >> comment to replace static SPD EEPROM data with dynamically generated >> one to support this. Now that we have a function for that, it's easy >> to do. Although this would allow larger RAM sizes, the peculiar memory >> map of the machine may need some special handling to map it as low and >> high memory. Because I don't know what the correct place would be for >> highmem, I've left memory size fixed at 256M for now and TODO is moved >> there instead. >> >> Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> >> --- >> hw/mips/mips_fulong2e.c | 31 +++++++++++++------------------ >> 1 file changed, 13 insertions(+), 18 deletions(-) >> > > Hello, Zoltan. > > Thank you for your work in this area. I genarally support this series. > (When can we expect v2? I would like to integrate this series before > 4.0 soft freeze planned for March 12th.) I plan to submit v2 definitely before freeze (maybe this week end or next week) I was just waiting for review comments and to see what happens to the ati-vga patch this depends on. > However, I have just a couple of questions: > > 1. Is this series dependent on the patches outside of this series? > (meaning, the functionality won't work unless those other patches > are in the tree?) To quote my original cover letter: "my recent via-ide changes and the separately submitted hw/display: Add basic ATI VGA emulation patch and after this series the pmon_2e.bin firmware from https://mirrors.cloud.tencent.com/loongson/pmon/ can actually run and appears to work. I could not find an image to boot so I could not test that further but this appears to be an improvement that worth submitting now." Maybe this wasn't clear but only the last patch in this series (mips_fulong2e: Add on-board graphics chip) depends on the separate ati-vga patch mentioned above, the rest are not dependent on anything else. My via changes are already merged through the ide tree so those are already in master. > 2. Can you spell out the test procedure that you used, after this > series (and possibly other needed patches) is applied? I've tried: qemu-system-mips64el -M fulong2e -bios pmon_2e.bin with the pmon ROM image from the above link. I've also tried booting some Linux kernel but I could not find a suitable iso so if anyone is aware of a boot CD or image that should work on real hardware I could try that. I think Debian 8.11.0 should boot but needs external kernels which I don't have. Maybe Philippe can add to this what he tested. > 3. What exactly this series fixes, or improves? The series improves the fulong2e machine model to work with its original firmware. Previously it needed some modified firmware which was not available so this actually makes this board a bit more useful. > > Thanks again! > > Aleksandar > >> diff --git a/hw/mips/mips_fulong2e.c b/hw/mips/mips_fulong2e.c >> index 10e6ed585a..eec6fd02c8 100644 >> --- a/hw/mips/mips_fulong2e.c >> +++ b/hw/mips/mips_fulong2e.c >> @@ -214,20 +214,6 @@ static void main_cpu_reset(void *opaque) >> } >> } >> >> -static const uint8_t eeprom_spd[0x80] = { >> - 0x80,0x08,0x07,0x0d,0x09,0x02,0x40,0x00,0x04,0x70, >> - 0x70,0x00,0x82,0x10,0x00,0x01,0x0e,0x04,0x0c,0x01, >> - 0x02,0x20,0x80,0x75,0x70,0x00,0x00,0x50,0x3c,0x50, >> - 0x2d,0x20,0xb0,0xb0,0x50,0x50,0x00,0x00,0x00,0x00, >> - 0x00,0x41,0x48,0x3c,0x32,0x75,0x00,0x00,0x00,0x00, >> - 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, >> - 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, >> - 0x00,0x00,0x00,0x9c,0x7b,0x07,0x00,0x00,0x00,0x00, >> - 0x00,0x00,0x00,0x00,0x48,0x42,0x35,0x34,0x41,0x32, >> - 0x35,0x36,0x38,0x4b,0x4e,0x2d,0x41,0x37,0x35,0x42, >> - 0x20,0x30,0x20 >> -}; >> - >> static void vt82c686b_southbridge_init(PCIBus *pci_bus, int slot, qemu_irq intc, >> I2CBus **i2c_bus, ISABus **p_isa_bus) >> { >> @@ -284,7 +270,6 @@ static void network_init (PCIBus *pci_bus) >> >> static void mips_fulong2e_init(MachineState *machine) >> { >> - ram_addr_t ram_size = machine->ram_size; >> const char *kernel_filename = machine->kernel_filename; >> const char *kernel_cmdline = machine->kernel_cmdline; >> const char *initrd_filename = machine->initrd_filename; >> @@ -292,7 +277,10 @@ static void mips_fulong2e_init(MachineState *machine) >> MemoryRegion *address_space_mem = get_system_memory(); >> MemoryRegion *ram = g_new(MemoryRegion, 1); >> MemoryRegion *bios = g_new(MemoryRegion, 1); >> + ram_addr_t ram_size = machine->ram_size; >> long bios_size; >> + uint8_t *spd_data; >> + Error *err = NULL; >> int64_t kernel_entry; >> PCIBus *pci_bus; >> ISABus *isa_bus; >> @@ -306,7 +294,7 @@ static void mips_fulong2e_init(MachineState *machine) >> >> qemu_register_reset(main_cpu_reset, cpu); >> >> - /* fulong 2e has 256M ram. */ >> + /* TODO: support more than 256M RAM as highmem */ >> ram_size = 256 * MiB; This particular patch about SPD EEPROM just removes the static EEPROM data in favour of the spd_data_generate() function I've recently added which also allows to use different RAM size than hard coded 256 that was previously also limited by the static SPD data. RAM size is still fixed to 256M here because I don't know where to map the highmem beyond the first 256M on MIPS in general and on this board in particular but PMON now recognises bigger RAM sizes as highmem when I remove this fixed setting after this patch. I've added a TODO comment here for this, when this is resolved these lines could be removed as well but I don't intend to do that as I don't know how it should work. Similar cleanup could be done for the malta board which I could try to do but I couldn't find its YAMON firmware to test with (a comment in the code mentions that it's the way it is due to a bug in that firmware so that should be tested to make sure it works, that's why I haven't touched that.) Regards, BALATON Zoltan >> /* allocate RAM */ >> @@ -359,8 +347,14 @@ static void mips_fulong2e_init(MachineState *machine) >> vt82c686b_southbridge_init(pci_bus, FULONG2E_VIA_SLOT, env->irq[5], >> &smbus, &isa_bus); >> >> - /* TODO: Populate SPD eeprom data. */ >> - smbus_eeprom_init(smbus, 1, eeprom_spd, sizeof(eeprom_spd)); >> + /* Populate SPD eeprom data */ >> + spd_data = spd_data_generate(DDR, ram_size, &err); >> + if (err) { >> + warn_report_err(err); >> + } >> + if (spd_data) { >> + smbus_eeprom_init_one(smbus, 0x50, spd_data); >> + } >> >> mc146818_rtc_init(isa_bus, 2000, NULL); >> >> @@ -374,6 +368,7 @@ static void mips_fulong2e_machine_init(MachineClass *mc) >> mc->init = mips_fulong2e_init; >> mc->block_default_type = IF_IDE; >> mc->default_cpu_type = MIPS_CPU_TYPE_NAME("Loongson-2E"); >> + mc->default_ram_size = 256 * MiB; >> } >> >> DEFINE_MACHINE("fulong2e", mips_fulong2e_machine_init) >> -- >> 2.13.7 >> > > ^ permalink raw reply [flat|nested] 12+ messages in thread
* [Qemu-devel] [PATCH 1/4] hw/pci-host/bonito.c: Add PCI mem region mapped at the correct address 2019-02-11 4:01 [Qemu-devel] [PATCH 0/4] Misc MIPS fulong2e improvements BALATON Zoltan ` (2 preceding siblings ...) 2019-02-11 4:01 ` [Qemu-devel] [PATCH 3/4] mips_fulong2e: Dynamically generate SPD EEPROM data BALATON Zoltan @ 2019-02-11 4:01 ` BALATON Zoltan 2019-02-12 0:18 ` Philippe Mathieu-Daudé 3 siblings, 1 reply; 12+ messages in thread From: BALATON Zoltan @ 2019-02-11 4:01 UTC (permalink / raw) To: qemu-devel; +Cc: Aurelien Jarno, Aleksandar Markovic, Huacai Chen Stop using system memory as PCI memory otherwise devices such as VGA that have regions mapped to PCI memory clash with RAM. Use a separate memory region for PCI memory and map it to the correct address in system memory which allows PCI mem regions to show at the correct address where clients expect them. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> --- hw/pci-host/bonito.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/hw/pci-host/bonito.c b/hw/pci-host/bonito.c index 9f33582706..c940ec6e48 100644 --- a/hw/pci-host/bonito.c +++ b/hw/pci-host/bonito.c @@ -598,11 +598,14 @@ static const VMStateDescription vmstate_bonito = { static void bonito_pcihost_realize(DeviceState *dev, Error **errp) { PCIHostState *phb = PCI_HOST_BRIDGE(dev); + MemoryRegion *mr = g_new0(MemoryRegion, 1); + memory_region_init(mr, OBJECT(dev), "pci.mem", BONITO_PCILO_SIZE); phb->bus = pci_register_root_bus(DEVICE(dev), "pci", pci_bonito_set_irq, pci_bonito_map_irq, - dev, get_system_memory(), get_system_io(), + dev, mr, get_system_io(), 0x28, 32, TYPE_PCI_BUS); + memory_region_add_subregion(get_system_memory(), BONITO_PCILO_BASE, mr); } static void bonito_realize(PCIDevice *dev, Error **errp) -- 2.13.7 ^ permalink raw reply related [flat|nested] 12+ messages in thread
* Re: [Qemu-devel] [PATCH 1/4] hw/pci-host/bonito.c: Add PCI mem region mapped at the correct address 2019-02-11 4:01 ` [Qemu-devel] [PATCH 1/4] hw/pci-host/bonito.c: Add PCI mem region mapped at the correct address BALATON Zoltan @ 2019-02-12 0:18 ` Philippe Mathieu-Daudé 0 siblings, 0 replies; 12+ messages in thread From: Philippe Mathieu-Daudé @ 2019-02-12 0:18 UTC (permalink / raw) To: BALATON Zoltan, qemu-devel Cc: Huacai Chen, Aleksandar Markovic, Aurelien Jarno On 2/11/19 5:01 AM, BALATON Zoltan wrote: > Stop using system memory as PCI memory otherwise devices such as VGA > that have regions mapped to PCI memory clash with RAM. Use a separate > memory region for PCI memory and map it to the correct address in > system memory which allows PCI mem regions to show at the correct > address where clients expect them. > > Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> > --- > hw/pci-host/bonito.c | 5 ++++- > 1 file changed, 4 insertions(+), 1 deletion(-) > > diff --git a/hw/pci-host/bonito.c b/hw/pci-host/bonito.c > index 9f33582706..c940ec6e48 100644 > --- a/hw/pci-host/bonito.c > +++ b/hw/pci-host/bonito.c > @@ -598,11 +598,14 @@ static const VMStateDescription vmstate_bonito = { > static void bonito_pcihost_realize(DeviceState *dev, Error **errp) > { > PCIHostState *phb = PCI_HOST_BRIDGE(dev); > + MemoryRegion *mr = g_new0(MemoryRegion, 1); No need to alloc, move that to BonitoState, see [*]. > > + memory_region_init(mr, OBJECT(dev), "pci.mem", BONITO_PCILO_SIZE); > phb->bus = pci_register_root_bus(DEVICE(dev), "pci", > pci_bonito_set_irq, pci_bonito_map_irq, > - dev, get_system_memory(), get_system_io(), > + dev, mr, get_system_io(), > 0x28, 32, TYPE_PCI_BUS); > + memory_region_add_subregion(get_system_memory(), BONITO_PCILO_BASE, mr); > } > > static void bonito_realize(PCIDevice *dev, Error **errp) > [*]: -- >8 -- @@ -217,6 +217,7 @@ struct BonitoState { PCIHostState parent_obj; qemu_irq *pic; PCIBonitoState *pci_dev; + MemoryRegion pci_mmio; }; #define TYPE_BONITO_PCI_HOST_BRIDGE "Bonito-pcihost" @@ -598,14 +599,15 @@ static const VMStateDescription vmstate_bonito = { static void bonito_pcihost_realize(DeviceState *dev, Error **errp) { PCIHostState *phb = PCI_HOST_BRIDGE(dev); - MemoryRegion *mr = g_new0(MemoryRegion, 1); + BonitoState *s = BONITO_PCI_HOST_BRIDGE(dev); - memory_region_init(mr, OBJECT(dev), "pci.mem", BONITO_PCILO_SIZE); + memory_region_init(&s->pci_mmio, OBJECT(dev), "pci.mem", BONITO_PCILO_SIZE); phb->bus = pci_register_root_bus(DEVICE(dev), "pci", pci_bonito_set_irq, pci_bonito_map_irq, - dev, mr, get_system_io(), + dev, &s->pci_mmio, get_system_io(), 0x28, 32, TYPE_PCI_BUS); - memory_region_add_subregion(get_system_memory(), BONITO_PCILO_BASE, mr); + memory_region_add_subregion(get_system_memory(), + BONITO_PCILO_BASE, &s->pci_mmio); } --- Using snippet: Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> ^ permalink raw reply [flat|nested] 12+ messages in thread
end of thread, other threads:[~2019-02-14 17:45 UTC | newest] Thread overview: 12+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2019-02-11 4:01 [Qemu-devel] [PATCH 0/4] Misc MIPS fulong2e improvements BALATON Zoltan 2019-02-11 4:01 ` [Qemu-devel] [PATCH 4/4] mips_fulong2e: Add on-board graphics chip BALATON Zoltan 2019-02-11 23:54 ` Philippe Mathieu-Daudé 2019-02-13 0:01 ` BALATON Zoltan 2019-02-11 4:01 ` [Qemu-devel] [PATCH 2/4] mips_fulong2e: Fix bios flash size BALATON Zoltan 2019-02-11 23:59 ` Philippe Mathieu-Daudé 2019-02-11 4:01 ` [Qemu-devel] [PATCH 3/4] mips_fulong2e: Dynamically generate SPD EEPROM data BALATON Zoltan 2019-02-12 0:00 ` Philippe Mathieu-Daudé 2019-02-14 17:15 ` Aleksandar Markovic 2019-02-14 17:45 ` BALATON Zoltan 2019-02-11 4:01 ` [Qemu-devel] [PATCH 1/4] hw/pci-host/bonito.c: Add PCI mem region mapped at the correct address BALATON Zoltan 2019-02-12 0:18 ` Philippe Mathieu-Daudé
This is a public inbox, see mirroring instructions for how to clone and mirror all data and code used for this inbox; as well as URLs for NNTP newsgroup(s).