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X-Received-From: 2a00:1450:4864:20::342 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?UTF-8?Q?Alex_Benn=c3=a9e?= , QEMU Developers Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 2/7/20 6:01 PM, Peter Maydell wrote: >> + /* CPSR.PAN is preserved unless target is EL1 and SCTLR.SPAN == 0. */ >> + if (cpu_isar_feature(aa64_pan, env_archcpu(env)) >> + && new_el == 1 >> + && !(env->cp15.sctlr_el[1] & SCTLR_SPAN)) { >> + env->uncached_cpsr |= CPSR_PAN; >> + } > This doesn't catch the "taking exception to EL3 and AArch32 is EL3" > case, which is also supposed to honour SCTLR.SPAN. > > Given where this code is, we know we're taking an exception to > AArch32 and that we're not going to Hyp mode, so in fact every > case where we get here is one where we should honour SCTLR.SPAN > and I think we can just drop the "new_el == 1" part of the condition. Presumably that becomes env->cp15.sctlr_el[new_el] as well, so that we get the secure version of the sctlr. r~