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Intel Mac OS X 10.15; rv:102.0) Gecko/20100101 Thunderbird/102.6.1 Subject: Re: [PATCH] target/tricore: Fix OPC1_16_SRO_LD_H translation Content-Language: en-US To: Anton Kochkov , qemu-devel@nongnu.org Cc: eitan_eliahu@hotmail.com, Bastian Koppelmann References: <20230112142258.514079-1-anton.kochkov@proton.me> From: =?UTF-8?Q?Philippe_Mathieu-Daud=c3=a9?= In-Reply-To: <20230112142258.514079-1-anton.kochkov@proton.me> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::42c; envelope-from=philmd@linaro.org; helo=mail-wr1-x42c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 12/1/23 15:24, Anton Kochkov wrote: Fixes: 5a7634a28c ("target-tricore: Add instructions of SLR, SSRO and SRO opcode format") > Signed-off-by: Eitan Eliahu > Resolves: https://gitlab.com/qemu-project/qemu/-/issues/652 > --- > target/tricore/translate.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/target/tricore/translate.c b/target/tricore/translate.c > index df9e46c649..b2a5e11778 100644 > --- a/target/tricore/translate.c > +++ b/target/tricore/translate.c > @@ -3878,7 +3878,7 @@ static void decode_sro_opc(DisasContext *ctx, int op1) > gen_offset_ld(ctx, cpu_gpr_d[15], cpu_gpr_a[r2], address, MO_UB); > break; > case OPC1_16_SRO_LD_H: > - gen_offset_ld(ctx, cpu_gpr_d[15], cpu_gpr_a[r2], address, MO_LESW); > + gen_offset_ld(ctx, cpu_gpr_d[15], cpu_gpr_a[r2], address * 2, MO_LESW); Good catch! > break; > case OPC1_16_SRO_LD_W: > gen_offset_ld(ctx, cpu_gpr_d[15], cpu_gpr_a[r2], address * 4, MO_LESL); > -- > 2.39.0 Reviewed-by: Philippe Mathieu-Daudé