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From: "Donald Liew" <donaldliew@gmail.com>
To: qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] why do qem/arm not clear CPU_INTERRUPT_HARD bit of env->interrupt_request automatically?
Date: Sun, 8 Oct 2006 15:40:12 +0800	[thread overview]
Message-ID: <84e41160610080040o383825a4o255df0ff8cc228d7@mail.gmail.com> (raw)
In-Reply-To: <200610080323.21706.paul@codesourcery.com>

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i see. you are right, thanks very much

2006/10/8, Paul Brook <paul@codesourcery.com>:
>
> On Saturday 07 October 2006 19:15, Donald Liew wrote:
> > i'm reading qemu-system-arm code and trying to add some more
> > evaluation boards support for it. in the 0.8.2 source code i found
> > something i can't understand, when handling interrupts all other
> > targets clears this bit after calling do_interrupt, however the arm
> > target doesn't do this, why? won't this cause problems like redundant
> > interrupts? any special consideration about this?
>
> I this this is the correct behavior. The nIRQ line is level triggered.
> spurious interrupts are avoided because do_interrupt sets the CPSR_I flag.
>
> During normal operation theguest OS will clear the IRQ condition (by
> masking
> the interrupt on the PIC or device) before clearing the CPSE_I flag, so it
> doesn't matter what we do.
>
> Consider the case where the guest OS were to clear CPSR_F without touching
> the
> IRQ line. In this case we would expect annother IRQ exception to be taken
> immediately. If (as you suggest above) we cleared CPU_INTERRUPT_HARD in
> cpu_exec then the IRQ would not be taken until something re-raised the IRQ
> line.
>
> Paul
>

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      reply	other threads:[~2006-10-08  7:40 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2006-10-07 18:15 [Qemu-devel] why do qem/arm not clear CPU_INTERRUPT_HARD bit of env->interrupt_request automatically? Donald Liew
2006-10-08  2:23 ` Paul Brook
2006-10-08  7:40   ` Donald Liew [this message]

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