* [PATCH 0/6] accel/tcg: Build translate-all, tcg-all twice
@ 2025-04-30 23:06 Richard Henderson
2025-04-30 23:06 ` [PATCH 1/6] tcg: Define INSN_START_WORDS as constant 3 Richard Henderson
` (5 more replies)
0 siblings, 6 replies; 14+ messages in thread
From: Richard Henderson @ 2025-04-30 23:06 UTC (permalink / raw)
To: qemu-devel
Based-on: 20250430164854.2233995-1-richard.henderson@linaro.org
("[PATCH v2 00/16] accel/tcg: Compile cpu-exec.c twice")
Based-on: 20250403234914.9154-6-philmd@linaro.org
("RFC PATCH-for-10.1 05/19] qemu: Introduce target_long_bits()")
The finish line for accel/tcg is in sight...
r~
Richard Henderson (6):
tcg: Define INSN_START_WORDS as constant 3
accel/tcg: Don't use TARGET_LONG_BITS in decode_sleb128
accel/tcg: Use target_long_bits() in translate-all.c
accel/tcg: Build translate-all.c twice
accel/tcg: Build tcg-all.c twice
accel/tcg: Use vaddr in cpu_loop.h
include/tcg/insn-start-words.h | 11 +++----
include/tcg/tcg-op.h | 17 +++++++++--
include/tcg/tcg-opc.h | 3 +-
include/tcg/tcg.h | 12 +++++---
include/user/cpu_loop.h | 12 +++-----
accel/tcg/tcg-all.c | 6 +---
accel/tcg/translate-all.c | 56 ++++++++--------------------------
accel/tcg/user-exec.c | 2 +-
linux-user/signal.c | 4 +--
target/i386/helper.c | 2 +-
target/openrisc/sys_helper.c | 2 +-
tcg/perf.c | 5 ++-
tcg/tcg.c | 12 +++-----
accel/tcg/meson.build | 6 ++--
14 files changed, 59 insertions(+), 91 deletions(-)
--
2.43.0
^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH 1/6] tcg: Define INSN_START_WORDS as constant 3
2025-04-30 23:06 [PATCH 0/6] accel/tcg: Build translate-all, tcg-all twice Richard Henderson
@ 2025-04-30 23:06 ` Richard Henderson
2025-05-01 6:31 ` Pierrick Bouvier
2025-04-30 23:06 ` [PATCH 2/6] accel/tcg: Don't use TARGET_LONG_BITS in decode_sleb128 Richard Henderson
` (4 subsequent siblings)
5 siblings, 1 reply; 14+ messages in thread
From: Richard Henderson @ 2025-04-30 23:06 UTC (permalink / raw)
To: qemu-devel
Use the same value for all targets.
Rename TARGET_INSN_START_WORDS and do not depend on
TARGET_INSN_START_EXTRA_WORDS.
Remove TCGContext.insn_start_words.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
include/tcg/insn-start-words.h | 11 +++++------
include/tcg/tcg-op.h | 17 ++++++++++++++---
include/tcg/tcg-opc.h | 3 +--
include/tcg/tcg.h | 12 +++++++-----
accel/tcg/translate-all.c | 19 +++++++++----------
target/i386/helper.c | 2 +-
target/openrisc/sys_helper.c | 2 +-
tcg/perf.c | 5 ++---
tcg/tcg.c | 12 +++++-------
9 files changed, 45 insertions(+), 38 deletions(-)
diff --git a/include/tcg/insn-start-words.h b/include/tcg/insn-start-words.h
index d416d19bcf..c52aec50a7 100644
--- a/include/tcg/insn-start-words.h
+++ b/include/tcg/insn-start-words.h
@@ -1,13 +1,12 @@
/* SPDX-License-Identifier: MIT */
/*
- * Define TARGET_INSN_START_WORDS
+ * Define INSN_START_WORDS
* Copyright (c) 2008 Fabrice Bellard
*/
-#ifndef TARGET_INSN_START_WORDS
+#ifndef TCG_INSN_START_WORDS
+#define TCG_INSN_START_WORDS
-#include "cpu-param.h"
+#define INSN_START_WORDS 3
-# define TARGET_INSN_START_WORDS (1 + TARGET_INSN_START_EXTRA_WORDS)
-
-#endif /* TARGET_INSN_START_WORDS */
+#endif /* TCG_INSN_START_WORDS */
diff --git a/include/tcg/tcg-op.h b/include/tcg/tcg-op.h
index 59d19755e6..c912578fdd 100644
--- a/include/tcg/tcg-op.h
+++ b/include/tcg/tcg-op.h
@@ -9,6 +9,7 @@
#define TCG_TCG_OP_H
#include "tcg/tcg-op-common.h"
+#include "tcg/insn-start-words.h"
#include "exec/target_long.h"
#ifndef TARGET_LONG_BITS
@@ -23,24 +24,34 @@
# error
#endif
+#if INSN_START_WORDS != 3
+# error Mismatch with insn-start-words.h
+#endif
+
#if TARGET_INSN_START_EXTRA_WORDS == 0
static inline void tcg_gen_insn_start(target_ulong pc)
{
- TCGOp *op = tcg_emit_op(INDEX_op_insn_start, 64 / TCG_TARGET_REG_BITS);
+ TCGOp *op = tcg_emit_op(INDEX_op_insn_start,
+ INSN_START_WORDS * 64 / TCG_TARGET_REG_BITS);
tcg_set_insn_start_param(op, 0, pc);
+ tcg_set_insn_start_param(op, 1, 0);
+ tcg_set_insn_start_param(op, 2, 0);
}
#elif TARGET_INSN_START_EXTRA_WORDS == 1
static inline void tcg_gen_insn_start(target_ulong pc, target_ulong a1)
{
- TCGOp *op = tcg_emit_op(INDEX_op_insn_start, 2 * 64 / TCG_TARGET_REG_BITS);
+ TCGOp *op = tcg_emit_op(INDEX_op_insn_start,
+ INSN_START_WORDS * 64 / TCG_TARGET_REG_BITS);
tcg_set_insn_start_param(op, 0, pc);
tcg_set_insn_start_param(op, 1, a1);
+ tcg_set_insn_start_param(op, 2, 0);
}
#elif TARGET_INSN_START_EXTRA_WORDS == 2
static inline void tcg_gen_insn_start(target_ulong pc, target_ulong a1,
target_ulong a2)
{
- TCGOp *op = tcg_emit_op(INDEX_op_insn_start, 3 * 64 / TCG_TARGET_REG_BITS);
+ TCGOp *op = tcg_emit_op(INDEX_op_insn_start,
+ INSN_START_WORDS * 64 / TCG_TARGET_REG_BITS);
tcg_set_insn_start_param(op, 0, pc);
tcg_set_insn_start_param(op, 1, a1);
tcg_set_insn_start_param(op, 2, a2);
diff --git a/include/tcg/tcg-opc.h b/include/tcg/tcg-opc.h
index 995b79383e..e988edd93a 100644
--- a/include/tcg/tcg-opc.h
+++ b/include/tcg/tcg-opc.h
@@ -114,8 +114,7 @@ DEF(extrh_i64_i32, 1, 1, 0, 0)
#define DATA64_ARGS (TCG_TARGET_REG_BITS == 64 ? 1 : 2)
-/* There are tcg_ctx->insn_start_words here, not just one. */
-DEF(insn_start, 0, 0, DATA64_ARGS, TCG_OPF_NOT_PRESENT)
+DEF(insn_start, 0, 0, DATA64_ARGS * INSN_START_WORDS, TCG_OPF_NOT_PRESENT)
DEF(exit_tb, 0, 0, 1, TCG_OPF_BB_EXIT | TCG_OPF_BB_END | TCG_OPF_NOT_PRESENT)
DEF(goto_tb, 0, 0, 1, TCG_OPF_BB_EXIT | TCG_OPF_BB_END | TCG_OPF_NOT_PRESENT)
diff --git a/include/tcg/tcg.h b/include/tcg/tcg.h
index aa300a2f8b..a8c00c72cc 100644
--- a/include/tcg/tcg.h
+++ b/include/tcg/tcg.h
@@ -34,6 +34,7 @@
#include "tcg-target-reg-bits.h"
#include "tcg-target.h"
#include "tcg/tcg-cond.h"
+#include "tcg/insn-start-words.h"
#include "tcg/debug-assert.h"
/* XXX: make safe guess about sizes */
@@ -359,7 +360,6 @@ struct TCGContext {
int page_mask;
uint8_t page_bits;
uint8_t tlb_dyn_max_bits;
- uint8_t insn_start_words;
TCGBar guest_mo;
TCGRegSet reserved_regs;
@@ -582,18 +582,19 @@ static inline TCGv_vec temp_tcgv_vec(TCGTemp *t)
return (TCGv_vec)temp_tcgv_i32(t);
}
-static inline TCGArg tcg_get_insn_param(TCGOp *op, int arg)
+static inline TCGArg tcg_get_insn_param(TCGOp *op, unsigned arg)
{
return op->args[arg];
}
-static inline void tcg_set_insn_param(TCGOp *op, int arg, TCGArg v)
+static inline void tcg_set_insn_param(TCGOp *op, unsigned arg, TCGArg v)
{
op->args[arg] = v;
}
-static inline uint64_t tcg_get_insn_start_param(TCGOp *op, int arg)
+static inline uint64_t tcg_get_insn_start_param(TCGOp *op, unsigned arg)
{
+ tcg_debug_assert(arg < INSN_START_WORDS);
if (TCG_TARGET_REG_BITS == 64) {
return tcg_get_insn_param(op, arg);
} else {
@@ -602,8 +603,9 @@ static inline uint64_t tcg_get_insn_start_param(TCGOp *op, int arg)
}
}
-static inline void tcg_set_insn_start_param(TCGOp *op, int arg, uint64_t v)
+static inline void tcg_set_insn_start_param(TCGOp *op, unsigned arg, uint64_t v)
{
+ tcg_debug_assert(arg < INSN_START_WORDS);
if (TCG_TARGET_REG_BITS == 64) {
tcg_set_insn_param(op, arg, v);
} else {
diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c
index 7b0bd50904..fa4998b341 100644
--- a/accel/tcg/translate-all.c
+++ b/accel/tcg/translate-all.c
@@ -120,7 +120,7 @@ static int64_t decode_sleb128(const uint8_t **pp)
/* Encode the data collected about the instructions while compiling TB.
Place the data at BLOCK, and return the number of bytes consumed.
- The logical table consists of TARGET_INSN_START_WORDS target_ulong's,
+ The logical table consists of INSN_START_WORDS uint64_t's,
which come from the target's insn_start data, followed by a uintptr_t
which comes from the host pc of the end of the code implementing the insn.
@@ -140,13 +140,13 @@ static int encode_search(TranslationBlock *tb, uint8_t *block)
for (i = 0, n = tb->icount; i < n; ++i) {
uint64_t prev, curr;
- for (j = 0; j < TARGET_INSN_START_WORDS; ++j) {
+ for (j = 0; j < INSN_START_WORDS; ++j) {
if (i == 0) {
prev = (!(tb_cflags(tb) & CF_PCREL) && j == 0 ? tb->pc : 0);
} else {
- prev = insn_data[(i - 1) * TARGET_INSN_START_WORDS + j];
+ prev = insn_data[(i - 1) * INSN_START_WORDS + j];
}
- curr = insn_data[i * TARGET_INSN_START_WORDS + j];
+ curr = insn_data[i * INSN_START_WORDS + j];
p = encode_sleb128(p, curr - prev);
}
prev = (i == 0 ? 0 : insn_end_off[i - 1]);
@@ -178,7 +178,7 @@ static int cpu_unwind_data_from_tb(TranslationBlock *tb, uintptr_t host_pc,
return -1;
}
- memset(data, 0, sizeof(uint64_t) * TARGET_INSN_START_WORDS);
+ memset(data, 0, sizeof(uint64_t) * INSN_START_WORDS);
if (!(tb_cflags(tb) & CF_PCREL)) {
data[0] = tb->pc;
}
@@ -188,7 +188,7 @@ static int cpu_unwind_data_from_tb(TranslationBlock *tb, uintptr_t host_pc,
* at which the end of the insn exceeds host_pc.
*/
for (i = 0; i < num_insns; ++i) {
- for (j = 0; j < TARGET_INSN_START_WORDS; ++j) {
+ for (j = 0; j < INSN_START_WORDS; ++j) {
data[j] += decode_sleb128(&p);
}
iter_pc += decode_sleb128(&p);
@@ -206,7 +206,7 @@ static int cpu_unwind_data_from_tb(TranslationBlock *tb, uintptr_t host_pc,
void cpu_restore_state_from_tb(CPUState *cpu, TranslationBlock *tb,
uintptr_t host_pc)
{
- uint64_t data[TARGET_INSN_START_WORDS];
+ uint64_t data[INSN_START_WORDS];
int insns_left = cpu_unwind_data_from_tb(tb, host_pc, data);
if (insns_left < 0) {
@@ -349,7 +349,6 @@ TranslationBlock *tb_gen_code(CPUState *cpu, TCGTBCPUState s)
tcg_ctx->page_mask = TARGET_PAGE_MASK;
tcg_ctx->tlb_dyn_max_bits = CPU_TLB_DYN_MAX_BITS;
#endif
- tcg_ctx->insn_start_words = TARGET_INSN_START_WORDS;
tcg_ctx->guest_mo = cpu->cc->tcg_ops->guest_default_memory_order;
restart_translate:
@@ -457,7 +456,7 @@ TranslationBlock *tb_gen_code(CPUState *cpu, TCGTBCPUState s)
fprintf(logfile, "OUT: [size=%d]\n", gen_code_size);
fprintf(logfile,
" -- guest addr 0x%016" PRIx64 " + tb prologue\n",
- tcg_ctx->gen_insn_data[insn * TARGET_INSN_START_WORDS]);
+ tcg_ctx->gen_insn_data[insn * INSN_START_WORDS]);
chunk_start = tcg_ctx->gen_insn_end_off[insn];
disas(logfile, tb->tc.ptr, chunk_start);
@@ -470,7 +469,7 @@ TranslationBlock *tb_gen_code(CPUState *cpu, TCGTBCPUState s)
size_t chunk_end = tcg_ctx->gen_insn_end_off[insn];
if (chunk_end > chunk_start) {
fprintf(logfile, " -- guest addr 0x%016" PRIx64 "\n",
- tcg_ctx->gen_insn_data[insn * TARGET_INSN_START_WORDS]);
+ tcg_ctx->gen_insn_data[insn * INSN_START_WORDS]);
disas(logfile, tb->tc.ptr + chunk_start,
chunk_end - chunk_start);
chunk_start = chunk_end;
diff --git a/target/i386/helper.c b/target/i386/helper.c
index 197fdac7dd..e0aaed3c4c 100644
--- a/target/i386/helper.c
+++ b/target/i386/helper.c
@@ -526,7 +526,7 @@ void cpu_x86_inject_mce(Monitor *mon, X86CPU *cpu, int bank,
static inline target_ulong get_memio_eip(CPUX86State *env)
{
#ifdef CONFIG_TCG
- uint64_t data[TARGET_INSN_START_WORDS];
+ uint64_t data[INSN_START_WORDS];
CPUState *cs = env_cpu(env);
if (!cpu_unwind_state_data(cs, cs->mem_io_pc, data)) {
diff --git a/target/openrisc/sys_helper.c b/target/openrisc/sys_helper.c
index 951f8e247a..d96b41a01c 100644
--- a/target/openrisc/sys_helper.c
+++ b/target/openrisc/sys_helper.c
@@ -218,7 +218,7 @@ target_ulong HELPER(mfspr)(CPUOpenRISCState *env, target_ulong rd,
{
OpenRISCCPU *cpu = env_archcpu(env);
#ifndef CONFIG_USER_ONLY
- uint64_t data[TARGET_INSN_START_WORDS];
+ uint64_t data[INSN_START_WORDS];
MachineState *ms = MACHINE(qdev_get_machine());
CPUState *cs = env_cpu(env);
int idx;
diff --git a/tcg/perf.c b/tcg/perf.c
index 412a987d95..4e8d2c1bee 100644
--- a/tcg/perf.c
+++ b/tcg/perf.c
@@ -313,7 +313,7 @@ void perf_report_code(uint64_t guest_pc, TranslationBlock *tb,
const void *start)
{
struct debuginfo_query *q;
- size_t insn, start_words;
+ size_t insn;
uint64_t *gen_insn_data;
if (!perfmap && !jitdump) {
@@ -329,11 +329,10 @@ void perf_report_code(uint64_t guest_pc, TranslationBlock *tb,
/* Query debuginfo for each guest instruction. */
gen_insn_data = tcg_ctx->gen_insn_data;
- start_words = tcg_ctx->insn_start_words;
for (insn = 0; insn < tb->icount; insn++) {
/* FIXME: This replicates the restore_state_to_opc() logic. */
- q[insn].address = gen_insn_data[insn * start_words + 0];
+ q[insn].address = gen_insn_data[insn * INSN_START_WORDS + 0];
if (tb_cflags(tb) & CF_PCREL) {
q[insn].address |= (guest_pc & qemu_target_page_mask());
}
diff --git a/tcg/tcg.c b/tcg/tcg.c
index c4e866e9c3..648333a9fb 100644
--- a/tcg/tcg.c
+++ b/tcg/tcg.c
@@ -1989,7 +1989,6 @@ void tcg_func_start(TCGContext *s)
QSIMPLEQ_INIT(&s->labels);
tcg_debug_assert(s->addr_type <= TCG_TYPE_REG);
- tcg_debug_assert(s->insn_start_words > 0);
}
static TCGTemp *tcg_temp_alloc(TCGContext *s)
@@ -2943,7 +2942,7 @@ void tcg_dump_ops(TCGContext *s, FILE *f, bool have_prefs)
nb_oargs = 0;
col += ne_fprintf(f, "\n ----");
- for (i = 0, k = s->insn_start_words; i < k; ++i) {
+ for (i = 0, k = INSN_START_WORDS; i < k; ++i) {
col += ne_fprintf(f, " %016" PRIx64,
tcg_get_insn_start_param(op, i));
}
@@ -6835,7 +6834,7 @@ static void tcg_out_st_helper_args(TCGContext *s, const TCGLabelQemuLdst *ldst,
int tcg_gen_code(TCGContext *s, TranslationBlock *tb, uint64_t pc_start)
{
- int i, start_words, num_insns;
+ int i, num_insns;
TCGOp *op;
if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP)
@@ -6925,9 +6924,8 @@ int tcg_gen_code(TCGContext *s, TranslationBlock *tb, uint64_t pc_start)
QSIMPLEQ_INIT(&s->ldst_labels);
s->pool_labels = NULL;
- start_words = s->insn_start_words;
s->gen_insn_data =
- tcg_malloc(sizeof(uint64_t) * s->gen_tb->icount * start_words);
+ tcg_malloc(sizeof(uint64_t) * s->gen_tb->icount * INSN_START_WORDS);
tcg_out_tb_start(s);
@@ -6969,8 +6967,8 @@ int tcg_gen_code(TCGContext *s, TranslationBlock *tb, uint64_t pc_start)
assert(s->gen_insn_end_off[num_insns] == off);
}
num_insns++;
- for (i = 0; i < start_words; ++i) {
- s->gen_insn_data[num_insns * start_words + i] =
+ for (i = 0; i < INSN_START_WORDS; ++i) {
+ s->gen_insn_data[num_insns * INSN_START_WORDS + i] =
tcg_get_insn_start_param(op, i);
}
break;
--
2.43.0
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH 2/6] accel/tcg: Don't use TARGET_LONG_BITS in decode_sleb128
2025-04-30 23:06 [PATCH 0/6] accel/tcg: Build translate-all, tcg-all twice Richard Henderson
2025-04-30 23:06 ` [PATCH 1/6] tcg: Define INSN_START_WORDS as constant 3 Richard Henderson
@ 2025-04-30 23:06 ` Richard Henderson
2025-05-01 6:31 ` Pierrick Bouvier
2025-05-01 12:37 ` Philippe Mathieu-Daudé
2025-04-30 23:06 ` [PATCH 3/6] accel/tcg: Use target_long_bits() in translate-all.c Richard Henderson
` (3 subsequent siblings)
5 siblings, 2 replies; 14+ messages in thread
From: Richard Henderson @ 2025-04-30 23:06 UTC (permalink / raw)
To: qemu-devel; +Cc: qemu-stable
When we changed decode_sleb128 from target_long to
int64_t, we failed to adjust the shift limit.
Cc: qemu-stable@nongnu.org
Fixes: c9ad8d27caa ("tcg: Widen gen_insn_data to uint64_t")
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
accel/tcg/translate-all.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c
index fa4998b341..acf32e6c08 100644
--- a/accel/tcg/translate-all.c
+++ b/accel/tcg/translate-all.c
@@ -109,7 +109,7 @@ static int64_t decode_sleb128(const uint8_t **pp)
val |= (int64_t)(byte & 0x7f) << shift;
shift += 7;
} while (byte & 0x80);
- if (shift < TARGET_LONG_BITS && (byte & 0x40)) {
+ if (shift < 64 && (byte & 0x40)) {
val |= -(int64_t)1 << shift;
}
--
2.43.0
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH 3/6] accel/tcg: Use target_long_bits() in translate-all.c
2025-04-30 23:06 [PATCH 0/6] accel/tcg: Build translate-all, tcg-all twice Richard Henderson
2025-04-30 23:06 ` [PATCH 1/6] tcg: Define INSN_START_WORDS as constant 3 Richard Henderson
2025-04-30 23:06 ` [PATCH 2/6] accel/tcg: Don't use TARGET_LONG_BITS in decode_sleb128 Richard Henderson
@ 2025-04-30 23:06 ` Richard Henderson
2025-05-01 6:31 ` Pierrick Bouvier
2025-04-30 23:06 ` [PATCH 4/6] accel/tcg: Build translate-all.c twice Richard Henderson
` (2 subsequent siblings)
5 siblings, 1 reply; 14+ messages in thread
From: Richard Henderson @ 2025-04-30 23:06 UTC (permalink / raw)
To: qemu-devel
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
accel/tcg/translate-all.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c
index acf32e6c08..6b6e10be9d 100644
--- a/accel/tcg/translate-all.c
+++ b/accel/tcg/translate-all.c
@@ -54,6 +54,7 @@
#include "qemu/qemu-print.h"
#include "qemu/main-loop.h"
#include "qemu/cacheinfo.h"
+#include "qemu/target-info.h"
#include "qemu/timer.h"
#include "exec/log.h"
#include "exec/icount.h"
@@ -343,7 +344,7 @@ TranslationBlock *tb_gen_code(CPUState *cpu, TCGTBCPUState s)
}
tcg_ctx->gen_tb = tb;
- tcg_ctx->addr_type = TARGET_LONG_BITS == 32 ? TCG_TYPE_I32 : TCG_TYPE_I64;
+ tcg_ctx->addr_type = target_long_bits() == 32 ? TCG_TYPE_I32 : TCG_TYPE_I64;
#ifdef CONFIG_SOFTMMU
tcg_ctx->page_bits = TARGET_PAGE_BITS;
tcg_ctx->page_mask = TARGET_PAGE_MASK;
--
2.43.0
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH 4/6] accel/tcg: Build translate-all.c twice
2025-04-30 23:06 [PATCH 0/6] accel/tcg: Build translate-all, tcg-all twice Richard Henderson
` (2 preceding siblings ...)
2025-04-30 23:06 ` [PATCH 3/6] accel/tcg: Use target_long_bits() in translate-all.c Richard Henderson
@ 2025-04-30 23:06 ` Richard Henderson
2025-05-01 6:32 ` Pierrick Bouvier
2025-04-30 23:06 ` [PATCH 5/6] accel/tcg: Build tcg-all.c twice Richard Henderson
2025-04-30 23:06 ` [PATCH 6/6] accel/tcg: Use vaddr in cpu_loop.h Richard Henderson
5 siblings, 1 reply; 14+ messages in thread
From: Richard Henderson @ 2025-04-30 23:06 UTC (permalink / raw)
To: qemu-devel
Remove lots and lots of unused headers.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
accel/tcg/translate-all.c | 32 --------------------------------
accel/tcg/meson.build | 2 +-
2 files changed, 1 insertion(+), 33 deletions(-)
diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c
index 6b6e10be9d..451b383aa8 100644
--- a/accel/tcg/translate-all.c
+++ b/accel/tcg/translate-all.c
@@ -22,46 +22,15 @@
#include "trace.h"
#include "disas/disas.h"
#include "tcg/tcg.h"
-#if defined(CONFIG_USER_ONLY)
-#include "qemu.h"
-#if defined(__FreeBSD__) || defined(__FreeBSD_kernel__)
-#include <sys/param.h>
-#if __FreeBSD_version >= 700104
-#define HAVE_KINFO_GETVMMAP
-#define sigqueue sigqueue_freebsd /* avoid redefinition */
-#include <sys/proc.h>
-#include <machine/profile.h>
-#define _KERNEL
-#include <sys/user.h>
-#undef _KERNEL
-#undef sigqueue
-#include <libutil.h>
-#endif
-#endif
-#else
-#include "system/ram_addr.h"
-#endif
-
-#include "cpu-param.h"
-#include "exec/cputlb.h"
-#include "exec/page-protection.h"
#include "exec/mmap-lock.h"
#include "tb-internal.h"
#include "tlb-bounds.h"
-#include "exec/translator.h"
#include "exec/tb-flush.h"
-#include "qemu/bitmap.h"
-#include "qemu/qemu-print.h"
-#include "qemu/main-loop.h"
#include "qemu/cacheinfo.h"
#include "qemu/target-info.h"
-#include "qemu/timer.h"
#include "exec/log.h"
#include "exec/icount.h"
-#include "system/tcg.h"
-#include "qapi/error.h"
#include "accel/tcg/cpu-ops.h"
-#include "accel/tcg/getpc.h"
#include "tb-jmp-cache.h"
#include "tb-hash.h"
#include "tb-context.h"
@@ -69,7 +38,6 @@
#include "internal-common.h"
#include "tcg/perf.h"
#include "tcg/insn-start-words.h"
-#include "cpu.h"
TBContext tb_ctx;
diff --git a/accel/tcg/meson.build b/accel/tcg/meson.build
index 0bb089299b..7eb4619aea 100644
--- a/accel/tcg/meson.build
+++ b/accel/tcg/meson.build
@@ -10,6 +10,7 @@ tcg_ss.add(files(
'tcg-runtime.c',
'tcg-runtime-gvec.c',
'tb-maint.c',
+ 'translate-all.c',
'translator.c',
))
if get_option('plugins')
@@ -22,7 +23,6 @@ libsystem_ss.add_all(tcg_ss)
tcg_specific_ss = ss.source_set()
tcg_specific_ss.add(files(
'tcg-all.c',
- 'translate-all.c',
))
tcg_specific_ss.add(when: 'CONFIG_USER_ONLY', if_true: files('user-exec.c'))
specific_ss.add_all(when: 'CONFIG_TCG', if_true: tcg_specific_ss)
--
2.43.0
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH 5/6] accel/tcg: Build tcg-all.c twice
2025-04-30 23:06 [PATCH 0/6] accel/tcg: Build translate-all, tcg-all twice Richard Henderson
` (3 preceding siblings ...)
2025-04-30 23:06 ` [PATCH 4/6] accel/tcg: Build translate-all.c twice Richard Henderson
@ 2025-04-30 23:06 ` Richard Henderson
2025-05-01 6:33 ` Pierrick Bouvier
2025-04-30 23:06 ` [PATCH 6/6] accel/tcg: Use vaddr in cpu_loop.h Richard Henderson
5 siblings, 1 reply; 14+ messages in thread
From: Richard Henderson @ 2025-04-30 23:06 UTC (permalink / raw)
To: qemu-devel
Remove some unused headers.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
accel/tcg/tcg-all.c | 6 +-----
accel/tcg/meson.build | 4 +---
2 files changed, 2 insertions(+), 8 deletions(-)
diff --git a/accel/tcg/tcg-all.c b/accel/tcg/tcg-all.c
index 0ce34ac912..6e5dc333d5 100644
--- a/accel/tcg/tcg-all.c
+++ b/accel/tcg/tcg-all.c
@@ -36,15 +36,11 @@
#include "qapi/qapi-builtin-visit.h"
#include "qemu/units.h"
#include "qemu/target-info.h"
-#if defined(CONFIG_USER_ONLY)
-#include "hw/qdev-core.h"
-#else
+#ifndef CONFIG_USER_ONLY
#include "hw/boards.h"
-#include "system/tcg.h"
#endif
#include "accel/tcg/cpu-ops.h"
#include "internal-common.h"
-#include "cpu-param.h"
struct TCGState {
diff --git a/accel/tcg/meson.build b/accel/tcg/meson.build
index 7eb4619aea..d6bd304add 100644
--- a/accel/tcg/meson.build
+++ b/accel/tcg/meson.build
@@ -10,6 +10,7 @@ tcg_ss.add(files(
'tcg-runtime.c',
'tcg-runtime-gvec.c',
'tb-maint.c',
+ 'tcg-all.c',
'translate-all.c',
'translator.c',
))
@@ -21,9 +22,6 @@ libuser_ss.add_all(tcg_ss)
libsystem_ss.add_all(tcg_ss)
tcg_specific_ss = ss.source_set()
-tcg_specific_ss.add(files(
- 'tcg-all.c',
-))
tcg_specific_ss.add(when: 'CONFIG_USER_ONLY', if_true: files('user-exec.c'))
specific_ss.add_all(when: 'CONFIG_TCG', if_true: tcg_specific_ss)
--
2.43.0
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH 6/6] accel/tcg: Use vaddr in cpu_loop.h
2025-04-30 23:06 [PATCH 0/6] accel/tcg: Build translate-all, tcg-all twice Richard Henderson
` (4 preceding siblings ...)
2025-04-30 23:06 ` [PATCH 5/6] accel/tcg: Build tcg-all.c twice Richard Henderson
@ 2025-04-30 23:06 ` Richard Henderson
2025-05-01 6:33 ` Pierrick Bouvier
5 siblings, 1 reply; 14+ messages in thread
From: Richard Henderson @ 2025-04-30 23:06 UTC (permalink / raw)
To: qemu-devel
Use vaddr instead of abi_ptr or target_ulong for a guest address.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
include/user/cpu_loop.h | 12 +++++-------
accel/tcg/user-exec.c | 2 +-
linux-user/signal.c | 4 ++--
3 files changed, 8 insertions(+), 10 deletions(-)
diff --git a/include/user/cpu_loop.h b/include/user/cpu_loop.h
index 589c66543f..ad8a1d711f 100644
--- a/include/user/cpu_loop.h
+++ b/include/user/cpu_loop.h
@@ -20,11 +20,9 @@
#ifndef USER_CPU_LOOP_H
#define USER_CPU_LOOP_H
-#include "exec/abi_ptr.h"
+#include "exec/vaddr.h"
#include "exec/mmu-access-type.h"
-#include "exec/log.h"
-#include "exec/target_long.h"
-#include "special-errno.h"
+
/**
* adjust_signal_pc:
@@ -46,7 +44,7 @@ MMUAccessType adjust_signal_pc(uintptr_t *pc, bool is_write);
* Return true if the write fault has been handled, and should be re-tried.
*/
bool handle_sigsegv_accerr_write(CPUState *cpu, sigset_t *old_set,
- uintptr_t host_pc, abi_ptr guest_addr);
+ uintptr_t host_pc, vaddr guest_addr);
/**
* cpu_loop_exit_sigsegv:
@@ -59,7 +57,7 @@ bool handle_sigsegv_accerr_write(CPUState *cpu, sigset_t *old_set,
* Use the TCGCPUOps hook to record cpu state, do guest operating system
* specific things to raise SIGSEGV, and jump to the main cpu loop.
*/
-G_NORETURN void cpu_loop_exit_sigsegv(CPUState *cpu, target_ulong addr,
+G_NORETURN void cpu_loop_exit_sigsegv(CPUState *cpu, vaddr addr,
MMUAccessType access_type,
bool maperr, uintptr_t ra);
@@ -73,7 +71,7 @@ G_NORETURN void cpu_loop_exit_sigsegv(CPUState *cpu, target_ulong addr,
* Use the TCGCPUOps hook to record cpu state, do guest operating system
* specific things to raise SIGBUS, and jump to the main cpu loop.
*/
-G_NORETURN void cpu_loop_exit_sigbus(CPUState *cpu, target_ulong addr,
+G_NORETURN void cpu_loop_exit_sigbus(CPUState *cpu, vaddr addr,
MMUAccessType access_type,
uintptr_t ra);
diff --git a/accel/tcg/user-exec.c b/accel/tcg/user-exec.c
index 68e01fc584..e1f4c4eacf 100644
--- a/accel/tcg/user-exec.c
+++ b/accel/tcg/user-exec.c
@@ -126,7 +126,7 @@ MMUAccessType adjust_signal_pc(uintptr_t *pc, bool is_write)
* guest, we'd end up in an infinite loop of retrying the faulting access.
*/
bool handle_sigsegv_accerr_write(CPUState *cpu, sigset_t *old_set,
- uintptr_t host_pc, abi_ptr guest_addr)
+ uintptr_t host_pc, vaddr guest_addr)
{
switch (page_unprotect(cpu, guest_addr, host_pc)) {
case 0:
diff --git a/linux-user/signal.c b/linux-user/signal.c
index 4dafc2c3a2..cd0e7398aa 100644
--- a/linux-user/signal.c
+++ b/linux-user/signal.c
@@ -750,7 +750,7 @@ void force_sigsegv(int oldsig)
}
#endif
-void cpu_loop_exit_sigsegv(CPUState *cpu, target_ulong addr,
+void cpu_loop_exit_sigsegv(CPUState *cpu, vaddr addr,
MMUAccessType access_type, bool maperr, uintptr_t ra)
{
const TCGCPUOps *tcg_ops = cpu->cc->tcg_ops;
@@ -766,7 +766,7 @@ void cpu_loop_exit_sigsegv(CPUState *cpu, target_ulong addr,
cpu_loop_exit_restore(cpu, ra);
}
-void cpu_loop_exit_sigbus(CPUState *cpu, target_ulong addr,
+void cpu_loop_exit_sigbus(CPUState *cpu, vaddr addr,
MMUAccessType access_type, uintptr_t ra)
{
const TCGCPUOps *tcg_ops = cpu->cc->tcg_ops;
--
2.43.0
^ permalink raw reply related [flat|nested] 14+ messages in thread
* Re: [PATCH 1/6] tcg: Define INSN_START_WORDS as constant 3
2025-04-30 23:06 ` [PATCH 1/6] tcg: Define INSN_START_WORDS as constant 3 Richard Henderson
@ 2025-05-01 6:31 ` Pierrick Bouvier
0 siblings, 0 replies; 14+ messages in thread
From: Pierrick Bouvier @ 2025-05-01 6:31 UTC (permalink / raw)
To: Richard Henderson, qemu-devel
On 4/30/25 4:06 PM, Richard Henderson wrote:
> Use the same value for all targets.
>
> Rename TARGET_INSN_START_WORDS and do not depend on
> TARGET_INSN_START_EXTRA_WORDS.
> Remove TCGContext.insn_start_words.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> include/tcg/insn-start-words.h | 11 +++++------
> include/tcg/tcg-op.h | 17 ++++++++++++++---
> include/tcg/tcg-opc.h | 3 +--
> include/tcg/tcg.h | 12 +++++++-----
> accel/tcg/translate-all.c | 19 +++++++++----------
> target/i386/helper.c | 2 +-
> target/openrisc/sys_helper.c | 2 +-
> tcg/perf.c | 5 ++---
> tcg/tcg.c | 12 +++++-------
> 9 files changed, 45 insertions(+), 38 deletions(-)
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 2/6] accel/tcg: Don't use TARGET_LONG_BITS in decode_sleb128
2025-04-30 23:06 ` [PATCH 2/6] accel/tcg: Don't use TARGET_LONG_BITS in decode_sleb128 Richard Henderson
@ 2025-05-01 6:31 ` Pierrick Bouvier
2025-05-01 12:37 ` Philippe Mathieu-Daudé
1 sibling, 0 replies; 14+ messages in thread
From: Pierrick Bouvier @ 2025-05-01 6:31 UTC (permalink / raw)
To: Richard Henderson, qemu-devel; +Cc: qemu-stable
On 4/30/25 4:06 PM, Richard Henderson wrote:
> When we changed decode_sleb128 from target_long to
> int64_t, we failed to adjust the shift limit.
>
> Cc: qemu-stable@nongnu.org
> Fixes: c9ad8d27caa ("tcg: Widen gen_insn_data to uint64_t")
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> accel/tcg/translate-all.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 3/6] accel/tcg: Use target_long_bits() in translate-all.c
2025-04-30 23:06 ` [PATCH 3/6] accel/tcg: Use target_long_bits() in translate-all.c Richard Henderson
@ 2025-05-01 6:31 ` Pierrick Bouvier
0 siblings, 0 replies; 14+ messages in thread
From: Pierrick Bouvier @ 2025-05-01 6:31 UTC (permalink / raw)
To: Richard Henderson, qemu-devel
On 4/30/25 4:06 PM, Richard Henderson wrote:
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> accel/tcg/translate-all.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 4/6] accel/tcg: Build translate-all.c twice
2025-04-30 23:06 ` [PATCH 4/6] accel/tcg: Build translate-all.c twice Richard Henderson
@ 2025-05-01 6:32 ` Pierrick Bouvier
0 siblings, 0 replies; 14+ messages in thread
From: Pierrick Bouvier @ 2025-05-01 6:32 UTC (permalink / raw)
To: Richard Henderson, qemu-devel
On 4/30/25 4:06 PM, Richard Henderson wrote:
> Remove lots and lots of unused headers.
>
That was a loooot indeed.
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> accel/tcg/translate-all.c | 32 --------------------------------
> accel/tcg/meson.build | 2 +-
> 2 files changed, 1 insertion(+), 33 deletions(-)
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 5/6] accel/tcg: Build tcg-all.c twice
2025-04-30 23:06 ` [PATCH 5/6] accel/tcg: Build tcg-all.c twice Richard Henderson
@ 2025-05-01 6:33 ` Pierrick Bouvier
0 siblings, 0 replies; 14+ messages in thread
From: Pierrick Bouvier @ 2025-05-01 6:33 UTC (permalink / raw)
To: Richard Henderson, qemu-devel
On 4/30/25 4:06 PM, Richard Henderson wrote:
> Remove some unused headers.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> accel/tcg/tcg-all.c | 6 +-----
> accel/tcg/meson.build | 4 +---
> 2 files changed, 2 insertions(+), 8 deletions(-)
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 6/6] accel/tcg: Use vaddr in cpu_loop.h
2025-04-30 23:06 ` [PATCH 6/6] accel/tcg: Use vaddr in cpu_loop.h Richard Henderson
@ 2025-05-01 6:33 ` Pierrick Bouvier
0 siblings, 0 replies; 14+ messages in thread
From: Pierrick Bouvier @ 2025-05-01 6:33 UTC (permalink / raw)
To: Richard Henderson, qemu-devel
On 4/30/25 4:06 PM, Richard Henderson wrote:
> Use vaddr instead of abi_ptr or target_ulong for a guest address.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> include/user/cpu_loop.h | 12 +++++-------
> accel/tcg/user-exec.c | 2 +-
> linux-user/signal.c | 4 ++--
> 3 files changed, 8 insertions(+), 10 deletions(-)
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 2/6] accel/tcg: Don't use TARGET_LONG_BITS in decode_sleb128
2025-04-30 23:06 ` [PATCH 2/6] accel/tcg: Don't use TARGET_LONG_BITS in decode_sleb128 Richard Henderson
2025-05-01 6:31 ` Pierrick Bouvier
@ 2025-05-01 12:37 ` Philippe Mathieu-Daudé
1 sibling, 0 replies; 14+ messages in thread
From: Philippe Mathieu-Daudé @ 2025-05-01 12:37 UTC (permalink / raw)
To: Richard Henderson, qemu-devel; +Cc: qemu-stable
On 1/5/25 01:06, Richard Henderson wrote:
> When we changed decode_sleb128 from target_long to
> int64_t, we failed to adjust the shift limit.
>
> Cc: qemu-stable@nongnu.org
> Fixes: c9ad8d27caa ("tcg: Widen gen_insn_data to uint64_t")
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> accel/tcg/translate-all.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
^ permalink raw reply [flat|nested] 14+ messages in thread
end of thread, other threads:[~2025-05-01 12:37 UTC | newest]
Thread overview: 14+ messages (download: mbox.gz follow: Atom feed
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2025-04-30 23:06 [PATCH 0/6] accel/tcg: Build translate-all, tcg-all twice Richard Henderson
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2025-05-01 6:31 ` Pierrick Bouvier
2025-04-30 23:06 ` [PATCH 2/6] accel/tcg: Don't use TARGET_LONG_BITS in decode_sleb128 Richard Henderson
2025-05-01 6:31 ` Pierrick Bouvier
2025-05-01 12:37 ` Philippe Mathieu-Daudé
2025-04-30 23:06 ` [PATCH 3/6] accel/tcg: Use target_long_bits() in translate-all.c Richard Henderson
2025-05-01 6:31 ` Pierrick Bouvier
2025-04-30 23:06 ` [PATCH 4/6] accel/tcg: Build translate-all.c twice Richard Henderson
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2025-05-01 6:33 ` Pierrick Bouvier
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