From: Miles Glenn <milesg@linux.ibm.com>
To: Nicholas Piggin <npiggin@gmail.com>, qemu-ppc@nongnu.org
Cc: qemu-devel@nongnu.org,
Daniel Henrique Barboza <danielhb413@gmail.com>,
Glenn Miles <milesg@linux.vnet.ibm.com>,
Richard Henderson <richard.henderson@linaro.org>,
Chinmay Rath <rathc@linux.ibm.com>
Subject: Re: [PATCH v2 02/12] target/ppc: improve checkstop logging
Date: Tue, 21 May 2024 10:37:13 -0500 [thread overview]
Message-ID: <8551fc11a1e3f453c4b8689bb00658d5d7a51c7c.camel@linux.ibm.com> (raw)
In-Reply-To: <20240521013029.30082-3-npiggin@gmail.com>
Reviewed-by: Glenn Miles <milesg@linux.ibm.com>
Thanks,
Glenn
On Tue, 2024-05-21 at 11:30 +1000, Nicholas Piggin wrote:
> Change the logging not to print to stderr as well, because a
> checkstop is a guest error (or perhaps a simulated machine error)
> rather than a QEMU error, so send it to the log.
>
> Update the checkstop message, and log CPU registers too.
>
> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
> ---
> target/ppc/excp_helper.c | 14 ++++++++------
> 1 file changed, 8 insertions(+), 6 deletions(-)
>
> diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c
> index b2b51537b7..17bf8df9d7 100644
> --- a/target/ppc/excp_helper.c
> +++ b/target/ppc/excp_helper.c
> @@ -430,17 +430,19 @@ static void
> powerpc_mcheck_checkstop(CPUPPCState *env)
> /* KVM guests always have MSR[ME] enabled */
> #ifdef CONFIG_TCG
> CPUState *cs = env_cpu(env);
> + FILE *f;
>
> if (FIELD_EX64(env->msr, MSR, ME)) {
> return;
> }
>
> - /* Machine check exception is not enabled. Enter checkstop
> state. */
> - fprintf(stderr, "Machine check while not allowed. "
> - "Entering checkstop state\n");
> - if (qemu_log_separate()) {
> - qemu_log("Machine check while not allowed. "
> - "Entering checkstop state\n");
> + f = qemu_log_trylock();
> + if (f) {
> + fprintf(f, "Entering checkstop state: "
> + "machine check with MSR[ME]=0\n");
> + cpu_dump_state(cs, f, CPU_DUMP_FPU | CPU_DUMP_CCOP);
> + qemu_log_unlock(f);
> + }
>
> /*
> * This stops the machine and logs CPU state without killing
> QEMU
next prev parent reply other threads:[~2024-05-21 15:38 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-05-21 1:30 [PATCH v2 00/12] target/ppc: Various TCG emulation patches Nicholas Piggin
2024-05-21 1:30 ` [PATCH v2 01/12] target/ppc: Make checkstop actually stop the system Nicholas Piggin
2024-05-21 15:32 ` Miles Glenn
2024-05-21 1:30 ` [PATCH v2 02/12] target/ppc: improve checkstop logging Nicholas Piggin
2024-05-21 15:37 ` Miles Glenn [this message]
2024-05-21 17:29 ` Richard Henderson
2025-04-29 6:49 ` Philippe Mathieu-Daudé
2024-05-21 1:30 ` [PATCH v2 03/12] target/ppc: Implement attn instruction on BookS 64-bit processors Nicholas Piggin
2024-05-21 15:41 ` Miles Glenn
2024-05-22 1:30 ` Nicholas Piggin
2024-05-21 17:34 ` Richard Henderson
2024-05-22 1:32 ` Nicholas Piggin
2024-05-21 1:30 ` [PATCH v2 04/12] target/ppc: BookE DECAR SPR is 32-bit Nicholas Piggin
2024-05-21 15:44 ` Miles Glenn
2024-05-21 1:30 ` [PATCH v2 05/12] target/ppc: Wire up BookE ATB registers for e500 family Nicholas Piggin
2024-05-21 1:30 ` [PATCH v2 06/12] target/ppc: Add PPR32 SPR Nicholas Piggin
2024-05-21 15:52 ` Miles Glenn
2024-05-21 17:40 ` Richard Henderson
2024-05-22 1:43 ` Nicholas Piggin
2024-05-21 1:30 ` [PATCH v2 07/12] target/ppc: add helper to write per-LPAR SPRs Nicholas Piggin
2024-05-21 16:50 ` Miles Glenn
2024-05-21 1:30 ` [PATCH v2 08/12] target/ppc: Add SMT support to simple SPRs Nicholas Piggin
2024-05-21 15:56 ` Miles Glenn
2024-05-21 1:30 ` [PATCH v2 09/12] target/ppc: Add SMT support to PTCR SPR Nicholas Piggin
2024-05-21 16:02 ` Miles Glenn
2024-05-21 1:30 ` [PATCH v2 10/12] target/ppc: Implement LDBAR, TTR SPRs Nicholas Piggin
2024-05-21 16:41 ` Miles Glenn
2024-05-21 1:30 ` [PATCH v2 11/12] target/ppc: Implement SPRC/SPRD SPRs Nicholas Piggin
2024-05-21 16:37 ` Miles Glenn
2024-05-21 1:30 ` [PATCH v2 12/12] target/ppc: add SMT support to msgsnd broadcast Nicholas Piggin
2024-05-21 17:07 ` Miles Glenn
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