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[174.21.143.238]) by smtp.gmail.com with ESMTPSA id s199sm11649807pfs.124.2020.05.19.07.51.57 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 19 May 2020 07:51:57 -0700 (PDT) Subject: Re: [RFC] Various questions about TCG implementation, DRM patches dealing with pointers over guest-host barrier. To: "Catherine A. Frederick" , qemu-devel@nongnu.org References: <9d75f1f6-3440-8dec-9266-4841362844d0@gmail.com> From: Richard Henderson Message-ID: <8573dda3-a4f4-2590-678d-d45cfb62ced6@linaro.org> Date: Tue, 19 May 2020 07:51:55 -0700 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.7.0 MIME-Version: 1.0 In-Reply-To: <9d75f1f6-3440-8dec-9266-4841362844d0@gmail.com> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=2607:f8b0:4864:20::430; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x430.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 5/17/20 4:05 PM, Catherine A. Frederick wrote: > - I've been implementing an instruction scheduler(list scheduler, with priority > given to most successors) for TCG and currently if I replace instructions in > s->ops(the TCG context) I get a crash later in tcg_reg_alloc_op, even if the > instruction stream is identical. Is there anything else I need to move when I > do this? If you're getting a crash in tcg_reg_alloc_op, are you updating liveness info? Where are you inserting your scheduler in the list of passes? > - Is insn_start necessary to have in order(and what does it do?)? These > currently are serializing instructions in my scheduler and significantly limit > my reordering as they create lots of dependencies every few instructions. insn_start is required for unwinding from exceptions. You can consider it a barrier for call and qemu_ld/st. Anything else cannot raise an exception and can be moved. r~