public inbox for qemu-devel@nongnu.org
 help / color / mirror / Atom feed
From: Pierrick Bouvier <pierrick.bouvier@linaro.org>
To: "Philippe Mathieu-Daudé" <philmd@linaro.org>, qemu-devel@nongnu.org
Cc: "Glenn Miles" <milesg@linux.ibm.com>,
	"Mark Cave-Ayland" <mark.cave-ayland@ilande.co.uk>,
	"Nicholas Piggin" <npiggin@gmail.com>,
	qemu-ppc@nongnu.org,
	"Daniel Henrique Barboza" <daniel.barboza@oss.qualcomm.com>,
	"Fabiano Rosas" <farosas@suse.de>,
	"Alistair Francis" <alistair.francis@wdc.com>,
	"Alex Bennée" <alex.bennee@linaro.org>,
	qemu-riscv@nongnu.org, "Paolo Bonzini" <pbonzini@redhat.com>,
	"Artyom Tarasenko" <atar4qemu@gmail.com>,
	"Anton Johansson" <anjo@rev.ng>, "Peter Xu" <peterx@redhat.com>,
	"Zhao Liu" <zhao1.liu@intel.com>,
	"Jiaxun Yang" <jiaxun.yang@flygoat.com>,
	"Palmer Dabbelt" <palmer@dabbelt.com>,
	"Weiwei Li" <liwei1518@gmail.com>,
	"Liu Zhiwei" <zhiwei_liu@linux.alibaba.com>,
	"Chao Liu" <chao.liu.zevorn@gmail.com>,
	"Chinmay Rath" <rathc@linux.ibm.com>
Subject: Re: [PATCH-for-11.1 10/10] migration: Restrict legacy VMSTATE_UINTTL() macros to few targets
Date: Wed, 25 Mar 2026 14:49:30 -0700	[thread overview]
Message-ID: <85cd9ae9-dff2-437f-82c1-638d349c5082@linaro.org> (raw)
In-Reply-To: <20260325211728.89204-11-philmd@linaro.org>

On 3/25/26 2:17 PM, Philippe Mathieu-Daudé wrote:
> Only 5 base targets use VMSTATE_UINTTL (MIPS, PPC, X86, SPARC and
> RISCV). In order to build a single binary (preliminary step toward
> heterogeneous emulation) we need to remove it, but it will take some
> time. Add a temporary TARGET_USING_LEGACY_MIGRATION_VMSTATE_UINTTL_API
> definition to keep targets not using these macros clean while we keep
> cleaning the last few targets one by one, preventing legacy uses to
> creep back in.
> 
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
>   configs/targets/i386-softmmu.mak     |  1 +
>   configs/targets/mips-softmmu.mak     |  1 +
>   configs/targets/mips64-softmmu.mak   |  1 +
>   configs/targets/mips64el-softmmu.mak |  1 +
>   configs/targets/mipsel-softmmu.mak   |  1 +
>   configs/targets/ppc-softmmu.mak      |  1 +
>   configs/targets/ppc64-softmmu.mak    |  1 +
>   configs/targets/riscv32-softmmu.mak  |  1 +
>   configs/targets/riscv64-softmmu.mak  |  1 +
>   configs/targets/sparc-softmmu.mak    |  1 +
>   configs/targets/sparc64-softmmu.mak  |  1 +
>   configs/targets/x86_64-softmmu.mak   |  1 +
>   include/migration/cpu.h              | 24 +++++++++++-------------
>   target/ppc/machine.c                 |  1 +
>   scripts/make-config-poison.sh        |  1 +
>   15 files changed, 25 insertions(+), 13 deletions(-)
> 
> diff --git a/configs/targets/i386-softmmu.mak b/configs/targets/i386-softmmu.mak
> index 38a8f85201f..048ae17fdc5 100644
> --- a/configs/targets/i386-softmmu.mak
> +++ b/configs/targets/i386-softmmu.mak
> @@ -4,3 +4,4 @@ TARGET_KVM_HAVE_RESET_PARKED_VCPU=y
>   TARGET_XML_FILES= i386-32bit.xml
>   TARGET_LONG_BITS=32
>   TARGET_NOT_USING_LEGACY_LDST_PHYS_API=y
> +TARGET_USING_LEGACY_MIGRATION_VMSTATE_UINTTL_API=y
> diff --git a/configs/targets/mips-softmmu.mak b/configs/targets/mips-softmmu.mak
> index 95397af9442..81990d21880 100644
> --- a/configs/targets/mips-softmmu.mak
> +++ b/configs/targets/mips-softmmu.mak
> @@ -2,3 +2,4 @@ TARGET_ARCH=mips
>   TARGET_BIG_ENDIAN=y
>   TARGET_LONG_BITS=32
>   TARGET_NOT_USING_LEGACY_LDST_PHYS_API=y
> +TARGET_USING_LEGACY_MIGRATION_VMSTATE_UINTTL_API=y
> diff --git a/configs/targets/mips64-softmmu.mak b/configs/targets/mips64-softmmu.mak
> index f9cc41b9ed4..2f7873af06d 100644
> --- a/configs/targets/mips64-softmmu.mak
> +++ b/configs/targets/mips64-softmmu.mak
> @@ -3,3 +3,4 @@ TARGET_BASE_ARCH=mips
>   TARGET_BIG_ENDIAN=y
>   TARGET_LONG_BITS=64
>   TARGET_NOT_USING_LEGACY_LDST_PHYS_API=y
> +TARGET_USING_LEGACY_MIGRATION_VMSTATE_UINTTL_API=y
> diff --git a/configs/targets/mips64el-softmmu.mak b/configs/targets/mips64el-softmmu.mak
> index 4e7dedc5f30..62e74f77ba5 100644
> --- a/configs/targets/mips64el-softmmu.mak
> +++ b/configs/targets/mips64el-softmmu.mak
> @@ -2,3 +2,4 @@ TARGET_ARCH=mips64
>   TARGET_BASE_ARCH=mips
>   TARGET_LONG_BITS=64
>   TARGET_NOT_USING_LEGACY_LDST_PHYS_API=y
> +TARGET_USING_LEGACY_MIGRATION_VMSTATE_UINTTL_API=y
> diff --git a/configs/targets/mipsel-softmmu.mak b/configs/targets/mipsel-softmmu.mak
> index b0fba8a9d0a..57e556b93b8 100644
> --- a/configs/targets/mipsel-softmmu.mak
> +++ b/configs/targets/mipsel-softmmu.mak
> @@ -1,3 +1,4 @@
>   TARGET_ARCH=mips
>   TARGET_LONG_BITS=32
>   TARGET_NOT_USING_LEGACY_LDST_PHYS_API=y
> +TARGET_USING_LEGACY_MIGRATION_VMSTATE_UINTTL_API=y
> diff --git a/configs/targets/ppc-softmmu.mak b/configs/targets/ppc-softmmu.mak
> index 867898bd47c..1e28d40b440 100644
> --- a/configs/targets/ppc-softmmu.mak
> +++ b/configs/targets/ppc-softmmu.mak
> @@ -3,3 +3,4 @@ TARGET_BIG_ENDIAN=y
>   TARGET_KVM_HAVE_GUEST_DEBUG=y
>   TARGET_XML_FILES= power-core.xml power-fpu.xml power-altivec.xml power-spe.xml
>   TARGET_LONG_BITS=32
> +TARGET_USING_LEGACY_MIGRATION_VMSTATE_UINTTL_API=y
> diff --git a/configs/targets/ppc64-softmmu.mak b/configs/targets/ppc64-softmmu.mak
> index 10d7a2681e7..8c7171f9d5e 100644
> --- a/configs/targets/ppc64-softmmu.mak
> +++ b/configs/targets/ppc64-softmmu.mak
> @@ -6,3 +6,4 @@ TARGET_XML_FILES= power64-core.xml power-fpu.xml power-altivec.xml power-spe.xml
>   # all boards require libfdt
>   TARGET_NEED_FDT=y
>   TARGET_LONG_BITS=64
> +TARGET_USING_LEGACY_MIGRATION_VMSTATE_UINTTL_API=y
> diff --git a/configs/targets/riscv32-softmmu.mak b/configs/targets/riscv32-softmmu.mak
> index 26080599be7..a9cd8ae89ee 100644
> --- a/configs/targets/riscv32-softmmu.mak
> +++ b/configs/targets/riscv32-softmmu.mak
> @@ -5,3 +5,4 @@ TARGET_XML_FILES= riscv-32bit-cpu.xml riscv-32bit-fpu.xml riscv-64bit-fpu.xml ri
>   TARGET_NEED_FDT=y
>   TARGET_LONG_BITS=32
>   TARGET_NOT_USING_LEGACY_LDST_PHYS_API=y
> +TARGET_USING_LEGACY_MIGRATION_VMSTATE_UINTTL_API=y
> diff --git a/configs/targets/riscv64-softmmu.mak b/configs/targets/riscv64-softmmu.mak
> index 5059c550480..3f97cd6dfa5 100644
> --- a/configs/targets/riscv64-softmmu.mak
> +++ b/configs/targets/riscv64-softmmu.mak
> @@ -6,3 +6,4 @@ TARGET_XML_FILES= riscv-64bit-cpu.xml riscv-32bit-fpu.xml riscv-64bit-fpu.xml ri
>   TARGET_NEED_FDT=y
>   TARGET_LONG_BITS=64
>   TARGET_NOT_USING_LEGACY_LDST_PHYS_API=y
> +TARGET_USING_LEGACY_MIGRATION_VMSTATE_UINTTL_API=y
> diff --git a/configs/targets/sparc-softmmu.mak b/configs/targets/sparc-softmmu.mak
> index 126ce12abb0..0630fa54b43 100644
> --- a/configs/targets/sparc-softmmu.mak
> +++ b/configs/targets/sparc-softmmu.mak
> @@ -4,3 +4,4 @@ TARGET_XML_FILES=sparc32-cpu.xml sparc32-fpu.xml sparc32-cp0.xml
>   TARGET_LONG_BITS=32
>   TARGET_NOT_USING_LEGACY_LDST_PHYS_API=y
>   TARGET_NOT_USING_LEGACY_NATIVE_ENDIAN_API=y
> +TARGET_USING_LEGACY_MIGRATION_VMSTATE_UINTTL_API=y
> diff --git a/configs/targets/sparc64-softmmu.mak b/configs/targets/sparc64-softmmu.mak
> index 4e621fb8e39..500db845ea9 100644
> --- a/configs/targets/sparc64-softmmu.mak
> +++ b/configs/targets/sparc64-softmmu.mak
> @@ -5,3 +5,4 @@ TARGET_XML_FILES=sparc64-cpu.xml sparc64-fpu.xml sparc64-cp0.xml
>   TARGET_LONG_BITS=64
>   TARGET_NOT_USING_LEGACY_LDST_PHYS_API=y
>   TARGET_NOT_USING_LEGACY_NATIVE_ENDIAN_API=y
> +TARGET_USING_LEGACY_MIGRATION_VMSTATE_UINTTL_API=y
> diff --git a/configs/targets/x86_64-softmmu.mak b/configs/targets/x86_64-softmmu.mak
> index c7f8746b4f5..18b3575e4e2 100644
> --- a/configs/targets/x86_64-softmmu.mak
> +++ b/configs/targets/x86_64-softmmu.mak
> @@ -5,3 +5,4 @@ TARGET_KVM_HAVE_RESET_PARKED_VCPU=y
>   TARGET_XML_FILES= i386-64bit.xml i386-64bit-apx.xml
>   TARGET_LONG_BITS=64
>   TARGET_NOT_USING_LEGACY_LDST_PHYS_API=y
> +TARGET_USING_LEGACY_MIGRATION_VMSTATE_UINTTL_API=y
> diff --git a/include/migration/cpu.h b/include/migration/cpu.h
> index 05a1ddde343..4c8c9c34cc8 100644
> --- a/include/migration/cpu.h
> +++ b/include/migration/cpu.h
> @@ -3,25 +3,23 @@
>   #ifndef MIGRATION_CPU_H
>   #define MIGRATION_CPU_H
>   
> +#ifdef TARGET_USING_LEGACY_MIGRATION_VMSTATE_UINTTL_API
> +
>   #include "exec/cpu-defs.h"
> -#include "migration/qemu-file-types.h"
>   #include "migration/vmstate.h"
>   
>   #if TARGET_LONG_BITS == 64
> -#define VMSTATE_UINTTL_V(_f, _s, _v)                                  \
> -    VMSTATE_UINT64_V(_f, _s, _v)
> -#define VMSTATE_UINTTL_ARRAY_V(_f, _s, _n, _v)                        \
> -    VMSTATE_UINT64_ARRAY_V(_f, _s, _n, _v)
> +#define VMSTATE_UINTTL(_f, _s) \
> +    VMSTATE_UINT64_V(_f, _s, 0)
> +#define VMSTATE_UINTTL_ARRAY(_f, _s, _n) \
> +    VMSTATE_UINT64_ARRAY_V(_f, _s, _n, 0)
>   #else
> -#define VMSTATE_UINTTL_V(_f, _s, _v)                                  \
> -    VMSTATE_UINT32_V(_f, _s, _v)
> -#define VMSTATE_UINTTL_ARRAY_V(_f, _s, _n, _v)                        \
> -    VMSTATE_UINT32_ARRAY_V(_f, _s, _n, _v)
> +#define VMSTATE_UINTTL(_f, _s) \
> +    VMSTATE_UINT32_V(_f, _s, 0)
> +#define VMSTATE_UINTTL_ARRAY(_f, _s, _n) \
> +    VMSTATE_UINT32_ARRAY_V(_f, _s, _n, 0)
>   #endif
>   
> -#define VMSTATE_UINTTL(_f, _s)                                        \
> -    VMSTATE_UINTTL_V(_f, _s, 0)
> -#define VMSTATE_UINTTL_ARRAY(_f, _s, _n)                              \
> -    VMSTATE_UINTTL_ARRAY_V(_f, _s, _n, 0)
> +#endif /* TARGET_USING_LEGACY_MIGRATION_VMSTATE_UINTTL_API */
>   
>   #endif
> diff --git a/target/ppc/machine.c b/target/ppc/machine.c
> index 49cfdc6d674..f6169a128dc 100644
> --- a/target/ppc/machine.c
> +++ b/target/ppc/machine.c
> @@ -5,6 +5,7 @@
>   #include "helper_regs.h"
>   #include "mmu-hash64.h"
>   #include "migration/cpu.h"
> +#include "migration/qemu-file-types.h"
>   #include "qapi/error.h"
>   #include "kvm_ppc.h"
>   #include "power8-pmu.h"
> diff --git a/scripts/make-config-poison.sh b/scripts/make-config-poison.sh
> index b4d61e8bc9e..a1c5fa77d9d 100755
> --- a/scripts/make-config-poison.sh
> +++ b/scripts/make-config-poison.sh
> @@ -12,6 +12,7 @@ exec sed -n \
>     -e '/CONFIG_SOFTMMU/d' \
>     -e '/TARGET_NOT_USING_LEGACY_LDST_PHYS_API/d' \
>     -e '/TARGET_NOT_USING_LEGACY_NATIVE_ENDIAN_API/d' \
> +  -e '/TARGET_USING_LEGACY_MIGRATION_VMSTATE_UINTTL_API/d' \
>     -e '/^#define / {' \
>     -e    's///' \
>     -e    's/ .*//' \

I'm not sure it's needed to have this flag.

Indeed, it's not possible to eradicate VMSTATE_UINTTL because of 
retrocompatibility, so it will never be completely removed. Thus, you 
can leave it as it is and implement the hint mentioned on Patch 8, which 
is retrocompatible by design.

With this, no change will be needed in target code, and only migration 
and include/migration/cpu.h will need a change.

Regards,
Pierrick


      parent reply	other threads:[~2026-03-25 21:50 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-03-25 21:17 [PATCH-for-11.1 00/10] migration: Reduce uses of target-specific macros Philippe Mathieu-Daudé
2026-03-25 21:17 ` [PATCH-for-11.1 01/10] target/avr: Avoid target-specific migration headers in machine.c Philippe Mathieu-Daudé
2026-03-25 21:39   ` Pierrick Bouvier
2026-03-25 21:17 ` [PATCH-for-11.1 02/10] target/loongarch: " Philippe Mathieu-Daudé
2026-03-25 21:39   ` Pierrick Bouvier
2026-03-25 21:17 ` [PATCH-for-11.1 03/10] migration: Revert "Add VMSTATE_UINTTL_2DARRAY()" Philippe Mathieu-Daudé
2026-03-25 21:39   ` Pierrick Bouvier
2026-03-25 21:17 ` [PATCH-for-11.1 04/10] migration: Remove unused target-specific macros Philippe Mathieu-Daudé
2026-03-25 21:40   ` Pierrick Bouvier
2026-03-25 21:17 ` [PATCH-for-11.1 05/10] target/sparc: Inline qemu_get/put_betl() Philippe Mathieu-Daudé
2026-03-25 21:40   ` Pierrick Bouvier
2026-03-25 21:17 ` [PATCH-for-11.1 06/10] target/mips: Inline qemu_get/put_betls() Philippe Mathieu-Daudé
2026-03-25 21:40   ` Pierrick Bouvier
2026-03-25 21:17 ` [PATCH-for-11.1 07/10] target/i386: Expand VMSTATE_UINTTL_SUB_ARRAY for APX registers Philippe Mathieu-Daudé
2026-03-25 21:40   ` Pierrick Bouvier
2026-03-25 21:17 ` [PATCH-for-11.1 08/10] target/i386: Inline VMSTATE_UINTTL_SUB_ARRAY() macro Philippe Mathieu-Daudé
2026-03-25 21:43   ` Pierrick Bouvier
2026-03-25 21:17 ` [PATCH-for-11.1 09/10] target/sparc: Replace VMSTATE_VARRAY_MULTIPLY -> VMSTATE_UINTTL_ARRAY Philippe Mathieu-Daudé
2026-03-25 21:44   ` Pierrick Bouvier
2026-03-25 21:17 ` [PATCH-for-11.1 10/10] migration: Restrict legacy VMSTATE_UINTTL() macros to few targets Philippe Mathieu-Daudé
2026-03-25 21:20   ` Philippe Mathieu-Daudé
2026-03-25 21:49   ` Pierrick Bouvier [this message]

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=85cd9ae9-dff2-437f-82c1-638d349c5082@linaro.org \
    --to=pierrick.bouvier@linaro.org \
    --cc=alex.bennee@linaro.org \
    --cc=alistair.francis@wdc.com \
    --cc=anjo@rev.ng \
    --cc=atar4qemu@gmail.com \
    --cc=chao.liu.zevorn@gmail.com \
    --cc=daniel.barboza@oss.qualcomm.com \
    --cc=farosas@suse.de \
    --cc=jiaxun.yang@flygoat.com \
    --cc=liwei1518@gmail.com \
    --cc=mark.cave-ayland@ilande.co.uk \
    --cc=milesg@linux.ibm.com \
    --cc=npiggin@gmail.com \
    --cc=palmer@dabbelt.com \
    --cc=pbonzini@redhat.com \
    --cc=peterx@redhat.com \
    --cc=philmd@linaro.org \
    --cc=qemu-devel@nongnu.org \
    --cc=qemu-ppc@nongnu.org \
    --cc=qemu-riscv@nongnu.org \
    --cc=rathc@linux.ibm.com \
    --cc=zhao1.liu@intel.com \
    --cc=zhiwei_liu@linux.alibaba.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox