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From: Torbjorn Granlund <tg@gmplib.org>
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Date: Wed, 08 May 2013 12:07:04 +0200
In-Reply-To: <291613D8-3B7F-4FDE-B7E8-AB6CDC0EC7C7@suse.de> (Alexander Graf's
	message of "Wed\, 8 May 2013 11\:57\:29 +0200")
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Subject: Re: [Qemu-devel] [Qemu-ppc] Incorrect handling of more PPC64 insns
	(PATCH)
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To: Alexander Graf <agraf@suse.de>
Cc: qemu-ppc@nongnu.org, qemu-devel@nongnu.org, Richard Henderson <rth@twiddle.net>

Alexander Graf <agraf@suse.de> writes:

  Ok, so the real problem here is that NARROW_MODE is not set, but is
  used to differentiate whether to use the 32bit cmp only or not.
=20=20
Eh?

  Richard, there are 2 ways out of this:
=20=20
    1) get rid of NARROW_MODE and always check ctx->sf

No!

The cmp insn with L set should NOT be affected by SF.  That's the entire
point of my change.

I reviewed the other uses of NARROW_MODE and didn't spot any errors.
(But I must confess that I would need to red the PPC manuals better inn
order to tell for sure.)

    2) add a new 32bit only insns flag and create separate functions for 32=
bit cmp calls
=20=20
Aurelien's patch looked promising, if one removes the exception casting.

--=20
Torbj=C3=B6rn