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[109.111.99.24]) by smtp.gmail.com with ESMTPSA id n22-20020a7bc5d6000000b003fa968e9c27sm1891147wmk.9.2023.07.14.10.52.24 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 14 Jul 2023 10:52:25 -0700 (PDT) Message-ID: <869d9cf9-003a-b721-651c-b5bb82ed593d@linaro.org> Date: Fri, 14 Jul 2023 19:52:23 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Macintosh; Intel Mac OS X 10.15; rv:102.0) Gecko/20100101 Thunderbird/102.13.0 Subject: Re: [PATCH] target/sparc: Handle FPRS correctly on big-endian hosts Content-Language: en-US To: Peter Maydell , qemu-devel@nongnu.org Cc: Mark Cave-Ayland , Artyom Tarasenko References: <20230714172602.397267-1-peter.maydell@linaro.org> From: =?UTF-8?Q?Philippe_Mathieu-Daud=c3=a9?= In-Reply-To: <20230714172602.397267-1-peter.maydell@linaro.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=2a00:1450:4864:20::32b; envelope-from=philmd@linaro.org; helo=mail-wm1-x32b.google.com X-Spam_score_int: -21 X-Spam_score: -2.2 X-Spam_bar: -- X-Spam_report: (-2.2 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-0.091, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Hi Peter, On 14/7/23 19:26, Peter Maydell wrote: > In CPUSparcState we define the fprs field as uint64_t. However we > then refer to it in translate.c via a TCGv_i32 which we set up with > tcg_global_mem_new_ptr(). This means that on a big-endian host when > the guest does something to writo te the FPRS register this value > ends up in the wrong half of the uint64_t, and the QEMU C code that > refers to env->fprs sees the wrong value. The effect of this is that > guest code that enables the FPU crashes with spurious FPU Disabled > exceptions. In particular, this is why > tests/avocado/machine_sparc64_sun4u.py:Sun4uMachine.test_sparc64_sun4u > times out on an s390 host. > > There are multiple ways we could fix this; since there are actually > only three bits in the FPRS register and the code in translate.c > would be a bit painful to convert to dealing with a TCGv_i64, change > the type of the CPU state struct field to match what translate.c is > expecting. > > (None of the other fields referenced by the r32[] array in > sparc_tcg_init() have the wrong type.) > > Signed-off-by: Peter Maydell > --- > Another in my occasional series of "fix an avocado failure on > s390" Friday afternoon patches :-) :) > diff --git a/target/sparc/gdbstub.c b/target/sparc/gdbstub.c > index a1c8fdc4d55..bddb9609b7b 100644 > --- a/target/sparc/gdbstub.c > +++ b/target/sparc/gdbstub.c > @@ -96,7 +96,10 @@ int sparc_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n) > case 83: > return gdb_get_regl(mem_buf, env->fsr); > case 84: > - return gdb_get_regl(mem_buf, env->fprs); > + { > + target_ulong fprs = env->fprs; > + return gdb_get_regl(mem_buf, fprs); Why not return gdb_get_reg32() ? > + }