From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: "Cédric Le Goater" <clg@kaod.org>,
"Peter Maydell" <peter.maydell@linaro.org>
Cc: qemu-arm@nongnu.org, qemu-devel@nongnu.org,
Peter Xu <peterx@redhat.com>, Fabiano Rosas <farosas@suse.de>
Subject: Re: [PATCH 08/13] hw/arm/mps3r: Initial skeleton for mps3-an536 board
Date: Thu, 8 Feb 2024 19:19:37 +0100 [thread overview]
Message-ID: <86b28c33-4412-4832-a7d7-b5938d945066@linaro.org> (raw)
In-Reply-To: <17a2931a-5b3e-4eed-ae63-63b14032db6f@kaod.org>
On 8/2/24 18:07, Cédric Le Goater wrote:
>
>>>> +/*
>>>> + * The MPS3 DDR is 3GiB, but on a 32-bit host QEMU doesn't permit
>>>> + * emulation of that much guest RAM, so artificially make it smaller.
>>>> + */
>>>> +#if HOST_LONG_BITS == 32
>>>> +#define MPS3_DDR_SIZE (1 * GiB)
>>>> +#else
>>>> +#define MPS3_DDR_SIZE (3 * GiB)
>>>> +#endif
>>>
>>> Generically, can we migrate a VM started on a 32-bit host to a 64-bit
>>> one?
>>
>> I think it's one of those things that in theory is supposed
>> to be possible and in practice nobody tests so it might well
>> not work. At any rate, this is the same thing we do already
>> in mps2-tz.c for the 2GB DRAM those boards have.
>
> We could have a common helper may be. Aspeed does:
>
> /* On 32-bit hosts, lower RAM to 1G because of the 2047 MB limit */
> #if HOST_LONG_BITS == 32
> #define ASPEED_RAM_SIZE(sz) MIN((sz), 1 * GiB)
> #else
> #define ASPEED_RAM_SIZE(sz) (sz)
> #endif
Or deprecate system emulation on 32-bit hosts.
next prev parent reply other threads:[~2024-02-08 18:20 UTC|newest]
Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-02-06 13:29 [PATCH 00/13] hw/arm: Implement new machine mps3-an536 (Cortex-R52 MPS3 AN536 FPGA image) Peter Maydell
2024-02-06 13:29 ` [PATCH 01/13] target/arm: Use new CBAR encoding for all v8 CPUs, not all aarch64 CPUs Peter Maydell
2024-02-06 20:34 ` Richard Henderson
2024-02-06 21:00 ` Peter Maydell
2024-02-06 13:29 ` [PATCH 02/13] target/arm: The Cortex-R52 has a read-only CBAR Peter Maydell
2024-02-06 20:38 ` Richard Henderson
2024-02-06 21:02 ` Peter Maydell
2024-02-06 13:29 ` [PATCH 03/13] target/arm: Add Cortex-R52 IMPDEF sysregs Peter Maydell
2024-02-06 22:21 ` Richard Henderson
2024-02-06 13:29 ` [PATCH 04/13] target/arm: Allow access to SPSR_hyp from hyp mode Peter Maydell
2024-02-06 21:46 ` Richard Henderson
2024-02-06 13:29 ` [PATCH 05/13] hw/misc/mps2-scc: Fix condition for CFG3 register Peter Maydell
2024-02-06 15:52 ` Philippe Mathieu-Daudé
2024-02-06 21:47 ` Richard Henderson
2024-02-06 13:29 ` [PATCH 06/13] hw/misc/mps2-scc: Factor out which-board conditionals Peter Maydell
2024-02-06 15:56 ` Philippe Mathieu-Daudé
2024-02-06 21:47 ` Richard Henderson
2024-02-07 8:47 ` Philippe Mathieu-Daudé
2024-02-06 13:29 ` [PATCH 07/13] hw/misc/mps2-scc: Make changes needed for AN536 FPGA image Peter Maydell
2024-02-06 21:50 ` Richard Henderson
2024-02-07 8:56 ` Philippe Mathieu-Daudé
2024-02-06 13:29 ` [PATCH 08/13] hw/arm/mps3r: Initial skeleton for mps3-an536 board Peter Maydell
2024-02-06 19:21 ` Philippe Mathieu-Daudé
2024-02-06 20:57 ` Peter Maydell
2024-02-07 9:02 ` Philippe Mathieu-Daudé
2024-02-08 17:02 ` Peter Maydell
2024-02-08 17:07 ` Cédric Le Goater
2024-02-08 18:19 ` Philippe Mathieu-Daudé [this message]
2024-02-06 13:29 ` [PATCH 09/13] hw/arm/mps3r: Add CPUs, GIC, and per-CPU RAM Peter Maydell
2024-02-15 17:53 ` Alex Bennée
2024-02-06 13:29 ` [PATCH 10/13] hw/arm/mps3r: Add UARTs Peter Maydell
2024-02-06 16:44 ` Philippe Mathieu-Daudé
2024-02-06 13:29 ` [PATCH 11/13] hw/arm/mps3r: Add GPIO, watchdog, dual-timer, I2C devices Peter Maydell
2024-02-06 16:47 ` Philippe Mathieu-Daudé
2024-02-06 13:29 ` [PATCH 12/13] hw/arm/mps3r: Add remaining devices Peter Maydell
2024-02-06 16:49 ` Philippe Mathieu-Daudé
2024-02-06 13:29 ` [PATCH 13/13] docs: Add documentation for the mps3-an536 board Peter Maydell
2024-02-06 16:50 ` Philippe Mathieu-Daudé
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