Re: [PATCH 06/13] hw/arm/fsl-imx8mm: Add GPIO controllers

["Philippe Mathieu-Daudé" <philmd@linaro.org>]

On 10/11/25 12:22, Gaurav Sharma wrote:
> Enabled GPIO controller emulation
> Also updated the GPIO IRQ lines of iMX8MM
> 
> Signed-off-by: Gaurav Sharma <gaurav.sharma_7@nxp.com>
> ---
>   docs/system/arm/imx8mm-evk.rst |  1 +
>   hw/arm/fsl-imx8mm.c            | 54 ++++++++++++++++++++++++++++++++++
>   include/hw/arm/fsl-imx8mm.h    | 14 +++++++++
>   3 files changed, 69 insertions(+)


> diff --git a/hw/arm/fsl-imx8mm.c b/hw/arm/fsl-imx8mm.c
> index ea5799b2cc..222d3bac1c 100644
> --- a/hw/arm/fsl-imx8mm.c
> +++ b/hw/arm/fsl-imx8mm.c
> @@ -177,6 +177,11 @@ static void fsl_imx8mm_init(Object *obj)
>           object_initialize_child(obj, name, &s->uart[i], TYPE_IMX_SERIAL);
>       }
>   
> +    for (i = 0; i < FSL_IMX8MM_NUM_GPIOS; i++) {
> +        g_autofree char *name = g_strdup_printf("gpio%d", i + 1);
> +        object_initialize_child(obj, name, &s->gpio[i], TYPE_IMX_GPIO);
> +    }
> +
>       for (i = 0; i < FSL_IMX8MM_NUM_USDHCS; i++) {
>           g_autofree char *name = g_strdup_printf("usdhc%d", i + 1);
>           object_initialize_child(obj, name, &s->usdhc[i], TYPE_IMX_USDHC);
> @@ -350,6 +355,54 @@ static void fsl_imx8mm_realize(DeviceState *dev, Error **errp)
>                              qdev_get_gpio_in(gicdev, serial_table[i].irq));
>       }
>   
> +    /* GPIOs */
> +    for (i = 0; i < FSL_IMX8MM_NUM_GPIOS; i++) {

static const?

> +        struct {
> +            hwaddr addr;
> +            unsigned int irq_low;
> +            unsigned int irq_high;
> +        } gpio_table[FSL_IMX8MM_NUM_GPIOS] = {
> +            {
> +                fsl_imx8mm_memmap[FSL_IMX8MM_GPIO1].addr,
> +                FSL_IMX8MM_GPIO1_LOW_IRQ,
> +                FSL_IMX8MM_GPIO1_HIGH_IRQ
> +            },
> +            {
> +                fsl_imx8mm_memmap[FSL_IMX8MM_GPIO2].addr,
> +                FSL_IMX8MM_GPIO2_LOW_IRQ,
> +                FSL_IMX8MM_GPIO2_HIGH_IRQ
> +            },
> +            {
> +                fsl_imx8mm_memmap[FSL_IMX8MM_GPIO3].addr,
> +                FSL_IMX8MM_GPIO3_LOW_IRQ,
> +                FSL_IMX8MM_GPIO3_HIGH_IRQ
> +            },
> +            {
> +                fsl_imx8mm_memmap[FSL_IMX8MM_GPIO4].addr,
> +                FSL_IMX8MM_GPIO4_LOW_IRQ,
> +                FSL_IMX8MM_GPIO4_HIGH_IRQ
> +            },
> +            {
> +                fsl_imx8mm_memmap[FSL_IMX8MM_GPIO5].addr,
> +                FSL_IMX8MM_GPIO5_LOW_IRQ,
> +                FSL_IMX8MM_GPIO5_HIGH_IRQ
> +            },
> +        };
> +        object_property_set_bool(OBJECT(&s->gpio[i]), "has-edge-sel", true,
> +                                 &error_abort);
> +        object_property_set_bool(OBJECT(&s->gpio[i]), "has-upper-pin-irq",
> +                                 true, &error_abort);
> +        if (!sysbus_realize(SYS_BUS_DEVICE(&s->gpio[i]), errp)) {
> +            return;
> +        }
> +
> +        sysbus_mmio_map(SYS_BUS_DEVICE(&s->gpio[i]), 0, gpio_table[i].addr);
> +        sysbus_connect_irq(SYS_BUS_DEVICE(&s->gpio[i]), 0,
> +                           qdev_get_gpio_in(gicdev, gpio_table[i].irq_low));
> +        sysbus_connect_irq(SYS_BUS_DEVICE(&s->gpio[i]), 1,
> +                           qdev_get_gpio_in(gicdev, gpio_table[i].irq_high));
> +    }

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>