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That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Max Filippov writes: > target/xtensa, the only user of NO_SIGNALING_NANS macro has FPU > implementations with and without the corresponding property. With > NO_SIGNALING_NANS being a macro they cannot be a part of the same QEMU > executable. > Replace macro with new property in float_status to allow cores with > different FPU implementations coexist. > > Cc: Peter Maydell > Cc: "Alex Benn=C3=A9e" > Signed-off-by: Max Filippov > --- > fpu/softfloat-specialize.inc.c | 228 ++++++++++++++++---------------- > include/fpu/softfloat-helpers.h | 5 + > include/fpu/softfloat-types.h | 1 + > 3 files changed, 117 insertions(+), 117 deletions(-) > > diff --git a/fpu/softfloat-specialize.inc.c b/fpu/softfloat-specialize.in= c.c > index 44f5b661f831..b26bc039b0b6 100644 > --- a/fpu/softfloat-specialize.inc.c > +++ b/fpu/softfloat-specialize.inc.c > @@ -79,13 +79,6 @@ this code that are retained. > * version 2 or later. See the COPYING file in the top-level directory. > */ >=20=20 > -/* Define for architectures which deviate from IEEE in not supporting > - * signaling NaNs (so all NaNs are treated as quiet). > - */ > -#if defined(TARGET_XTENSA) > -#define NO_SIGNALING_NANS 1 > -#endif > - > /* Define how the architecture discriminates signaling NaNs. > * This done with the most significant bit of the fraction. > * In IEEE 754-1985 this was implementation defined, but in IEEE 754-2008 > @@ -111,12 +104,12 @@ static inline bool snan_bit_is_one(float_status *st= atus) >=20=20 > static bool parts_is_snan_frac(uint64_t frac, float_status *status) > { > -#ifdef NO_SIGNALING_NANS > - return false; > -#else > - bool msb =3D extract64(frac, DECOMPOSED_BINARY_POINT - 1, 1); > - return msb =3D=3D snan_bit_is_one(status); > -#endif > + if (status->no_signaling_nans) { > + return false; I have no objection in principle but seeing as we go to the trouble of allowing snan_bit_is_one() to constant fold away I think it would be worth doing the same with a no_signalling_nans(status). We can then avoid an admittedly well predicted test for the non XTENSA case. > + } else { > + bool msb =3D extract64(frac, DECOMPOSED_BINARY_POINT - 1, 1); > + return msb =3D=3D snan_bit_is_one(status); > + } > } >=20=20 > /*----------------------------------------------------------------------= ------ > @@ -170,9 +163,10 @@ static FloatParts parts_default_nan(float_status *st= atus) >=20=20 > static FloatParts parts_silence_nan(FloatParts a, float_status *status) > { > -#ifdef NO_SIGNALING_NANS > - g_assert_not_reached(); We could then keep the assert: g_assert(!no_signaling_nan(status)) > return status->tininess_before_rounding; > diff --git a/include/fpu/softfloat-types.h b/include/fpu/softfloat-types.h > index 7680193ebc1c..10bd208e559f 100644 > --- a/include/fpu/softfloat-types.h > +++ b/include/fpu/softfloat-types.h > @@ -167,6 +167,7 @@ typedef struct float_status { > bool default_nan_mode; > /* not always used -- see snan_bit_is_one() in > softfloat-specialize.h */ and then expand this comment: /* the flags bellow are not used on all specializations and may * constant fold away (see snan_bit_is_one()/no_signalling_nans() in * softfloat-specialize.h) */ > bool snan_bit_is_one; > + bool no_signaling_nans; > } float_status; >=20=20 > #endif /* SOFTFLOAT_TYPES_H */ --=20 Alex Benn=C3=A9e