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From: Alex =?utf-8?Q?Benn=C3=A9e?= <alex.bennee@linaro.org>
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Date: Fri, 08 Sep 2017 14:10:56 +0100
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Subject: Re: [Qemu-devel] [PATCH 8/8] tcg/i386: Add vector operations
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To: Richard Henderson <richard.henderson@linaro.org>
Cc: qemu-devel@nongnu.org, qemu-arm@nongnu.org


Alex Bennée <alex.bennee@linaro.org> writes:

> Richard Henderson <richard.henderson@linaro.org> writes:
>
>> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
<snip>

Also this commit breaks RISU:

 qemu-aarch64 build/aarch64-linux-gnu/risu
    testcases.aarch64/insn_ANDSi_RES8_ANDS_RES_ANDv_ASRV__INC.risu.bin \
    -t testcases.aarch64/insn_ANDSi_RES8_ANDS_RES_ANDv_ASRV__INC.risu.bin.trace

Gives:

mismatch detail (master : apprentice):
  V29   : 000000000000000005388083c1444242 vs 00000000000000002a000e0416a30018

The insn is:

  37c:       6f56a29d        umull2  v29.4s, v20.8h, v6.h[1]

Which is odd because I didn't think we'd touched that.

You can find my bundle of testcases with trace files at:

  http://people.linaro.org/~alex.bennee/testcases/arm64.risu/aarch64-patterns-v8dot0.tar.xz

Which is used in our master RISU tracking job:

  https://validation.linaro.org/results/query/~alex.bennee/master-aarch64-risu-results

--
Alex Bennée