From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:34383) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1X7Qlb-0001Yd-CM for qemu-devel@nongnu.org; Wed, 16 Jul 2014 11:05:16 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1X7QlV-0008Ku-8K for qemu-devel@nongnu.org; Wed, 16 Jul 2014 11:05:11 -0400 Received: from static.88-198-71-155.clients.your-server.de ([88.198.71.155]:37739 helo=socrates.bennee.com) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1X7QlV-0008H6-3N for qemu-devel@nongnu.org; Wed, 16 Jul 2014 11:05:05 -0400 References: <1405521777-24085-1-git-send-email-aggelerf@ethz.ch> <1405521777-24085-3-git-send-email-aggelerf@ethz.ch> From: Alex =?utf-8?Q?Benn=C3=A9e?= Date: Wed, 16 Jul 2014 16:05:13 +0100 In-reply-to: <1405521777-24085-3-git-send-email-aggelerf@ethz.ch> Message-ID: <871ttl5oo1.fsf@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit Subject: Re: [Qemu-devel] [PATCH 2/2] hw/arm/vexpress: add SP810 to the vexpress List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Fabian Aggeler Cc: peter.maydell@linaro.org, peter.crosthwaite@xilinx.com, qemu-devel@nongnu.org Fabian Aggeler writes: > The SP810, which is present in the Versatile Express motherboards, > allows to set the timing reference to either REFCLK or TIMCLK. > QEMU currently sets the SP804 timer to 1MHz by default. To reflect > this, we set the TimerEn0Sel, TimerEn1Sel, TimerEn2Sel, and > TimerEn3Sel of the system control register (SCCTRL) to TIMCLK (1). > > Signed-off-by: Fabian Aggeler > --- > hw/arm/vexpress.c | 11 +++++++++-- > 1 file changed, 9 insertions(+), 2 deletions(-) > > diff --git a/hw/arm/vexpress.c b/hw/arm/vexpress.c > index a88732c..b96c3fd 100644 > --- a/hw/arm/vexpress.c > +++ b/hw/arm/vexpress.c > @@ -512,7 +512,7 @@ static pflash_t *ve_pflash_cfi01_register(hwaddr base, const char *name, > static void vexpress_common_init(VEDBoardInfo *daughterboard, > MachineState *machine) > { > - DeviceState *dev, *sysctl, *pl041; > + DeviceState *dev, *sysctl, *pl041, *sp810; > qemu_irq pic[64]; > uint32_t sys_id; > DriveInfo *dinfo; > @@ -575,7 +575,14 @@ static void vexpress_common_init(VEDBoardInfo *daughterboard, > qdev_init_nofail(sysctl); > sysbus_mmio_map(SYS_BUS_DEVICE(sysctl), 0, map[VE_SYSREGS]); > > - /* VE_SP810: not modelled */ > + /* VE_SP810 */ > + sp810 = qdev_create(NULL, "arm_sp810"); > + /* SP804 is already running at 1MHz (TIMCLK) so SCCTRL TimerEnXSel=1 */ > + qdev_prop_set_uint32(sp810, "sc-ctrl", (1 << 15) | (1 << 17) > + | (1 << 19) | (1 << 21)); Could the #defines in the first patch be moved into a header and used here rather than manually setting these bits? -- Alex Bennée