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From: Arnaud Patard (Rtp) <arnaud.patard@rtp-net.org>
Subject: Re: [Qemu-devel] [PATCH] fix configure for mips o32
References: <87prdlv6wf.fsf@lechat.rtp-net.org>
	<20090603.082920.514365571.imp@bsdimp.com>
Date: Wed, 03 Jun 2009 17:17:12 +0200
In-Reply-To: <20090603.082920.514365571.imp@bsdimp.com> (M. Warner Losh's
	message of "Wed\, 03 Jun 2009 08\:29\:20 -0600 \(MDT\)")
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To: "M. Warner Losh" <imp@bsdimp.com>
Cc: qemu-devel@nongnu.org

"M. Warner Losh" <imp@bsdimp.com> writes:

> In message: <87prdlv6wf.fsf@lechat.rtp-net.org>
>             Arnaud Patard (Rtp) <arnaud.patard@rtp-net.org> writes:
> : The commit 1ad2134f914dfd4c8f92307c94c9a5a1e28f0059 is defining
> : target_phys_bits and set it to 64 for all mips machines including mipsel
> : machines which are 32 bit. This patch set it to 32.
>
> But R4000PC and R4400PC machines ran in Little Endian mode and had
> 64-bit registers.
>
> It is only the recent mips32 and mips32r2 machines that have 32-bit
> registers...

I'm sorry but I don't get your point. Qemu should work on all cpu. 4Kc &
friends are currently supports (according to the -M switch) and iirc
theses beasts have 32bit address path not 64. I really fear that setting
64 will break them. That's why I've sent this patch. If keeping 64bit
breaks 4Kc and if switching to 32 break r4k, an other solution will have
to be found imho


Arnaud