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Mon, 06 May 2024 03:02:35 -0700 (PDT) Received: from draig (localhost [IPv6:::1]) by draig.lan (Postfix) with ESMTP id 583F45F8B5; Mon, 6 May 2024 11:02:34 +0100 (BST) From: =?utf-8?Q?Alex_Benn=C3=A9e?= To: Andrey Shumilin Cc: Michael Tokarev , qemu-devel@nongnu.org, sdl.qemu@linuxtesting.org Subject: Re: [sdl-qemu] [PATCH v1] /hw/intc/arm_gic WRONG ARGUMENTS In-Reply-To: <4c4dfebb-698d-466f-90b0-9475ad4c123a@nppct.ru> (Andrey Shumilin's message of "Sun, 5 May 2024 22:57:41 +0300") References: <95ab6dcf-cc96-4472-93ab-f08682b37d5e@tls.msk.ru> <4c4dfebb-698d-466f-90b0-9475ad4c123a@nppct.ru> Date: Mon, 06 May 2024 11:02:34 +0100 Message-ID: <8734qvuukl.fsf@draig.linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Received-SPF: pass client-ip=2a00:1450:4864:20::136; envelope-from=alex.bennee@linaro.org; helo=mail-lf1-x136.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Andrey Shumilin writes: > 1 Possibly mismatched call arguments in function 'gic_apr_ns_view': 'cpu'= and 'regno' passed in place of 'int regno' and 'int > cpu'. > 2 Possibly mismatched call arguments in function 'gic_apr_write_ns_view':= 'cpu' and 'regno' passed in place of 'int regno' and > 'int cpu'. > > Found by Linux Verification Center (linuxtesting.org) with SVACE. So this purely a heuristic test based on the parameter names? > > From 23b142f5046ba9d3aec57217f6d8f3127f9bff69 Mon Sep 17 00:00:00 2001 > From: Andrey Shumilin > Date: Sun, 5 May 2024 20:13:40 +0300 > Subject: [PATCH] Patch hw/intc/arm_gic.c > > Signed-off-by: Andrey Shumilin > --- > hw/intc/arm_gic.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/hw/intc/arm_gic.c b/hw/intc/arm_gic.c > index 7a34bc0998..47f01e45e3 100644 > --- a/hw/intc/arm_gic.c > +++ b/hw/intc/arm_gic.c > @@ -1658,7 +1658,7 @@ static MemTxResult gic_cpu_read(GICState *s, int cp= u, int offset, > *data =3D s->h_apr[gic_get_vcpu_real_id(cpu)]; > } else if (gic_cpu_ns_access(s, cpu, attrs)) { > /* NS view of GICC_APR is the top half of GIC_NSAPR */ > - *data =3D gic_apr_ns_view(s, regno, cpu); > + *data =3D gic_apr_ns_view(s, cpu, regno); > } else { > *data =3D s->apr[regno][cpu]; > } > @@ -1746,7 +1746,7 @@ static MemTxResult gic_cpu_write(GICState *s, int c= pu, int offset, > s->h_apr[gic_get_vcpu_real_id(cpu)] =3D value; > } else if (gic_cpu_ns_access(s, cpu, attrs)) { > /* NS view of GICC_APR is the top half of GIC_NSAPR */ > - gic_apr_write_ns_view(s, regno, cpu, value); > + gic_apr_write_ns_view(s, cpu, regno, value); > } else { > s->apr[regno][cpu] =3D value; > } Ahh C's lack of strong typing wins again :-/ Reviewed-by: Alex Benn=C3=A9e --=20 Alex Benn=C3=A9e Virtualisation Tech Lead @ Linaro