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That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-devel Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Max Filippov writes: > On Tue, Jul 7, 2020 at 4:31 AM Alex Benn=C3=A9e = wrote: >> I've only looked at the softfloat bits as I'm not familiar with xtensa > > Thanks for taking a look! > >> at all. However you can have a vague: >> >> Tested-by: Alex Benn=C3=A9e >> >> for the series - congratulations you pass your own tests ;-) > > Unless you've built toolchains for the newly added cores and > run the tests on these cores it only means that new tests are > properly disabled for the cores without FPU/DFPU. I'll > take it as an independent build test (: Well it ran some xtensa tests thanks to the docker cross compiler support. Do you know what toolchains we need? Currently we have the following: ENV CPU_LIST csp dc232b dc233c ENV TOOLCHAIN_RELEASE 2018.02 RUN for cpu in $CPU_LIST; do \ curl -#SL http://github.com/foss-xtensa/toolchain/releases/downlo= ad/$TOOLCHAIN_RELEASE/x86_64-$TOOLCHAIN_RELEASE-xtensa-$cpu-elf.tar.gz \ | tar -xzC /opt; \ done ENV PATH $PATH:/opt/$TOOLCHAIN_RELEASE/xtensa-dc232b-elf/bin:/opt/$TOOLCH= AIN_RELEASE/xtensa-dc233c-elf/bin:/opt/$TOOLCHAIN_RELEASE/xtensa-csp-elf/bin --=20 Alex Benn=C3=A9e