From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:35196) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aiQKg-000496-Gd for qemu-devel@nongnu.org; Tue, 22 Mar 2016 13:43:07 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1aiQKc-0007XV-DJ for qemu-devel@nongnu.org; Tue, 22 Mar 2016 13:43:06 -0400 Received: from mail-wm0-x231.google.com ([2a00:1450:400c:c09::231]:35044) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aiQKc-0007XQ-6J for qemu-devel@nongnu.org; Tue, 22 Mar 2016 13:43:02 -0400 Received: by mail-wm0-x231.google.com with SMTP id l68so163852794wml.0 for ; Tue, 22 Mar 2016 10:43:01 -0700 (PDT) References: From: Alex =?utf-8?Q?Benn=C3=A9e?= In-reply-to: Date: Tue, 22 Mar 2016 17:42:56 +0000 Message-ID: <8737ris927.fsf@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit Subject: Re: [Qemu-devel] [PATCH v5 04/15] register: Add support for decoding information List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Alistair Francis Cc: edgar.iglesias@xilinx.com, peter.maydell@linaro.org, qemu-devel@nongnu.org, crosthwaitepeter@gmail.com, edgar.iglesias@gmail.com, afaerber@suse.de, fred.konrad@greensocs.com Alistair Francis writes: > Allow defining of optional address decoding information in register > definitions. This is useful for clients that want to associate > registers with specific addresses. > > Signed-off-by: Peter Crosthwaite > Signed-off-by: Alistair Francis > --- > V3: > - Remove unused flags option > > include/hw/register.h | 5 +++++ > 1 file changed, 5 insertions(+) > > diff --git a/include/hw/register.h b/include/hw/register.h > index 726a914..bc2c96a 100644 > --- a/include/hw/register.h > +++ b/include/hw/register.h > @@ -39,6 +39,11 @@ typedef struct RegisterInfoArray RegisterInfoArray; > * allowing this function to modify the value before return to the client. > */ > > +#define REG_DECODE_READ (1 << 0) > +#define REG_DECODE_WRITE (1 << 1) > +#define REG_DECODE_EXECUTE (1 << 2) > +#define REG_DECODE_RW (REG_DECODE_READ | REG_DECODE_WRITE) > + > struct RegisterAccessInfo { > const char *name; > uint64_t ro; Without any other context I'm unsure of how these defines are going to be used. Are these just bits at the bottom of an address? Nothing in this patch series uses them so I suggest you drop this patch for now. -- Alex Bennée