[Qemu-devel] [PULL] QOM CPUState patch queue 2012-10-31

[Qemu-devel] [PULL] QOM CPUState patch queue 2012-10-31

[Andreas Färber]

Hello Anthony,

This is my current QOM CPUState queue. Please pull.

This completes Igor's first step of x86 CPU hotplug roadmap:
http://wiki.qemu.org/Features/CPUHotplug
CPU-as-a-device is still under review and blocking CPU properties/subclasses;
I hope to get that in during the Soft Freeze if no problems arise.

Cc: Igor Mammedov <imammedo@redhat.com>
Cc: Eduardo Habkost <ehabkost@redhat.com>
Cc: Don Slutz <don@cloudswitch.com>

With Blue and Aurélien having applied sparc/mips prerequisites, I'm including:
* CPUState part 4a series (CPU_COMMON -> CPUState field movements),
* remaining xtensa and ppc prerequisites,
* as well as the remainder of original CPUState part 4 series
  except for the final bit depending on TLB rework.

Cc: Max Filippov <jcmvbkbc@gmail.com>
Cc: Alexander Graf <agraf@suse.de>

Regards,
Andreas


The following changes since commit aee0bf7d8d7564f8f2c40e4501695c492b7dd8d1:

  tap-win32: stubs to fix win32 build (2012-10-30 19:18:53 +0000)

are available in the git repository at:

  git://github.com/afaerber/qemu-cpu.git qom-cpu

for you to fetch changes up to 78585fedbd53b3629150bcf8ab4c9ff32d832460:

  target-i386: Pass X86CPU to kvm_handle_halt() (2012-10-31 01:02:46 +0100)

----------------------------------------------------------------
Andreas Färber (32):
      target-i386: Inline APIC cpu_env property setting
      apic: Store X86CPU in APICCommonState
      target-i386: Pass X86CPU to cpu_x86_load_seg_cache_sipi()
      cpus: Pass CPUState to qemu_cpu_is_self()
      cpus: Pass CPUState to qemu_cpu_kick_thread()
      cpu: Move created field to CPUState
      cpu: Move stop field to CPUState
      ppce500_spin: Store PowerPCCPU in SpinKick
      cpu: Move stopped field to CPUState
      cpus: Pass CPUState to cpu_is_stopped()
      cpus: Pass CPUState to cpu_can_run()
      cpu: Move halt_cond to CPUState
      cpus: Pass CPUState to qemu_tcg_cpu_thread_fn
      cpus: Pass CPUState to qemu_tcg_init_vcpu()
      ppc: Pass PowerPCCPU to {ppc6xx,ppc970,power7,ppc40x,ppce500}_set_irq()
      target-ppc: Rename kvm_kick_{env => cpu} and pass PowerPCCPU
      cpus: Pass CPUState to qemu_cpu_kick()
      cpu: Move queued_work_{first,last} to CPUState
      cpus: Pass CPUState to flush_queued_work()
      cpus: Pass CPUState to qemu_wait_io_event_common()
      xtensa_pic: Pass XtensaCPU to xtensa_ccompare_cb()
      target-ppc: Pass PowerPCCPU to powerpc_excp()
      target-ppc: Pass PowerPCCPU to cpu_ppc_hypercall
      spapr: Pass PowerPCCPU to spapr_hypercall()
      spapr: Pass PowerPCCPU to hypercalls
      cpus: Pass CPUState to [qemu_]cpu_has_work()
      target-i386: Pass X86CPU to kvm_mce_inject()
      target-i386: Pass X86CPU to cpu_x86_inject_mce()
      cpus: Pass CPUState to run_on_cpu()
      cpu: Move thread_id to CPUState
      target-i386: Pass X86CPU to kvm_get_mp_state()
      target-i386: Pass X86CPU to kvm_handle_halt()

Igor Mammedov (3):
      target-i386: cpu_x86_register(): report error from property setter
      target-i386: If x86_cpu_realize() failed, report error and do cleanup
      target-i386: Initialize APIC at CPU level

 cpu-all.h                |    4 -
 cpu-defs.h               |    6 --
 cpu-exec.c               |    8 +-
 cpus.c                   |  193 +++++++++++++++++++++++-----------------------
 exec.c                   |   10 ++-
 hw/apic.c                |   40 ++++++----
 hw/apic_common.c         |    5 +-
 hw/apic_internal.h       |    3 +-
 hw/kvm/apic.c            |    8 +-
 hw/kvmvapic.c            |    6 +-
 hw/pc.c                  |   56 ++------------
 hw/ppc.c                 |   59 ++++++++------
 hw/ppce500_spin.c        |   13 ++--
 hw/spapr.c               |    6 +-
 hw/spapr.h               |    4 +-
 hw/spapr_hcall.c         |   40 ++++++----
 hw/spapr_iommu.c         |    2 +-
 hw/spapr_llan.c          |   10 +--
 hw/spapr_rtas.c          |    5 +-
 hw/spapr_vio.c           |   10 +--
 hw/spapr_vty.c           |    4 +-
 hw/sun4m.c               |    2 +-
 hw/sun4u.c               |    2 +-
 hw/xics.c                |   11 ++-
 hw/xtensa_pic.c          |    9 ++-
 include/qemu/cpu.h       |   58 ++++++++++++++
 kvm-all.c                |   13 +++-
 monitor.c                |    6 +-
 qemu-common.h            |    2 -
 target-alpha/cpu.c       |    2 +-
 target-alpha/cpu.h       |    4 +-
 target-arm/cpu.h         |    4 +-
 target-cris/cpu.h        |    4 +-
 target-i386/cpu.c        |   63 ++++++++++++++-
 target-i386/cpu.h        |   10 ++-
 target-i386/helper.c     |   16 ++--
 target-i386/kvm.c        |   28 ++++---
 target-lm32/cpu.h        |    4 +-
 target-m68k/cpu.h        |    4 +-
 target-microblaze/cpu.h  |    4 +-
 target-mips/cpu.h        |   11 +--
 target-openrisc/cpu.h    |    4 +-
 target-ppc/cpu.h         |    6 +-
 target-ppc/excp_helper.c |   40 +++++-----
 target-ppc/kvm.c         |   12 ++-
 target-s390x/cpu.h       |    4 +-
 target-s390x/kvm.c       |    2 +-
 target-sh4/cpu.h         |    4 +-
 target-sparc/cpu.h       |    4 +-
 target-unicore32/cpu.c   |    2 +-
 target-unicore32/cpu.h   |    4 +-
 target-xtensa/cpu.h      |    4 +-
 52 Dateien geändert, 501 Zeilen hinzugefügt(+), 334 Zeilen entfernt(-)

[Qemu-devel] [PATCH 01/35] target-i386: cpu_x86_register(): report error from property setter

[Andreas Färber]

From: Igor Mammedov <imammedo@redhat.com>

Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Eduardo Habkost <ehabkost@redhat.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 target-i386/cpu.c |    3 ++-
 1 Datei geändert, 2 Zeilen hinzugefügt(+), 1 Zeile entfernt(-)

diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index d4f2e65..f3a3121 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -1427,7 +1427,8 @@ int cpu_x86_register(X86CPU *cpu, const char *cpu_model)
         env->cpuid_svm_features &= TCG_SVM_FEATURES;
     }
     object_property_set_str(OBJECT(cpu), def->model_id, "model-id", &error);
-    if (error_is_set(&error)) {
+    if (error) {
+        fprintf(stderr, "%s\n", error_get_pretty(error));
         error_free(error);
         return -1;
     }
-- 
1.7.10.4

[Qemu-devel] [PATCH 02/35] target-i386: If x86_cpu_realize() failed, report error and do cleanup

[Andreas Färber]

From: Igor Mammedov <imammedo@redhat.com>

Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 target-i386/helper.c |    9 +++++++--
 1 Datei geändert, 7 Zeilen hinzugefügt(+), 2 Zeilen entfernt(-)

diff --git a/target-i386/helper.c b/target-i386/helper.c
index c5d42c5..0424ccf 100644
--- a/target-i386/helper.c
+++ b/target-i386/helper.c
@@ -1243,6 +1243,7 @@ X86CPU *cpu_x86_init(const char *cpu_model)
 {
     X86CPU *cpu;
     CPUX86State *env;
+    Error *error = NULL;
 
     cpu = X86_CPU(object_new(TYPE_X86_CPU));
     env = &cpu->env;
@@ -1253,8 +1254,12 @@ X86CPU *cpu_x86_init(const char *cpu_model)
         return NULL;
     }
 
-    x86_cpu_realize(OBJECT(cpu), NULL);
-
+    x86_cpu_realize(OBJECT(cpu), &error);
+    if (error) {
+        error_free(error);
+        object_delete(OBJECT(cpu));
+        return NULL;
+    }
     return cpu;
 }
 
-- 
1.7.10.4

[Qemu-devel] [PATCH 03/35] target-i386: Initialize APIC at CPU level

[Andreas Färber]

From: Igor Mammedov <imammedo@redhat.com>

(L)APIC is a part of cpu [1] so move APIC initialization inside of
x86_cpu object. Since cpu_model and override flags currently specify
whether APIC should be created or not, APIC creation&initialization is
moved into x86_cpu_apic_init() which is called from x86_cpu_realize().

[1] - all x86 cpus have integrated APIC if we overlook existence of i486,
and it's more convenient to model after majority of them.

Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 hw/pc.c           |   56 +++++-----------------------------------------------
 target-i386/cpu.c |   57 +++++++++++++++++++++++++++++++++++++++++++++++++++++
 2 Dateien geändert, 62 Zeilen hinzugefügt(+), 51 Zeilen entfernt(-)

diff --git a/hw/pc.c b/hw/pc.c
index a02b397..4aca498 100644
--- a/hw/pc.c
+++ b/hw/pc.c
@@ -71,8 +71,6 @@
 #define FW_CFG_E820_TABLE (FW_CFG_ARCH_LOCAL + 3)
 #define FW_CFG_HPET (FW_CFG_ARCH_LOCAL + 4)
 
-#define MSI_ADDR_BASE 0xfee00000
-
 #define E820_NR_ENTRIES		16
 
 struct e820_entry {
@@ -849,35 +847,6 @@ DeviceState *cpu_get_current_apic(void)
     }
 }
 
-static DeviceState *apic_init(void *env, uint8_t apic_id)
-{
-    DeviceState *dev;
-    static int apic_mapped;
-
-    if (kvm_irqchip_in_kernel()) {
-        dev = qdev_create(NULL, "kvm-apic");
-    } else if (xen_enabled()) {
-        dev = qdev_create(NULL, "xen-apic");
-    } else {
-        dev = qdev_create(NULL, "apic");
-    }
-
-    qdev_prop_set_uint8(dev, "id", apic_id);
-    qdev_prop_set_ptr(dev, "cpu_env", env);
-    qdev_init_nofail(dev);
-
-    /* XXX: mapping more APICs at the same memory location */
-    if (apic_mapped == 0) {
-        /* NOTE: the APIC is directly connected to the CPU - it is not
-           on the global memory bus. */
-        /* XXX: what if the base changes? */
-        sysbus_mmio_map(sysbus_from_qdev(dev), 0, MSI_ADDR_BASE);
-        apic_mapped = 1;
-    }
-
-    return dev;
-}
-
 void pc_acpi_smi_interrupt(void *opaque, int irq, int level)
 {
     CPUX86State *s = opaque;
@@ -887,24 +856,6 @@ void pc_acpi_smi_interrupt(void *opaque, int irq, int level)
     }
 }
 
-static X86CPU *pc_new_cpu(const char *cpu_model)
-{
-    X86CPU *cpu;
-    CPUX86State *env;
-
-    cpu = cpu_x86_init(cpu_model);
-    if (cpu == NULL) {
-        fprintf(stderr, "Unable to find x86 CPU definition\n");
-        exit(1);
-    }
-    env = &cpu->env;
-    if ((env->cpuid_features & CPUID_APIC) || smp_cpus > 1) {
-        env->apic_state = apic_init(env, env->cpuid_apic_id);
-    }
-    cpu_reset(CPU(cpu));
-    return cpu;
-}
-
 void pc_cpus_init(const char *cpu_model)
 {
     int i;
@@ -918,8 +869,11 @@ void pc_cpus_init(const char *cpu_model)
 #endif
     }
 
-    for(i = 0; i < smp_cpus; i++) {
-        pc_new_cpu(cpu_model);
+    for (i = 0; i < smp_cpus; i++) {
+        if (!cpu_x86_init(cpu_model)) {
+            fprintf(stderr, "Unable to find x86 CPU definition\n");
+            exit(1);
+        }
     }
 }
 
diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index f3a3121..18b8549 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -37,6 +37,12 @@
 #include <linux/kvm_para.h>
 #endif
 
+#include "sysemu.h"
+#ifndef CONFIG_USER_ONLY
+#include "hw/xen.h"
+#include "hw/sysbus.h"
+#endif
+
 /* feature flags taken from "Intel Processor Identification and the CPUID
  * Instruction" and AMD's "CPUID Specification".  In cases of disagreement
  * between feature naming conventions, aliases may be added.
@@ -1879,12 +1885,63 @@ static void mce_init(X86CPU *cpu)
     }
 }
 
+#define MSI_ADDR_BASE 0xfee00000
+
+#ifndef CONFIG_USER_ONLY
+static void x86_cpu_apic_init(X86CPU *cpu, Error **errp)
+{
+    static int apic_mapped;
+    CPUX86State *env = &cpu->env;
+    const char *apic_type = "apic";
+
+    if (kvm_irqchip_in_kernel()) {
+        apic_type = "kvm-apic";
+    } else if (xen_enabled()) {
+        apic_type = "xen-apic";
+    }
+
+    env->apic_state = qdev_try_create(NULL, apic_type);
+    if (env->apic_state == NULL) {
+        error_setg(errp, "APIC device '%s' could not be created", apic_type);
+        return;
+    }
+
+    object_property_add_child(OBJECT(cpu), "apic",
+                              OBJECT(env->apic_state), NULL);
+    qdev_prop_set_uint8(env->apic_state, "id", env->cpuid_apic_id);
+    /* TODO: convert to link<> */
+    qdev_prop_set_ptr(env->apic_state, "cpu_env", env);
+
+    if (qdev_init(env->apic_state)) {
+        error_setg(errp, "APIC device '%s' could not be initialized",
+                   object_get_typename(OBJECT(env->apic_state)));
+        return;
+    }
+
+    /* XXX: mapping more APICs at the same memory location */
+    if (apic_mapped == 0) {
+        /* NOTE: the APIC is directly connected to the CPU - it is not
+           on the global memory bus. */
+        /* XXX: what if the base changes? */
+        sysbus_mmio_map(sysbus_from_qdev(env->apic_state), 0, MSI_ADDR_BASE);
+        apic_mapped = 1;
+    }
+}
+#endif
+
 void x86_cpu_realize(Object *obj, Error **errp)
 {
     X86CPU *cpu = X86_CPU(obj);
 
 #ifndef CONFIG_USER_ONLY
     qemu_register_reset(x86_cpu_machine_reset_cb, cpu);
+
+    if (cpu->env.cpuid_features & CPUID_APIC || smp_cpus > 1) {
+        x86_cpu_apic_init(cpu, errp);
+        if (error_is_set(errp)) {
+            return;
+        }
+    }
 #endif
 
     mce_init(cpu);
-- 
1.7.10.4

[Qemu-devel] [PATCH 04/35] target-i386: Inline APIC cpu_env property setting

[Andreas Färber]

This prepares for changing the variable type from void*.

Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
---
 hw/apic_common.c  |    1 -
 target-i386/cpu.c |    5 ++++-
 2 Dateien geändert, 4 Zeilen hinzugefügt(+), 2 Zeilen entfernt(-)

diff --git a/hw/apic_common.c b/hw/apic_common.c
index d68116d..b13f23c 100644
--- a/hw/apic_common.c
+++ b/hw/apic_common.c
@@ -368,7 +368,6 @@ static const VMStateDescription vmstate_apic_common = {
 
 static Property apic_properties_common[] = {
     DEFINE_PROP_UINT8("id", APICCommonState, id, -1),
-    DEFINE_PROP_PTR("cpu_env", APICCommonState, cpu_env),
     DEFINE_PROP_BIT("vapic", APICCommonState, vapic_control, VAPIC_ENABLE_BIT,
                     true),
     DEFINE_PROP_END_OF_LIST(),
diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index 18b8549..c30cc79 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -41,6 +41,7 @@
 #ifndef CONFIG_USER_ONLY
 #include "hw/xen.h"
 #include "hw/sysbus.h"
+#include "hw/apic_internal.h"
 #endif
 
 /* feature flags taken from "Intel Processor Identification and the CPUID
@@ -1892,6 +1893,7 @@ static void x86_cpu_apic_init(X86CPU *cpu, Error **errp)
 {
     static int apic_mapped;
     CPUX86State *env = &cpu->env;
+    APICCommonState *apic;
     const char *apic_type = "apic";
 
     if (kvm_irqchip_in_kernel()) {
@@ -1910,7 +1912,8 @@ static void x86_cpu_apic_init(X86CPU *cpu, Error **errp)
                               OBJECT(env->apic_state), NULL);
     qdev_prop_set_uint8(env->apic_state, "id", env->cpuid_apic_id);
     /* TODO: convert to link<> */
-    qdev_prop_set_ptr(env->apic_state, "cpu_env", env);
+    apic = APIC_COMMON(env->apic_state);
+    apic->cpu_env = env;
 
     if (qdev_init(env->apic_state)) {
         error_setg(errp, "APIC device '%s' could not be initialized",
-- 
1.7.10.4

[Qemu-devel] [PATCH 05/35] apic: Store X86CPU in APICCommonState

[Andreas Färber]

Prepares for using a link<> property to connect APIC with CPU and for
changing the CPU APIs to CPUState.

Resolve Coding Style warnings by moving the closing parenthesis of
foreach_apic() macro to next line.

Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
---
 hw/apic.c          |   38 +++++++++++++++++++++-----------------
 hw/apic_common.c   |    4 ++--
 hw/apic_internal.h |    3 ++-
 hw/kvm/apic.c      |    8 ++++----
 target-i386/cpu.c  |    2 +-
 5 Dateien geändert, 30 Zeilen hinzugefügt(+), 25 Zeilen entfernt(-)

diff --git a/hw/apic.c b/hw/apic.c
index 49f0015..99e84f9 100644
--- a/hw/apic.c
+++ b/hw/apic.c
@@ -107,7 +107,7 @@ static void apic_sync_vapic(APICCommonState *s, int sync_type)
         length = offsetof(VAPICState, enabled) - offsetof(VAPICState, isr);
 
         if (sync_type & SYNC_TO_VAPIC) {
-            assert(qemu_cpu_is_self(s->cpu_env));
+            assert(qemu_cpu_is_self(&s->cpu->env));
 
             vapic_state.tpr = s->tpr;
             vapic_state.enabled = 1;
@@ -151,15 +151,15 @@ static void apic_local_deliver(APICCommonState *s, int vector)
 
     switch ((lvt >> 8) & 7) {
     case APIC_DM_SMI:
-        cpu_interrupt(s->cpu_env, CPU_INTERRUPT_SMI);
+        cpu_interrupt(&s->cpu->env, CPU_INTERRUPT_SMI);
         break;
 
     case APIC_DM_NMI:
-        cpu_interrupt(s->cpu_env, CPU_INTERRUPT_NMI);
+        cpu_interrupt(&s->cpu->env, CPU_INTERRUPT_NMI);
         break;
 
     case APIC_DM_EXTINT:
-        cpu_interrupt(s->cpu_env, CPU_INTERRUPT_HARD);
+        cpu_interrupt(&s->cpu->env, CPU_INTERRUPT_HARD);
         break;
 
     case APIC_DM_FIXED:
@@ -187,7 +187,7 @@ void apic_deliver_pic_intr(DeviceState *d, int level)
             reset_bit(s->irr, lvt & 0xff);
             /* fall through */
         case APIC_DM_EXTINT:
-            cpu_reset_interrupt(s->cpu_env, CPU_INTERRUPT_HARD);
+            cpu_reset_interrupt(&s->cpu->env, CPU_INTERRUPT_HARD);
             break;
         }
     }
@@ -248,18 +248,22 @@ static void apic_bus_deliver(const uint32_t *deliver_bitmask,
 
         case APIC_DM_SMI:
             foreach_apic(apic_iter, deliver_bitmask,
-                cpu_interrupt(apic_iter->cpu_env, CPU_INTERRUPT_SMI) );
+                cpu_interrupt(&apic_iter->cpu->env, CPU_INTERRUPT_SMI)
+            );
             return;
 
         case APIC_DM_NMI:
             foreach_apic(apic_iter, deliver_bitmask,
-                cpu_interrupt(apic_iter->cpu_env, CPU_INTERRUPT_NMI) );
+                cpu_interrupt(&apic_iter->cpu->env, CPU_INTERRUPT_NMI)
+            );
             return;
 
         case APIC_DM_INIT:
             /* normal INIT IPI sent to processors */
             foreach_apic(apic_iter, deliver_bitmask,
-                         cpu_interrupt(apic_iter->cpu_env, CPU_INTERRUPT_INIT) );
+                         cpu_interrupt(&apic_iter->cpu->env,
+                                       CPU_INTERRUPT_INIT)
+            );
             return;
 
         case APIC_DM_EXTINT:
@@ -293,7 +297,7 @@ static void apic_set_base(APICCommonState *s, uint64_t val)
     /* if disabled, cannot be enabled again */
     if (!(val & MSR_IA32_APICBASE_ENABLE)) {
         s->apicbase &= ~MSR_IA32_APICBASE_ENABLE;
-        cpu_clear_apic_feature(s->cpu_env);
+        cpu_clear_apic_feature(&s->cpu->env);
         s->spurious_vec &= ~APIC_SV_ENABLE;
     }
 }
@@ -362,10 +366,10 @@ static void apic_update_irq(APICCommonState *s)
     if (!(s->spurious_vec & APIC_SV_ENABLE)) {
         return;
     }
-    if (!qemu_cpu_is_self(s->cpu_env)) {
-        cpu_interrupt(s->cpu_env, CPU_INTERRUPT_POLL);
+    if (!qemu_cpu_is_self(&s->cpu->env)) {
+        cpu_interrupt(&s->cpu->env, CPU_INTERRUPT_POLL);
     } else if (apic_irq_pending(s) > 0) {
-        cpu_interrupt(s->cpu_env, CPU_INTERRUPT_HARD);
+        cpu_interrupt(&s->cpu->env, CPU_INTERRUPT_HARD);
     }
 }
 
@@ -472,18 +476,18 @@ static void apic_get_delivery_bitmask(uint32_t *deliver_bitmask,
 static void apic_startup(APICCommonState *s, int vector_num)
 {
     s->sipi_vector = vector_num;
-    cpu_interrupt(s->cpu_env, CPU_INTERRUPT_SIPI);
+    cpu_interrupt(&s->cpu->env, CPU_INTERRUPT_SIPI);
 }
 
 void apic_sipi(DeviceState *d)
 {
     APICCommonState *s = DO_UPCAST(APICCommonState, busdev.qdev, d);
 
-    cpu_reset_interrupt(s->cpu_env, CPU_INTERRUPT_SIPI);
+    cpu_reset_interrupt(&s->cpu->env, CPU_INTERRUPT_SIPI);
 
     if (!s->wait_for_sipi)
         return;
-    cpu_x86_load_seg_cache_sipi(s->cpu_env, s->sipi_vector);
+    cpu_x86_load_seg_cache_sipi(&s->cpu->env, s->sipi_vector);
     s->wait_for_sipi = 0;
 }
 
@@ -672,7 +676,7 @@ static uint32_t apic_mem_readl(void *opaque, hwaddr addr)
     case 0x08:
         apic_sync_vapic(s, SYNC_FROM_VAPIC);
         if (apic_report_tpr_access) {
-            cpu_report_tpr_access(s->cpu_env, TPR_ACCESS_READ);
+            cpu_report_tpr_access(&s->cpu->env, TPR_ACCESS_READ);
         }
         val = s->tpr;
         break;
@@ -774,7 +778,7 @@ static void apic_mem_writel(void *opaque, hwaddr addr, uint32_t val)
         break;
     case 0x08:
         if (apic_report_tpr_access) {
-            cpu_report_tpr_access(s->cpu_env, TPR_ACCESS_WRITE);
+            cpu_report_tpr_access(&s->cpu->env, TPR_ACCESS_WRITE);
         }
         s->tpr = val;
         apic_sync_vapic(s, SYNC_TO_VAPIC);
diff --git a/hw/apic_common.c b/hw/apic_common.c
index b13f23c..5f54276 100644
--- a/hw/apic_common.c
+++ b/hw/apic_common.c
@@ -103,7 +103,7 @@ void apic_handle_tpr_access_report(DeviceState *d, target_ulong ip,
 {
     APICCommonState *s = DO_UPCAST(APICCommonState, busdev.qdev, d);
 
-    vapic_report_tpr_access(s->vapic, s->cpu_env, ip, access);
+    vapic_report_tpr_access(s->vapic, &s->cpu->env, ip, access);
 }
 
 void apic_report_irq_delivered(int delivered)
@@ -217,7 +217,7 @@ static void apic_reset_common(DeviceState *d)
     APICCommonClass *info = APIC_COMMON_GET_CLASS(s);
     bool bsp;
 
-    bsp = cpu_is_bsp(x86_env_get_cpu(s->cpu_env));
+    bsp = cpu_is_bsp(s->cpu);
     s->apicbase = 0xfee00000 |
         (bsp ? MSR_IA32_APICBASE_BSP : 0) | MSR_IA32_APICBASE_ENABLE;
 
diff --git a/hw/apic_internal.h b/hw/apic_internal.h
index 30932a3..79e2de2 100644
--- a/hw/apic_internal.h
+++ b/hw/apic_internal.h
@@ -95,8 +95,9 @@ typedef struct APICCommonClass
 
 struct APICCommonState {
     SysBusDevice busdev;
+
     MemoryRegion io_memory;
-    void *cpu_env;
+    X86CPU *cpu;
     uint32_t apicbase;
     uint8_t id;
     uint8_t arb_id;
diff --git a/hw/kvm/apic.c b/hw/kvm/apic.c
index dbac7ff..e4a7307 100644
--- a/hw/kvm/apic.c
+++ b/hw/kvm/apic.c
@@ -104,7 +104,7 @@ static void kvm_apic_enable_tpr_reporting(APICCommonState *s, bool enable)
         .enabled = enable
     };
 
-    kvm_vcpu_ioctl(s->cpu_env, KVM_TPR_ACCESS_REPORTING, &ctl);
+    kvm_vcpu_ioctl(&s->cpu->env, KVM_TPR_ACCESS_REPORTING, &ctl);
 }
 
 static void kvm_apic_vapic_base_update(APICCommonState *s)
@@ -114,7 +114,7 @@ static void kvm_apic_vapic_base_update(APICCommonState *s)
     };
     int ret;
 
-    ret = kvm_vcpu_ioctl(s->cpu_env, KVM_SET_VAPIC_ADDR, &vapid_addr);
+    ret = kvm_vcpu_ioctl(&s->cpu->env, KVM_SET_VAPIC_ADDR, &vapid_addr);
     if (ret < 0) {
         fprintf(stderr, "KVM: setting VAPIC address failed (%s)\n",
                 strerror(-ret));
@@ -125,7 +125,7 @@ static void kvm_apic_vapic_base_update(APICCommonState *s)
 static void do_inject_external_nmi(void *data)
 {
     APICCommonState *s = data;
-    CPUX86State *env = s->cpu_env;
+    CPUX86State *env = &s->cpu->env;
     uint32_t lvt;
     int ret;
 
@@ -143,7 +143,7 @@ static void do_inject_external_nmi(void *data)
 
 static void kvm_apic_external_nmi(APICCommonState *s)
 {
-    run_on_cpu(s->cpu_env, do_inject_external_nmi, s);
+    run_on_cpu(&s->cpu->env, do_inject_external_nmi, s);
 }
 
 static uint64_t kvm_apic_mem_read(void *opaque, hwaddr addr,
diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index c30cc79..156e919 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -1913,7 +1913,7 @@ static void x86_cpu_apic_init(X86CPU *cpu, Error **errp)
     qdev_prop_set_uint8(env->apic_state, "id", env->cpuid_apic_id);
     /* TODO: convert to link<> */
     apic = APIC_COMMON(env->apic_state);
-    apic->cpu_env = env;
+    apic->cpu = cpu;
 
     if (qdev_init(env->apic_state)) {
         error_setg(errp, "APIC device '%s' could not be initialized",
-- 
1.7.10.4

[Qemu-devel] [PATCH 06/35] target-i386: Pass X86CPU to cpu_x86_load_seg_cache_sipi()

[Andreas Färber]

Simplifies the call in apic_sipi() again and needed for moving halted
field to CPUState.

Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
---
 hw/apic.c         |    2 +-
 target-i386/cpu.h |    4 +++-
 2 Dateien geändert, 4 Zeilen hinzugefügt(+), 2 Zeilen entfernt(-)

diff --git a/hw/apic.c b/hw/apic.c
index 99e84f9..4bc14e0 100644
--- a/hw/apic.c
+++ b/hw/apic.c
@@ -487,7 +487,7 @@ void apic_sipi(DeviceState *d)
 
     if (!s->wait_for_sipi)
         return;
-    cpu_x86_load_seg_cache_sipi(&s->cpu->env, s->sipi_vector);
+    cpu_x86_load_seg_cache_sipi(s->cpu, s->sipi_vector);
     s->wait_for_sipi = 0;
 }
 
diff --git a/target-i386/cpu.h b/target-i386/cpu.h
index de33303..d840914 100644
--- a/target-i386/cpu.h
+++ b/target-i386/cpu.h
@@ -907,9 +907,11 @@ static inline void cpu_x86_load_seg_cache(CPUX86State *env,
     }
 }
 
-static inline void cpu_x86_load_seg_cache_sipi(CPUX86State *env,
+static inline void cpu_x86_load_seg_cache_sipi(X86CPU *cpu,
                                                int sipi_vector)
 {
+    CPUX86State *env = &cpu->env;
+
     env->eip = 0;
     cpu_x86_load_seg_cache(env, R_CS, sipi_vector << 8,
                            sipi_vector << 12,
-- 
1.7.10.4

[Qemu-devel] [PATCH 07/35] cpus: Pass CPUState to qemu_cpu_is_self()

[Andreas Färber]

Change return type to bool, move to include/qemu/cpu.h and
add documentation.

Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
[AF: Updated new caller qemu_in_vcpu_thread()]
---
 cpus.c             |   12 +++++-------
 exec.c             |    3 ++-
 hw/apic.c          |    6 ++++--
 include/qemu/cpu.h |   10 ++++++++++
 kvm-all.c          |    4 +++-
 qemu-common.h      |    1 -
 target-i386/kvm.c  |    6 ++++--
 7 Dateien geändert, 28 Zeilen hinzugefügt(+), 14 Zeilen entfernt(-)

diff --git a/cpus.c b/cpus.c
index 191cbf5..1f3ac91 100644
--- a/cpus.c
+++ b/cpus.c
@@ -638,9 +638,10 @@ void qemu_init_cpu_loop(void)
 
 void run_on_cpu(CPUArchState *env, void (*func)(void *data), void *data)
 {
+    CPUState *cpu = ENV_GET_CPU(env);
     struct qemu_work_item wi;
 
-    if (qemu_cpu_is_self(env)) {
+    if (qemu_cpu_is_self(cpu)) {
         func(data);
         return;
     }
@@ -855,7 +856,7 @@ static void qemu_cpu_kick_thread(CPUArchState *env)
         exit(1);
     }
 #else /* _WIN32 */
-    if (!qemu_cpu_is_self(env)) {
+    if (!qemu_cpu_is_self(cpu)) {
         SuspendThread(cpu->hThread);
         cpu_signal(0);
         ResumeThread(cpu->hThread);
@@ -890,17 +891,14 @@ void qemu_cpu_kick_self(void)
 #endif
 }
 
-int qemu_cpu_is_self(void *_env)
+bool qemu_cpu_is_self(CPUState *cpu)
 {
-    CPUArchState *env = _env;
-    CPUState *cpu = ENV_GET_CPU(env);
-
     return qemu_thread_is_self(cpu->thread);
 }
 
 static bool qemu_in_vcpu_thread(void)
 {
-    return cpu_single_env && qemu_cpu_is_self(cpu_single_env);
+    return cpu_single_env && qemu_cpu_is_self(ENV_GET_CPU(cpu_single_env));
 }
 
 void qemu_mutex_lock_iothread(void)
diff --git a/exec.c b/exec.c
index b0ed593..a85a9b1 100644
--- a/exec.c
+++ b/exec.c
@@ -1693,6 +1693,7 @@ static void cpu_unlink_tb(CPUArchState *env)
 /* mask must never be zero, except for A20 change call */
 static void tcg_handle_interrupt(CPUArchState *env, int mask)
 {
+    CPUState *cpu = ENV_GET_CPU(env);
     int old_mask;
 
     old_mask = env->interrupt_request;
@@ -1702,7 +1703,7 @@ static void tcg_handle_interrupt(CPUArchState *env, int mask)
      * If called from iothread context, wake the target cpu in
      * case its halted.
      */
-    if (!qemu_cpu_is_self(env)) {
+    if (!qemu_cpu_is_self(cpu)) {
         qemu_cpu_kick(env);
         return;
     }
diff --git a/hw/apic.c b/hw/apic.c
index 4bc14e0..f73fc87 100644
--- a/hw/apic.c
+++ b/hw/apic.c
@@ -107,7 +107,7 @@ static void apic_sync_vapic(APICCommonState *s, int sync_type)
         length = offsetof(VAPICState, enabled) - offsetof(VAPICState, isr);
 
         if (sync_type & SYNC_TO_VAPIC) {
-            assert(qemu_cpu_is_self(&s->cpu->env));
+            assert(qemu_cpu_is_self(CPU(s->cpu)));
 
             vapic_state.tpr = s->tpr;
             vapic_state.enabled = 1;
@@ -363,10 +363,12 @@ static int apic_irq_pending(APICCommonState *s)
 /* signal the CPU if an irq is pending */
 static void apic_update_irq(APICCommonState *s)
 {
+    CPUState *cpu = CPU(s->cpu);
+
     if (!(s->spurious_vec & APIC_SV_ENABLE)) {
         return;
     }
-    if (!qemu_cpu_is_self(&s->cpu->env)) {
+    if (!qemu_cpu_is_self(cpu)) {
         cpu_interrupt(&s->cpu->env, CPU_INTERRUPT_POLL);
     } else if (apic_irq_pending(s) > 0) {
         cpu_interrupt(&s->cpu->env, CPU_INTERRUPT_HARD);
diff --git a/include/qemu/cpu.h b/include/qemu/cpu.h
index ad706a6..7be983d 100644
--- a/include/qemu/cpu.h
+++ b/include/qemu/cpu.h
@@ -78,5 +78,15 @@ struct CPUState {
  */
 void cpu_reset(CPUState *cpu);
 
+/**
+ * qemu_cpu_is_self:
+ * @cpu: The vCPU to check against.
+ *
+ * Checks whether the caller is executing on the vCPU thread.
+ *
+ * Returns: %true if called from @cpu's thread, %false otherwise.
+ */
+bool qemu_cpu_is_self(CPUState *cpu);
+
 
 #endif
diff --git a/kvm-all.c b/kvm-all.c
index 961e1db..74d2652 100644
--- a/kvm-all.c
+++ b/kvm-all.c
@@ -828,9 +828,11 @@ static MemoryListener kvm_io_listener = {
 
 static void kvm_handle_interrupt(CPUArchState *env, int mask)
 {
+    CPUState *cpu = ENV_GET_CPU(env);
+
     env->interrupt_request |= mask;
 
-    if (!qemu_cpu_is_self(env)) {
+    if (!qemu_cpu_is_self(cpu)) {
         qemu_cpu_kick(env);
     }
 }
diff --git a/qemu-common.h b/qemu-common.h
index b54612b..2094742 100644
--- a/qemu-common.h
+++ b/qemu-common.h
@@ -326,7 +326,6 @@ int cpu_load(QEMUFile *f, void *opaque, int version_id);
 /* Unblock cpu */
 void qemu_cpu_kick(void *env);
 void qemu_cpu_kick_self(void);
-int qemu_cpu_is_self(void *env);
 
 /* work queue */
 struct qemu_work_item {
diff --git a/target-i386/kvm.c b/target-i386/kvm.c
index 3aa62b2..c13f196 100644
--- a/target-i386/kvm.c
+++ b/target-i386/kvm.c
@@ -1552,9 +1552,10 @@ static int kvm_get_debugregs(CPUX86State *env)
 
 int kvm_arch_put_registers(CPUX86State *env, int level)
 {
+    CPUState *cpu = ENV_GET_CPU(env);
     int ret;
 
-    assert(cpu_is_stopped(env) || qemu_cpu_is_self(env));
+    assert(cpu_is_stopped(env) || qemu_cpu_is_self(cpu));
 
     ret = kvm_getput_regs(env, 1);
     if (ret < 0) {
@@ -1609,9 +1610,10 @@ int kvm_arch_put_registers(CPUX86State *env, int level)
 
 int kvm_arch_get_registers(CPUX86State *env)
 {
+    CPUState *cpu = ENV_GET_CPU(env);
     int ret;
 
-    assert(cpu_is_stopped(env) || qemu_cpu_is_self(env));
+    assert(cpu_is_stopped(env) || qemu_cpu_is_self(cpu));
 
     ret = kvm_getput_regs(env, 0);
     if (ret < 0) {
-- 
1.7.10.4

[Qemu-devel] [PATCH 08/35] cpus: Pass CPUState to qemu_cpu_kick_thread()

[Andreas Färber]

CPUArchState is no longer needed there.

Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
---
 cpus.c |    9 ++++-----
 1 Datei geändert, 4 Zeilen hinzugefügt(+), 5 Zeilen entfernt(-)

diff --git a/cpus.c b/cpus.c
index 1f3ac91..3946d49 100644
--- a/cpus.c
+++ b/cpus.c
@@ -844,9 +844,8 @@ static void *qemu_tcg_cpu_thread_fn(void *arg)
     return NULL;
 }
 
-static void qemu_cpu_kick_thread(CPUArchState *env)
+static void qemu_cpu_kick_thread(CPUState *cpu)
 {
-    CPUState *cpu = ENV_GET_CPU(env);
 #ifndef _WIN32
     int err;
 
@@ -871,7 +870,7 @@ void qemu_cpu_kick(void *_env)
 
     qemu_cond_broadcast(env->halt_cond);
     if (!tcg_enabled() && !cpu->thread_kicked) {
-        qemu_cpu_kick_thread(env);
+        qemu_cpu_kick_thread(cpu);
         cpu->thread_kicked = true;
     }
 }
@@ -883,7 +882,7 @@ void qemu_cpu_kick_self(void)
     CPUState *cpu_single_cpu = ENV_GET_CPU(cpu_single_env);
 
     if (!cpu_single_cpu->thread_kicked) {
-        qemu_cpu_kick_thread(cpu_single_env);
+        qemu_cpu_kick_thread(cpu_single_cpu);
         cpu_single_cpu->thread_kicked = true;
     }
 #else
@@ -908,7 +907,7 @@ void qemu_mutex_lock_iothread(void)
     } else {
         iothread_requesting_mutex = true;
         if (qemu_mutex_trylock(&qemu_global_mutex)) {
-            qemu_cpu_kick_thread(first_cpu);
+            qemu_cpu_kick_thread(ENV_GET_CPU(first_cpu));
             qemu_mutex_lock(&qemu_global_mutex);
         }
         iothread_requesting_mutex = false;
-- 
1.7.10.4

[Qemu-devel] [PATCH 09/35] cpu: Move created field to CPUState

[Andreas Färber]

Change its type to bool.

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 cpu-defs.h         |    1 -
 cpus.c             |   13 +++++++------
 include/qemu/cpu.h |    2 ++
 3 Dateien geändert, 9 Zeilen hinzugefügt(+), 7 Zeilen entfernt(-)

diff --git a/cpu-defs.h b/cpu-defs.h
index a796577..3b8bc20 100644
--- a/cpu-defs.h
+++ b/cpu-defs.h
@@ -205,7 +205,6 @@ typedef struct CPUWatchpoint {
     /* user data */                                                     \
     void *opaque;                                                       \
                                                                         \
-    uint32_t created;                                                   \
     uint32_t stop;   /* Stop request */                                 \
     uint32_t stopped; /* Artificially stopped */                        \
     struct QemuCond *halt_cond;                                         \
diff --git a/cpus.c b/cpus.c
index 3946d49..8abaa69 100644
--- a/cpus.c
+++ b/cpus.c
@@ -746,7 +746,7 @@ static void *qemu_kvm_cpu_thread_fn(void *arg)
     qemu_kvm_init_cpu_signals(env);
 
     /* signal CPU creation */
-    env->created = 1;
+    cpu->created = true;
     qemu_cond_signal(&qemu_cpu_cond);
 
     while (1) {
@@ -781,7 +781,7 @@ static void *qemu_dummy_cpu_thread_fn(void *arg)
     sigaddset(&waitset, SIG_IPI);
 
     /* signal CPU creation */
-    env->created = 1;
+    cpu->created = true;
     qemu_cond_signal(&qemu_cpu_cond);
 
     cpu_single_env = env;
@@ -818,8 +818,9 @@ static void *qemu_tcg_cpu_thread_fn(void *arg)
     /* signal CPU creation */
     qemu_mutex_lock(&qemu_global_mutex);
     for (env = first_cpu; env != NULL; env = env->next_cpu) {
+        cpu = ENV_GET_CPU(env);
         env->thread_id = qemu_get_thread_id();
-        env->created = 1;
+        cpu->created = true;
     }
     qemu_cond_signal(&qemu_cpu_cond);
 
@@ -996,7 +997,7 @@ static void qemu_tcg_init_vcpu(void *_env)
 #ifdef _WIN32
         cpu->hThread = qemu_thread_get_handle(cpu->thread);
 #endif
-        while (env->created == 0) {
+        while (!cpu->created) {
             qemu_cond_wait(&qemu_cpu_cond, &qemu_global_mutex);
         }
         tcg_cpu_thread = cpu->thread;
@@ -1015,7 +1016,7 @@ static void qemu_kvm_start_vcpu(CPUArchState *env)
     qemu_cond_init(env->halt_cond);
     qemu_thread_create(cpu->thread, qemu_kvm_cpu_thread_fn, env,
                        QEMU_THREAD_JOINABLE);
-    while (env->created == 0) {
+    while (!cpu->created) {
         qemu_cond_wait(&qemu_cpu_cond, &qemu_global_mutex);
     }
 }
@@ -1029,7 +1030,7 @@ static void qemu_dummy_start_vcpu(CPUArchState *env)
     qemu_cond_init(env->halt_cond);
     qemu_thread_create(cpu->thread, qemu_dummy_cpu_thread_fn, env,
                        QEMU_THREAD_JOINABLE);
-    while (env->created == 0) {
+    while (!cpu->created) {
         qemu_cond_wait(&qemu_cpu_cond, &qemu_global_mutex);
     }
 }
diff --git a/include/qemu/cpu.h b/include/qemu/cpu.h
index 7be983d..3ab2e25 100644
--- a/include/qemu/cpu.h
+++ b/include/qemu/cpu.h
@@ -54,6 +54,7 @@ typedef struct CPUClass {
 
 /**
  * CPUState:
+ * @created: Indicates whether the CPU thread has been successfully created.
  *
  * State of one CPU core or thread.
  */
@@ -67,6 +68,7 @@ struct CPUState {
     HANDLE hThread;
 #endif
     bool thread_kicked;
+    bool created;
 
     /* TODO Move common fields from CPUArchState here. */
 };
-- 
1.7.10.4

[Qemu-devel] [PATCH 10/35] cpu: Move stop field to CPUState

[Andreas Färber]

Change its type to bool.

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 cpu-defs.h         |    1 -
 cpus.c             |   27 ++++++++++++++++++---------
 include/qemu/cpu.h |    2 ++
 3 Dateien geändert, 20 Zeilen hinzugefügt(+), 10 Zeilen entfernt(-)

diff --git a/cpu-defs.h b/cpu-defs.h
index 3b8bc20..7a6378c 100644
--- a/cpu-defs.h
+++ b/cpu-defs.h
@@ -205,7 +205,6 @@ typedef struct CPUWatchpoint {
     /* user data */                                                     \
     void *opaque;                                                       \
                                                                         \
-    uint32_t stop;   /* Stop request */                                 \
     uint32_t stopped; /* Artificially stopped */                        \
     struct QemuCond *halt_cond;                                         \
     struct qemu_work_item *queued_work_first, *queued_work_last;        \
diff --git a/cpus.c b/cpus.c
index 8abaa69..2341ebb 100644
--- a/cpus.c
+++ b/cpus.c
@@ -64,7 +64,9 @@ static CPUArchState *next_cpu;
 
 static bool cpu_thread_is_idle(CPUArchState *env)
 {
-    if (env->stop || env->queued_work_first) {
+    CPUState *cpu = ENV_GET_CPU(env);
+
+    if (cpu->stop || env->queued_work_first) {
         return false;
     }
     if (env->stopped || !runstate_is_running()) {
@@ -448,7 +450,9 @@ static void do_vm_stop(RunState state)
 
 static int cpu_can_run(CPUArchState *env)
 {
-    if (env->stop) {
+    CPUState *cpu = ENV_GET_CPU(env);
+
+    if (cpu->stop) {
         return 0;
     }
     if (env->stopped || !runstate_is_running()) {
@@ -687,8 +691,8 @@ static void qemu_wait_io_event_common(CPUArchState *env)
 {
     CPUState *cpu = ENV_GET_CPU(env);
 
-    if (env->stop) {
-        env->stop = 0;
+    if (cpu->stop) {
+        cpu->stop = false;
         env->stopped = 1;
         qemu_cond_signal(&qemu_pause_cond);
     }
@@ -941,7 +945,8 @@ void pause_all_vcpus(void)
 
     qemu_clock_enable(vm_clock, false);
     while (penv) {
-        penv->stop = 1;
+        CPUState *pcpu = ENV_GET_CPU(penv);
+        pcpu->stop = true;
         qemu_cpu_kick(penv);
         penv = penv->next_cpu;
     }
@@ -950,7 +955,8 @@ void pause_all_vcpus(void)
         cpu_stop_current();
         if (!kvm_enabled()) {
             while (penv) {
-                penv->stop = 0;
+                CPUState *pcpu = ENV_GET_CPU(penv);
+                pcpu->stop = 0;
                 penv->stopped = 1;
                 penv = penv->next_cpu;
             }
@@ -974,7 +980,8 @@ void resume_all_vcpus(void)
 
     qemu_clock_enable(vm_clock, true);
     while (penv) {
-        penv->stop = 0;
+        CPUState *pcpu = ENV_GET_CPU(penv);
+        pcpu->stop = false;
         penv->stopped = 0;
         qemu_cpu_kick(penv);
         penv = penv->next_cpu;
@@ -1054,7 +1061,8 @@ void qemu_init_vcpu(void *_env)
 void cpu_stop_current(void)
 {
     if (cpu_single_env) {
-        cpu_single_env->stop = 0;
+        CPUState *cpu_single_cpu = ENV_GET_CPU(cpu_single_env);
+        cpu_single_cpu->stop = false;
         cpu_single_env->stopped = 1;
         cpu_exit(cpu_single_env);
         qemu_cond_signal(&qemu_pause_cond);
@@ -1136,6 +1144,7 @@ static void tcg_exec_all(void)
     }
     for (; next_cpu != NULL && !exit_request; next_cpu = next_cpu->next_cpu) {
         CPUArchState *env = next_cpu;
+        CPUState *cpu = ENV_GET_CPU(env);
 
         qemu_clock_enable(vm_clock,
                           (env->singlestep_enabled & SSTEP_NOTIMER) == 0);
@@ -1146,7 +1155,7 @@ static void tcg_exec_all(void)
                 cpu_handle_guest_debug(env);
                 break;
             }
-        } else if (env->stop || env->stopped) {
+        } else if (cpu->stop || env->stopped) {
             break;
         }
     }
diff --git a/include/qemu/cpu.h b/include/qemu/cpu.h
index 3ab2e25..04c7848 100644
--- a/include/qemu/cpu.h
+++ b/include/qemu/cpu.h
@@ -55,6 +55,7 @@ typedef struct CPUClass {
 /**
  * CPUState:
  * @created: Indicates whether the CPU thread has been successfully created.
+ * @stop: Indicates a pending stop request.
  *
  * State of one CPU core or thread.
  */
@@ -69,6 +70,7 @@ struct CPUState {
 #endif
     bool thread_kicked;
     bool created;
+    bool stop;
 
     /* TODO Move common fields from CPUArchState here. */
 };
-- 
1.7.10.4

[Qemu-devel] [PATCH 11/35] ppce500_spin: Store PowerPCCPU in SpinKick

[Andreas Färber]

Needed for moving stopped field to CPUState.

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 hw/ppce500_spin.c |    6 +++---
 1 Datei geändert, 3 Zeilen hinzugefügt(+), 3 Zeilen entfernt(-)

diff --git a/hw/ppce500_spin.c b/hw/ppce500_spin.c
index 55aa9dc..04e7e65 100644
--- a/hw/ppce500_spin.c
+++ b/hw/ppce500_spin.c
@@ -49,7 +49,7 @@ typedef struct spin_state {
 } SpinState;
 
 typedef struct spin_kick {
-    CPUPPCState *env;
+    PowerPCCPU *cpu;
     SpinInfo *spin;
 } SpinKick;
 
@@ -92,7 +92,7 @@ static void mmubooke_create_initial_mapping(CPUPPCState *env,
 static void spin_kick(void *data)
 {
     SpinKick *kick = data;
-    CPUPPCState *env = kick->env;
+    CPUPPCState *env = &kick->cpu->env;
     SpinInfo *curspin = kick->spin;
     hwaddr map_size = 64 * 1024 * 1024;
     hwaddr map_start;
@@ -158,7 +158,7 @@ static void spin_write(void *opaque, hwaddr addr, uint64_t value,
     if (!(ldq_p(&curspin->addr) & 1)) {
         /* run CPU */
         SpinKick kick = {
-            .env = env,
+            .cpu = ppc_env_get_cpu(env),
             .spin = curspin,
         };
 
-- 
1.7.10.4

[Qemu-devel] [PATCH 12/35] cpu: Move stopped field to CPUState

[Andreas Färber]

Change its type to bool.

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 cpu-defs.h         |    1 -
 cpus.c             |   30 ++++++++++++++++++------------
 hw/ppce500_spin.c  |    3 ++-
 include/qemu/cpu.h |    2 ++
 4 Dateien geändert, 22 Zeilen hinzugefügt(+), 14 Zeilen entfernt(-)

diff --git a/cpu-defs.h b/cpu-defs.h
index 7a6378c..83bf108 100644
--- a/cpu-defs.h
+++ b/cpu-defs.h
@@ -205,7 +205,6 @@ typedef struct CPUWatchpoint {
     /* user data */                                                     \
     void *opaque;                                                       \
                                                                         \
-    uint32_t stopped; /* Artificially stopped */                        \
     struct QemuCond *halt_cond;                                         \
     struct qemu_work_item *queued_work_first, *queued_work_last;        \
     const char *cpu_model_str;                                          \
diff --git a/cpus.c b/cpus.c
index 2341ebb..4654f08 100644
--- a/cpus.c
+++ b/cpus.c
@@ -69,7 +69,7 @@ static bool cpu_thread_is_idle(CPUArchState *env)
     if (cpu->stop || env->queued_work_first) {
         return false;
     }
-    if (env->stopped || !runstate_is_running()) {
+    if (cpu->stopped || !runstate_is_running()) {
         return true;
     }
     if (!env->halted || qemu_cpu_has_work(env) ||
@@ -432,7 +432,9 @@ void cpu_synchronize_all_post_init(void)
 
 int cpu_is_stopped(CPUArchState *env)
 {
-    return !runstate_is_running() || env->stopped;
+    CPUState *cpu = ENV_GET_CPU(env);
+
+    return !runstate_is_running() || cpu->stopped;
 }
 
 static void do_vm_stop(RunState state)
@@ -455,7 +457,7 @@ static int cpu_can_run(CPUArchState *env)
     if (cpu->stop) {
         return 0;
     }
-    if (env->stopped || !runstate_is_running()) {
+    if (cpu->stopped || !runstate_is_running()) {
         return 0;
     }
     return 1;
@@ -463,9 +465,11 @@ static int cpu_can_run(CPUArchState *env)
 
 static void cpu_handle_guest_debug(CPUArchState *env)
 {
+    CPUState *cpu = ENV_GET_CPU(env);
+
     gdb_set_stop_cpu(env);
     qemu_system_debug_request();
-    env->stopped = 1;
+    cpu->stopped = true;
 }
 
 static void cpu_signal(int sig)
@@ -693,7 +697,7 @@ static void qemu_wait_io_event_common(CPUArchState *env)
 
     if (cpu->stop) {
         cpu->stop = false;
-        env->stopped = 1;
+        cpu->stopped = true;
         qemu_cond_signal(&qemu_pause_cond);
     }
     flush_queued_work(env);
@@ -829,7 +833,7 @@ static void *qemu_tcg_cpu_thread_fn(void *arg)
     qemu_cond_signal(&qemu_cpu_cond);
 
     /* wait for initial kick-off after machine start */
-    while (first_cpu->stopped) {
+    while (ENV_GET_CPU(first_cpu)->stopped) {
         qemu_cond_wait(tcg_halt_cond, &qemu_global_mutex);
 
         /* process any pending work */
@@ -930,7 +934,8 @@ static int all_vcpus_paused(void)
     CPUArchState *penv = first_cpu;
 
     while (penv) {
-        if (!penv->stopped) {
+        CPUState *pcpu = ENV_GET_CPU(penv);
+        if (!pcpu->stopped) {
             return 0;
         }
         penv = penv->next_cpu;
@@ -957,7 +962,7 @@ void pause_all_vcpus(void)
             while (penv) {
                 CPUState *pcpu = ENV_GET_CPU(penv);
                 pcpu->stop = 0;
-                penv->stopped = 1;
+                pcpu->stopped = true;
                 penv = penv->next_cpu;
             }
             return;
@@ -982,7 +987,7 @@ void resume_all_vcpus(void)
     while (penv) {
         CPUState *pcpu = ENV_GET_CPU(penv);
         pcpu->stop = false;
-        penv->stopped = 0;
+        pcpu->stopped = false;
         qemu_cpu_kick(penv);
         penv = penv->next_cpu;
     }
@@ -1045,10 +1050,11 @@ static void qemu_dummy_start_vcpu(CPUArchState *env)
 void qemu_init_vcpu(void *_env)
 {
     CPUArchState *env = _env;
+    CPUState *cpu = ENV_GET_CPU(env);
 
     env->nr_cores = smp_cores;
     env->nr_threads = smp_threads;
-    env->stopped = 1;
+    cpu->stopped = true;
     if (kvm_enabled()) {
         qemu_kvm_start_vcpu(env);
     } else if (tcg_enabled()) {
@@ -1063,7 +1069,7 @@ void cpu_stop_current(void)
     if (cpu_single_env) {
         CPUState *cpu_single_cpu = ENV_GET_CPU(cpu_single_env);
         cpu_single_cpu->stop = false;
-        cpu_single_env->stopped = 1;
+        cpu_single_cpu->stopped = true;
         cpu_exit(cpu_single_env);
         qemu_cond_signal(&qemu_pause_cond);
     }
@@ -1155,7 +1161,7 @@ static void tcg_exec_all(void)
                 cpu_handle_guest_debug(env);
                 break;
             }
-        } else if (cpu->stop || env->stopped) {
+        } else if (cpu->stop || cpu->stopped) {
             break;
         }
     }
diff --git a/hw/ppce500_spin.c b/hw/ppce500_spin.c
index 04e7e65..fb5461d 100644
--- a/hw/ppce500_spin.c
+++ b/hw/ppce500_spin.c
@@ -92,6 +92,7 @@ static void mmubooke_create_initial_mapping(CPUPPCState *env,
 static void spin_kick(void *data)
 {
     SpinKick *kick = data;
+    CPUState *cpu = CPU(kick->cpu);
     CPUPPCState *env = &kick->cpu->env;
     SpinInfo *curspin = kick->spin;
     hwaddr map_size = 64 * 1024 * 1024;
@@ -113,7 +114,7 @@ static void spin_kick(void *data)
 
     env->halted = 0;
     env->exception_index = -1;
-    env->stopped = 0;
+    cpu->stopped = false;
     qemu_cpu_kick(env);
 }
 
diff --git a/include/qemu/cpu.h b/include/qemu/cpu.h
index 04c7848..83378c5 100644
--- a/include/qemu/cpu.h
+++ b/include/qemu/cpu.h
@@ -56,6 +56,7 @@ typedef struct CPUClass {
  * CPUState:
  * @created: Indicates whether the CPU thread has been successfully created.
  * @stop: Indicates a pending stop request.
+ * @stopped: Indicates the CPU has been artificially stopped.
  *
  * State of one CPU core or thread.
  */
@@ -71,6 +72,7 @@ struct CPUState {
     bool thread_kicked;
     bool created;
     bool stop;
+    bool stopped;
 
     /* TODO Move common fields from CPUArchState here. */
 };
-- 
1.7.10.4

[Qemu-devel] [PATCH 13/35] cpus: Pass CPUState to cpu_is_stopped()

[Andreas Färber]

CPUArchState is no longer needed there.

Also change the return type to bool.

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 cpu-all.h          |    1 -
 cpus.c             |    4 +---
 include/qemu/cpu.h |   11 +++++++++++
 target-i386/kvm.c  |    4 ++--
 4 Dateien geändert, 14 Zeilen hinzugefügt(+), 6 Zeilen entfernt(-)

diff --git a/cpu-all.h b/cpu-all.h
index 6606432..d19ec12 100644
--- a/cpu-all.h
+++ b/cpu-all.h
@@ -466,7 +466,6 @@ void cpu_watchpoint_remove_all(CPUArchState *env, int mask);
 #define SSTEP_NOTIMER 0x4  /* Do not Timers while single stepping */
 
 void cpu_single_step(CPUArchState *env, int enabled);
-int cpu_is_stopped(CPUArchState *env);
 void run_on_cpu(CPUArchState *env, void (*func)(void *data), void *data);
 
 #if !defined(CONFIG_USER_ONLY)
diff --git a/cpus.c b/cpus.c
index 4654f08..0721a96 100644
--- a/cpus.c
+++ b/cpus.c
@@ -430,10 +430,8 @@ void cpu_synchronize_all_post_init(void)
     }
 }
 
-int cpu_is_stopped(CPUArchState *env)
+bool cpu_is_stopped(CPUState *cpu)
 {
-    CPUState *cpu = ENV_GET_CPU(env);
-
     return !runstate_is_running() || cpu->stopped;
 }
 
diff --git a/include/qemu/cpu.h b/include/qemu/cpu.h
index 83378c5..4e62032 100644
--- a/include/qemu/cpu.h
+++ b/include/qemu/cpu.h
@@ -94,5 +94,16 @@ void cpu_reset(CPUState *cpu);
  */
 bool qemu_cpu_is_self(CPUState *cpu);
 
+/**
+ * cpu_is_stopped:
+ * @cpu: The CPU to check.
+ *
+ * Checks whether the CPU is stopped.
+ *
+ * Returns: %true if run state is not running or if artificially stopped;
+ * %false otherwise.
+ */
+bool cpu_is_stopped(CPUState *cpu);
+
 
 #endif
diff --git a/target-i386/kvm.c b/target-i386/kvm.c
index c13f196..a3491a4 100644
--- a/target-i386/kvm.c
+++ b/target-i386/kvm.c
@@ -1555,7 +1555,7 @@ int kvm_arch_put_registers(CPUX86State *env, int level)
     CPUState *cpu = ENV_GET_CPU(env);
     int ret;
 
-    assert(cpu_is_stopped(env) || qemu_cpu_is_self(cpu));
+    assert(cpu_is_stopped(cpu) || qemu_cpu_is_self(cpu));
 
     ret = kvm_getput_regs(env, 1);
     if (ret < 0) {
@@ -1613,7 +1613,7 @@ int kvm_arch_get_registers(CPUX86State *env)
     CPUState *cpu = ENV_GET_CPU(env);
     int ret;
 
-    assert(cpu_is_stopped(env) || qemu_cpu_is_self(cpu));
+    assert(cpu_is_stopped(cpu) || qemu_cpu_is_self(cpu));
 
     ret = kvm_getput_regs(env, 0);
     if (ret < 0) {
-- 
1.7.10.4

[Qemu-devel] [PATCH 14/35] cpus: Pass CPUState to cpu_can_run()

[Andreas Färber]

CPUArchState is no longer needed there.

Also change its return type to bool.

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 cpus.c |   14 ++++++--------
 1 Datei geändert, 6 Zeilen hinzugefügt(+), 8 Zeilen entfernt(-)

diff --git a/cpus.c b/cpus.c
index 0721a96..45877ee 100644
--- a/cpus.c
+++ b/cpus.c
@@ -448,17 +448,15 @@ static void do_vm_stop(RunState state)
     }
 }
 
-static int cpu_can_run(CPUArchState *env)
+static bool cpu_can_run(CPUState *cpu)
 {
-    CPUState *cpu = ENV_GET_CPU(env);
-
     if (cpu->stop) {
-        return 0;
+        return false;
     }
     if (cpu->stopped || !runstate_is_running()) {
-        return 0;
+        return false;
     }
-    return 1;
+    return true;
 }
 
 static void cpu_handle_guest_debug(CPUArchState *env)
@@ -756,7 +754,7 @@ static void *qemu_kvm_cpu_thread_fn(void *arg)
     qemu_cond_signal(&qemu_cpu_cond);
 
     while (1) {
-        if (cpu_can_run(env)) {
+        if (cpu_can_run(cpu)) {
             r = kvm_cpu_exec(env);
             if (r == EXCP_DEBUG) {
                 cpu_handle_guest_debug(env);
@@ -1153,7 +1151,7 @@ static void tcg_exec_all(void)
         qemu_clock_enable(vm_clock,
                           (env->singlestep_enabled & SSTEP_NOTIMER) == 0);
 
-        if (cpu_can_run(env)) {
+        if (cpu_can_run(cpu)) {
             r = tcg_cpu_exec(env);
             if (r == EXCP_DEBUG) {
                 cpu_handle_guest_debug(env);
-- 
1.7.10.4

[Qemu-devel] [PATCH 15/35] cpu: Move halt_cond to CPUState

[Andreas Färber]

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 cpu-defs.h         |    1 -
 cpus.c             |   22 ++++++++++++----------
 include/qemu/cpu.h |    1 +
 3 Dateien geändert, 13 Zeilen hinzugefügt(+), 11 Zeilen entfernt(-)

diff --git a/cpu-defs.h b/cpu-defs.h
index 83bf108..76c76f6 100644
--- a/cpu-defs.h
+++ b/cpu-defs.h
@@ -205,7 +205,6 @@ typedef struct CPUWatchpoint {
     /* user data */                                                     \
     void *opaque;                                                       \
                                                                         \
-    struct QemuCond *halt_cond;                                         \
     struct qemu_work_item *queued_work_first, *queued_work_last;        \
     const char *cpu_model_str;                                          \
     struct KVMState *kvm_state;                                         \
diff --git a/cpus.c b/cpus.c
index 45877ee..5a80bfa 100644
--- a/cpus.c
+++ b/cpus.c
@@ -722,8 +722,10 @@ static void qemu_tcg_wait_io_event(void)
 
 static void qemu_kvm_wait_io_event(CPUArchState *env)
 {
+    CPUState *cpu = ENV_GET_CPU(env);
+
     while (cpu_thread_is_idle(env)) {
-        qemu_cond_wait(env->halt_cond, &qemu_global_mutex);
+        qemu_cond_wait(cpu->halt_cond, &qemu_global_mutex);
     }
 
     qemu_kvm_eat_signals(env);
@@ -873,7 +875,7 @@ void qemu_cpu_kick(void *_env)
     CPUArchState *env = _env;
     CPUState *cpu = ENV_GET_CPU(env);
 
-    qemu_cond_broadcast(env->halt_cond);
+    qemu_cond_broadcast(cpu->halt_cond);
     if (!tcg_enabled() && !cpu->thread_kicked) {
         qemu_cpu_kick_thread(cpu);
         cpu->thread_kicked = true;
@@ -997,9 +999,9 @@ static void qemu_tcg_init_vcpu(void *_env)
     /* share a single thread for all cpus with TCG */
     if (!tcg_cpu_thread) {
         cpu->thread = g_malloc0(sizeof(QemuThread));
-        env->halt_cond = g_malloc0(sizeof(QemuCond));
-        qemu_cond_init(env->halt_cond);
-        tcg_halt_cond = env->halt_cond;
+        cpu->halt_cond = g_malloc0(sizeof(QemuCond));
+        qemu_cond_init(cpu->halt_cond);
+        tcg_halt_cond = cpu->halt_cond;
         qemu_thread_create(cpu->thread, qemu_tcg_cpu_thread_fn, env,
                            QEMU_THREAD_JOINABLE);
 #ifdef _WIN32
@@ -1011,7 +1013,7 @@ static void qemu_tcg_init_vcpu(void *_env)
         tcg_cpu_thread = cpu->thread;
     } else {
         cpu->thread = tcg_cpu_thread;
-        env->halt_cond = tcg_halt_cond;
+        cpu->halt_cond = tcg_halt_cond;
     }
 }
 
@@ -1020,8 +1022,8 @@ static void qemu_kvm_start_vcpu(CPUArchState *env)
     CPUState *cpu = ENV_GET_CPU(env);
 
     cpu->thread = g_malloc0(sizeof(QemuThread));
-    env->halt_cond = g_malloc0(sizeof(QemuCond));
-    qemu_cond_init(env->halt_cond);
+    cpu->halt_cond = g_malloc0(sizeof(QemuCond));
+    qemu_cond_init(cpu->halt_cond);
     qemu_thread_create(cpu->thread, qemu_kvm_cpu_thread_fn, env,
                        QEMU_THREAD_JOINABLE);
     while (!cpu->created) {
@@ -1034,8 +1036,8 @@ static void qemu_dummy_start_vcpu(CPUArchState *env)
     CPUState *cpu = ENV_GET_CPU(env);
 
     cpu->thread = g_malloc0(sizeof(QemuThread));
-    env->halt_cond = g_malloc0(sizeof(QemuCond));
-    qemu_cond_init(env->halt_cond);
+    cpu->halt_cond = g_malloc0(sizeof(QemuCond));
+    qemu_cond_init(cpu->halt_cond);
     qemu_thread_create(cpu->thread, qemu_dummy_cpu_thread_fn, env,
                        QEMU_THREAD_JOINABLE);
     while (!cpu->created) {
diff --git a/include/qemu/cpu.h b/include/qemu/cpu.h
index 4e62032..75e0f8d 100644
--- a/include/qemu/cpu.h
+++ b/include/qemu/cpu.h
@@ -69,6 +69,7 @@ struct CPUState {
 #ifdef _WIN32
     HANDLE hThread;
 #endif
+    struct QemuCond *halt_cond;
     bool thread_kicked;
     bool created;
     bool stop;
-- 
1.7.10.4

[Qemu-devel] [PATCH 16/35] cpus: Pass CPUState to qemu_tcg_cpu_thread_fn

[Andreas Färber]

CPUArchState is no longer needed except for iterating the CPUs.

Needed for qemu_tcg_init_vcpu().

KVM and dummy threads still need CPUArchState for cpu_single_env.

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 cpus.c |    6 +++---
 1 Datei geändert, 3 Zeilen hinzugefügt(+), 3 Zeilen entfernt(-)

diff --git a/cpus.c b/cpus.c
index 5a80bfa..068fa12 100644
--- a/cpus.c
+++ b/cpus.c
@@ -815,8 +815,8 @@ static void tcg_exec_all(void);
 
 static void *qemu_tcg_cpu_thread_fn(void *arg)
 {
-    CPUArchState *env = arg;
-    CPUState *cpu = ENV_GET_CPU(env);
+    CPUState *cpu = arg;
+    CPUArchState *env;
 
     qemu_tcg_init_cpu_signals();
     qemu_thread_get_self(cpu->thread);
@@ -1002,7 +1002,7 @@ static void qemu_tcg_init_vcpu(void *_env)
         cpu->halt_cond = g_malloc0(sizeof(QemuCond));
         qemu_cond_init(cpu->halt_cond);
         tcg_halt_cond = cpu->halt_cond;
-        qemu_thread_create(cpu->thread, qemu_tcg_cpu_thread_fn, env,
+        qemu_thread_create(cpu->thread, qemu_tcg_cpu_thread_fn, cpu,
                            QEMU_THREAD_JOINABLE);
 #ifdef _WIN32
         cpu->hThread = qemu_thread_get_handle(cpu->thread);
-- 
1.7.10.4

[Qemu-devel] [PATCH 17/35] cpus: Pass CPUState to qemu_tcg_init_vcpu()

[Andreas Färber]

CPUArchState is no longer needed.

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 cpus.c |    7 ++-----
 1 Datei geändert, 2 Zeilen hinzugefügt(+), 5 Zeilen entfernt(-)

diff --git a/cpus.c b/cpus.c
index 068fa12..5f91523 100644
--- a/cpus.c
+++ b/cpus.c
@@ -991,11 +991,8 @@ void resume_all_vcpus(void)
     }
 }
 
-static void qemu_tcg_init_vcpu(void *_env)
+static void qemu_tcg_init_vcpu(CPUState *cpu)
 {
-    CPUArchState *env = _env;
-    CPUState *cpu = ENV_GET_CPU(env);
-
     /* share a single thread for all cpus with TCG */
     if (!tcg_cpu_thread) {
         cpu->thread = g_malloc0(sizeof(QemuThread));
@@ -1056,7 +1053,7 @@ void qemu_init_vcpu(void *_env)
     if (kvm_enabled()) {
         qemu_kvm_start_vcpu(env);
     } else if (tcg_enabled()) {
-        qemu_tcg_init_vcpu(env);
+        qemu_tcg_init_vcpu(cpu);
     } else {
         qemu_dummy_start_vcpu(env);
     }
-- 
1.7.10.4

[Qemu-devel] [PATCH 18/35] ppc: Pass PowerPCCPU to {ppc6xx, ppc970, power7, ppc40x, ppce500}_set_irq()

[Andreas Färber]

Needed for changing qemu_cpu_kick() argument type to CPUState and
for moving halted field into CPUState.

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 hw/ppc.c |   55 +++++++++++++++++++++++++++++++++++--------------------
 1 Datei geändert, 35 Zeilen hinzugefügt(+), 20 Zeilen entfernt(-)

diff --git a/hw/ppc.c b/hw/ppc.c
index 98546de..ada100b 100644
--- a/hw/ppc.c
+++ b/hw/ppc.c
@@ -75,9 +75,10 @@ void ppc_set_irq(CPUPPCState *env, int n_IRQ, int level)
 }
 
 /* PowerPC 6xx / 7xx internal IRQ controller */
-static void ppc6xx_set_irq (void *opaque, int pin, int level)
+static void ppc6xx_set_irq(void *opaque, int pin, int level)
 {
-    CPUPPCState *env = opaque;
+    PowerPCCPU *cpu = opaque;
+    CPUPPCState *env = &cpu->env;
     int cur_level;
 
     LOG_IRQ("%s: env %p pin %d level %d\n", __func__,
@@ -151,17 +152,20 @@ static void ppc6xx_set_irq (void *opaque, int pin, int level)
     }
 }
 
-void ppc6xx_irq_init (CPUPPCState *env)
+void ppc6xx_irq_init(CPUPPCState *env)
 {
-    env->irq_inputs = (void **)qemu_allocate_irqs(&ppc6xx_set_irq, env,
+    PowerPCCPU *cpu = ppc_env_get_cpu(env);
+
+    env->irq_inputs = (void **)qemu_allocate_irqs(&ppc6xx_set_irq, cpu,
                                                   PPC6xx_INPUT_NB);
 }
 
 #if defined(TARGET_PPC64)
 /* PowerPC 970 internal IRQ controller */
-static void ppc970_set_irq (void *opaque, int pin, int level)
+static void ppc970_set_irq(void *opaque, int pin, int level)
 {
-    CPUPPCState *env = opaque;
+    PowerPCCPU *cpu = opaque;
+    CPUPPCState *env = &cpu->env;
     int cur_level;
 
     LOG_IRQ("%s: env %p pin %d level %d\n", __func__,
@@ -233,16 +237,19 @@ static void ppc970_set_irq (void *opaque, int pin, int level)
     }
 }
 
-void ppc970_irq_init (CPUPPCState *env)
+void ppc970_irq_init(CPUPPCState *env)
 {
-    env->irq_inputs = (void **)qemu_allocate_irqs(&ppc970_set_irq, env,
+    PowerPCCPU *cpu = ppc_env_get_cpu(env);
+
+    env->irq_inputs = (void **)qemu_allocate_irqs(&ppc970_set_irq, cpu,
                                                   PPC970_INPUT_NB);
 }
 
 /* POWER7 internal IRQ controller */
-static void power7_set_irq (void *opaque, int pin, int level)
+static void power7_set_irq(void *opaque, int pin, int level)
 {
-    CPUPPCState *env = opaque;
+    PowerPCCPU *cpu = opaque;
+    CPUPPCState *env = &cpu->env;
 
     LOG_IRQ("%s: env %p pin %d level %d\n", __func__,
                 env, pin, level);
@@ -266,17 +273,20 @@ static void power7_set_irq (void *opaque, int pin, int level)
     }
 }
 
-void ppcPOWER7_irq_init (CPUPPCState *env)
+void ppcPOWER7_irq_init(CPUPPCState *env)
 {
-    env->irq_inputs = (void **)qemu_allocate_irqs(&power7_set_irq, env,
+    PowerPCCPU *cpu = ppc_env_get_cpu(env);
+
+    env->irq_inputs = (void **)qemu_allocate_irqs(&power7_set_irq, cpu,
                                                   POWER7_INPUT_NB);
 }
 #endif /* defined(TARGET_PPC64) */
 
 /* PowerPC 40x internal IRQ controller */
-static void ppc40x_set_irq (void *opaque, int pin, int level)
+static void ppc40x_set_irq(void *opaque, int pin, int level)
 {
-    CPUPPCState *env = opaque;
+    PowerPCCPU *cpu = opaque;
+    CPUPPCState *env = &cpu->env;
     int cur_level;
 
     LOG_IRQ("%s: env %p pin %d level %d\n", __func__,
@@ -346,16 +356,19 @@ static void ppc40x_set_irq (void *opaque, int pin, int level)
     }
 }
 
-void ppc40x_irq_init (CPUPPCState *env)
+void ppc40x_irq_init(CPUPPCState *env)
 {
+    PowerPCCPU *cpu = ppc_env_get_cpu(env);
+
     env->irq_inputs = (void **)qemu_allocate_irqs(&ppc40x_set_irq,
-                                                  env, PPC40x_INPUT_NB);
+                                                  cpu, PPC40x_INPUT_NB);
 }
 
 /* PowerPC E500 internal IRQ controller */
-static void ppce500_set_irq (void *opaque, int pin, int level)
+static void ppce500_set_irq(void *opaque, int pin, int level)
 {
-    CPUPPCState *env = opaque;
+    PowerPCCPU *cpu = opaque;
+    CPUPPCState *env = &cpu->env;
     int cur_level;
 
     LOG_IRQ("%s: env %p pin %d level %d\n", __func__,
@@ -407,10 +420,12 @@ static void ppce500_set_irq (void *opaque, int pin, int level)
     }
 }
 
-void ppce500_irq_init (CPUPPCState *env)
+void ppce500_irq_init(CPUPPCState *env)
 {
+    PowerPCCPU *cpu = ppc_env_get_cpu(env);
+
     env->irq_inputs = (void **)qemu_allocate_irqs(&ppce500_set_irq,
-                                        env, PPCE500_INPUT_NB);
+                                                  cpu, PPCE500_INPUT_NB);
 }
 /*****************************************************************************/
 /* PowerPC time base and decrementer emulation */
-- 
1.7.10.4

[Qemu-devel] [PATCH 19/35] target-ppc: Rename kvm_kick_{env => cpu} and pass PowerPCCPU

[Andreas Färber]

Needed for changing qemu_cpu_kick() argument type to CPUState.

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 target-ppc/kvm.c |    8 ++++++--
 1 Datei geändert, 6 Zeilen hinzugefügt(+), 2 Zeilen entfernt(-)

diff --git a/target-ppc/kvm.c b/target-ppc/kvm.c
index 5cbe98a..d7d8e8f 100644
--- a/target-ppc/kvm.c
+++ b/target-ppc/kvm.c
@@ -73,8 +73,11 @@ static int cap_hior;
  */
 static QEMUTimer *idle_timer;
 
-static void kvm_kick_env(void *env)
+static void kvm_kick_cpu(void *opaque)
 {
+    PowerPCCPU *cpu = opaque;
+    CPUPPCState *env = &cpu->env;
+
     qemu_cpu_kick(env);
 }
 
@@ -375,6 +378,7 @@ static inline void kvm_fixup_page_sizes(CPUPPCState *env)
 
 int kvm_arch_init_vcpu(CPUPPCState *cenv)
 {
+    PowerPCCPU *cpu = ppc_env_get_cpu(cenv);
     int ret;
 
     /* Gather server mmu info from KVM and update the CPU state */
@@ -386,7 +390,7 @@ int kvm_arch_init_vcpu(CPUPPCState *cenv)
         return ret;
     }
 
-    idle_timer = qemu_new_timer_ns(vm_clock, kvm_kick_env, cenv);
+    idle_timer = qemu_new_timer_ns(vm_clock, kvm_kick_cpu, cpu);
 
     /* Some targets support access to KVM's guest TLB. */
     switch (cenv->mmu_model) {
-- 
1.7.10.4

[Qemu-devel] [PATCH 20/35] cpus: Pass CPUState to qemu_cpu_kick()

[Andreas Färber]

CPUArchState is no longer needed there.

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 cpus.c             |   13 +++++--------
 exec.c             |    2 +-
 hw/ppc.c           |    4 ++--
 hw/ppce500_spin.c  |    2 +-
 hw/spapr_rtas.c    |    5 ++++-
 hw/sun4m.c         |    2 +-
 hw/sun4u.c         |    2 +-
 include/qemu/cpu.h |    8 ++++++++
 kvm-all.c          |    2 +-
 qemu-common.h      |    1 -
 target-ppc/kvm.c   |    3 +--
 target-s390x/kvm.c |    2 +-
 12 Dateien geändert, 26 Zeilen hinzugefügt(+), 20 Zeilen entfernt(-)

diff --git a/cpus.c b/cpus.c
index 5f91523..b802d38 100644
--- a/cpus.c
+++ b/cpus.c
@@ -661,7 +661,7 @@ void run_on_cpu(CPUArchState *env, void (*func)(void *data), void *data)
     wi.next = NULL;
     wi.done = false;
 
-    qemu_cpu_kick(env);
+    qemu_cpu_kick(cpu);
     while (!wi.done) {
         CPUArchState *self_env = cpu_single_env;
 
@@ -870,11 +870,8 @@ static void qemu_cpu_kick_thread(CPUState *cpu)
 #endif
 }
 
-void qemu_cpu_kick(void *_env)
+void qemu_cpu_kick(CPUState *cpu)
 {
-    CPUArchState *env = _env;
-    CPUState *cpu = ENV_GET_CPU(env);
-
     qemu_cond_broadcast(cpu->halt_cond);
     if (!tcg_enabled() && !cpu->thread_kicked) {
         qemu_cpu_kick_thread(cpu);
@@ -950,7 +947,7 @@ void pause_all_vcpus(void)
     while (penv) {
         CPUState *pcpu = ENV_GET_CPU(penv);
         pcpu->stop = true;
-        qemu_cpu_kick(penv);
+        qemu_cpu_kick(pcpu);
         penv = penv->next_cpu;
     }
 
@@ -971,7 +968,7 @@ void pause_all_vcpus(void)
         qemu_cond_wait(&qemu_pause_cond, &qemu_global_mutex);
         penv = first_cpu;
         while (penv) {
-            qemu_cpu_kick(penv);
+            qemu_cpu_kick(ENV_GET_CPU(penv));
             penv = penv->next_cpu;
         }
     }
@@ -986,7 +983,7 @@ void resume_all_vcpus(void)
         CPUState *pcpu = ENV_GET_CPU(penv);
         pcpu->stop = false;
         pcpu->stopped = false;
-        qemu_cpu_kick(penv);
+        qemu_cpu_kick(pcpu);
         penv = penv->next_cpu;
     }
 }
diff --git a/exec.c b/exec.c
index a85a9b1..038e40d 100644
--- a/exec.c
+++ b/exec.c
@@ -1704,7 +1704,7 @@ static void tcg_handle_interrupt(CPUArchState *env, int mask)
      * case its halted.
      */
     if (!qemu_cpu_is_self(cpu)) {
-        qemu_cpu_kick(env);
+        qemu_cpu_kick(cpu);
         return;
     }
 
diff --git a/hw/ppc.c b/hw/ppc.c
index ada100b..fa7ae74 100644
--- a/hw/ppc.c
+++ b/hw/ppc.c
@@ -206,7 +206,7 @@ static void ppc970_set_irq(void *opaque, int pin, int level)
             } else {
                 LOG_IRQ("%s: restart the CPU\n", __func__);
                 env->halted = 0;
-                qemu_cpu_kick(env);
+                qemu_cpu_kick(CPU(cpu));
             }
             break;
         case PPC970_INPUT_HRESET:
@@ -335,7 +335,7 @@ static void ppc40x_set_irq(void *opaque, int pin, int level)
             } else {
                 LOG_IRQ("%s: restart the CPU\n", __func__);
                 env->halted = 0;
-                qemu_cpu_kick(env);
+                qemu_cpu_kick(CPU(cpu));
             }
             break;
         case PPC40x_INPUT_DEBUG:
diff --git a/hw/ppce500_spin.c b/hw/ppce500_spin.c
index fb5461d..7f8c842 100644
--- a/hw/ppce500_spin.c
+++ b/hw/ppce500_spin.c
@@ -115,7 +115,7 @@ static void spin_kick(void *data)
     env->halted = 0;
     env->exception_index = -1;
     cpu->stopped = false;
-    qemu_cpu_kick(env);
+    qemu_cpu_kick(cpu);
 }
 
 static void spin_write(void *opaque, hwaddr addr, uint64_t value,
diff --git a/hw/spapr_rtas.c b/hw/spapr_rtas.c
index ce76c58..6d5c48a 100644
--- a/hw/spapr_rtas.c
+++ b/hw/spapr_rtas.c
@@ -163,6 +163,7 @@ static void rtas_start_cpu(sPAPREnvironment *spapr,
                            uint32_t nret, target_ulong rets)
 {
     target_ulong id, start, r3;
+    CPUState *cpu;
     CPUPPCState *env;
 
     if (nargs != 3 || nret != 1) {
@@ -175,6 +176,8 @@ static void rtas_start_cpu(sPAPREnvironment *spapr,
     r3 = rtas_ld(args, 2);
 
     for (env = first_cpu; env; env = env->next_cpu) {
+        cpu = ENV_GET_CPU(env);
+
         if (env->cpu_index != id) {
             continue;
         }
@@ -194,7 +197,7 @@ static void rtas_start_cpu(sPAPREnvironment *spapr,
         env->gpr[3] = r3;
         env->halted = 0;
 
-        qemu_cpu_kick(env);
+        qemu_cpu_kick(cpu);
 
         rtas_st(rets, 0, 0);
         return;
diff --git a/hw/sun4m.c b/hw/sun4m.c
index 02673b2..1a78676 100644
--- a/hw/sun4m.c
+++ b/hw/sun4m.c
@@ -259,7 +259,7 @@ static void cpu_kick_irq(SPARCCPU *cpu)
 
     env->halted = 0;
     cpu_check_irqs(env);
-    qemu_cpu_kick(env);
+    qemu_cpu_kick(CPU(cpu));
 }
 
 static void cpu_set_irq(void *opaque, int irq, int level)
diff --git a/hw/sun4u.c b/hw/sun4u.c
index 1621171..b2b51e3 100644
--- a/hw/sun4u.c
+++ b/hw/sun4u.c
@@ -317,7 +317,7 @@ static void cpu_kick_irq(SPARCCPU *cpu)
 
     env->halted = 0;
     cpu_check_irqs(env);
-    qemu_cpu_kick(env);
+    qemu_cpu_kick(CPU(cpu));
 }
 
 static void cpu_set_ivec_irq(void *opaque, int irq, int level)
diff --git a/include/qemu/cpu.h b/include/qemu/cpu.h
index 75e0f8d..bfeb224 100644
--- a/include/qemu/cpu.h
+++ b/include/qemu/cpu.h
@@ -96,6 +96,14 @@ void cpu_reset(CPUState *cpu);
 bool qemu_cpu_is_self(CPUState *cpu);
 
 /**
+ * qemu_cpu_kick:
+ * @cpu: The vCPU to kick.
+ *
+ * Kicks @cpu's thread.
+ */
+void qemu_cpu_kick(CPUState *cpu);
+
+/**
  * cpu_is_stopped:
  * @cpu: The CPU to check.
  *
diff --git a/kvm-all.c b/kvm-all.c
index 74d2652..e41e1c9 100644
--- a/kvm-all.c
+++ b/kvm-all.c
@@ -833,7 +833,7 @@ static void kvm_handle_interrupt(CPUArchState *env, int mask)
     env->interrupt_request |= mask;
 
     if (!qemu_cpu_is_self(cpu)) {
-        qemu_cpu_kick(env);
+        qemu_cpu_kick(cpu);
     }
 }
 
diff --git a/qemu-common.h b/qemu-common.h
index 2094742..2011c00 100644
--- a/qemu-common.h
+++ b/qemu-common.h
@@ -324,7 +324,6 @@ void cpu_save(QEMUFile *f, void *opaque);
 int cpu_load(QEMUFile *f, void *opaque, int version_id);
 
 /* Unblock cpu */
-void qemu_cpu_kick(void *env);
 void qemu_cpu_kick_self(void);
 
 /* work queue */
diff --git a/target-ppc/kvm.c b/target-ppc/kvm.c
index d7d8e8f..6aacff0 100644
--- a/target-ppc/kvm.c
+++ b/target-ppc/kvm.c
@@ -76,9 +76,8 @@ static QEMUTimer *idle_timer;
 static void kvm_kick_cpu(void *opaque)
 {
     PowerPCCPU *cpu = opaque;
-    CPUPPCState *env = &cpu->env;
 
-    qemu_cpu_kick(env);
+    qemu_cpu_kick(CPU(cpu));
 }
 
 int kvm_arch_init(KVMState *s)
diff --git a/target-s390x/kvm.c b/target-s390x/kvm.c
index a66ac43..94de764 100644
--- a/target-s390x/kvm.c
+++ b/target-s390x/kvm.c
@@ -403,7 +403,7 @@ static int s390_cpu_restart(S390CPU *cpu)
 
     kvm_s390_interrupt(env, KVM_S390_RESTART, 0);
     s390_add_running_cpu(env);
-    qemu_cpu_kick(env);
+    qemu_cpu_kick(CPU(cpu));
     dprintf("DONE: SIGP cpu restart: %p\n", env);
     return 0;
 }
-- 
1.7.10.4

[Qemu-devel] [PATCH 21/35] cpu: Move queued_work_{first, last} to CPUState

[Andreas Färber]

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 cpu-defs.h         |    1 -
 cpus.c             |   19 ++++++++++---------
 include/qemu/cpu.h |    1 +
 3 Dateien geändert, 11 Zeilen hinzugefügt(+), 10 Zeilen entfernt(-)

diff --git a/cpu-defs.h b/cpu-defs.h
index 76c76f6..b30a8e9 100644
--- a/cpu-defs.h
+++ b/cpu-defs.h
@@ -205,7 +205,6 @@ typedef struct CPUWatchpoint {
     /* user data */                                                     \
     void *opaque;                                                       \
                                                                         \
-    struct qemu_work_item *queued_work_first, *queued_work_last;        \
     const char *cpu_model_str;                                          \
     struct KVMState *kvm_state;                                         \
     struct kvm_run *kvm_run;                                            \
diff --git a/cpus.c b/cpus.c
index b802d38..307c1f2 100644
--- a/cpus.c
+++ b/cpus.c
@@ -66,7 +66,7 @@ static bool cpu_thread_is_idle(CPUArchState *env)
 {
     CPUState *cpu = ENV_GET_CPU(env);
 
-    if (cpu->stop || env->queued_work_first) {
+    if (cpu->stop || cpu->queued_work_first) {
         return false;
     }
     if (cpu->stopped || !runstate_is_running()) {
@@ -652,12 +652,12 @@ void run_on_cpu(CPUArchState *env, void (*func)(void *data), void *data)
 
     wi.func = func;
     wi.data = data;
-    if (!env->queued_work_first) {
-        env->queued_work_first = &wi;
+    if (cpu->queued_work_first == NULL) {
+        cpu->queued_work_first = &wi;
     } else {
-        env->queued_work_last->next = &wi;
+        cpu->queued_work_last->next = &wi;
     }
-    env->queued_work_last = &wi;
+    cpu->queued_work_last = &wi;
     wi.next = NULL;
     wi.done = false;
 
@@ -672,18 +672,19 @@ void run_on_cpu(CPUArchState *env, void (*func)(void *data), void *data)
 
 static void flush_queued_work(CPUArchState *env)
 {
+    CPUState *cpu = ENV_GET_CPU(env);
     struct qemu_work_item *wi;
 
-    if (!env->queued_work_first) {
+    if (cpu->queued_work_first == NULL) {
         return;
     }
 
-    while ((wi = env->queued_work_first)) {
-        env->queued_work_first = wi->next;
+    while ((wi = cpu->queued_work_first)) {
+        cpu->queued_work_first = wi->next;
         wi->func(wi->data);
         wi->done = true;
     }
-    env->queued_work_last = NULL;
+    cpu->queued_work_last = NULL;
     qemu_cond_broadcast(&qemu_work_cond);
 }
 
diff --git a/include/qemu/cpu.h b/include/qemu/cpu.h
index bfeb224..eea6175 100644
--- a/include/qemu/cpu.h
+++ b/include/qemu/cpu.h
@@ -70,6 +70,7 @@ struct CPUState {
     HANDLE hThread;
 #endif
     struct QemuCond *halt_cond;
+    struct qemu_work_item *queued_work_first, *queued_work_last;
     bool thread_kicked;
     bool created;
     bool stop;
-- 
1.7.10.4

[Qemu-devel] [PATCH 22/35] cpus: Pass CPUState to flush_queued_work()

[Andreas Färber]

CPUArchState is no longer needed there.

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 cpus.c |    5 ++---
 1 Datei geändert, 2 Zeilen hinzugefügt(+), 3 Zeilen entfernt(-)

diff --git a/cpus.c b/cpus.c
index 307c1f2..e40823c 100644
--- a/cpus.c
+++ b/cpus.c
@@ -670,9 +670,8 @@ void run_on_cpu(CPUArchState *env, void (*func)(void *data), void *data)
     }
 }
 
-static void flush_queued_work(CPUArchState *env)
+static void flush_queued_work(CPUState *cpu)
 {
-    CPUState *cpu = ENV_GET_CPU(env);
     struct qemu_work_item *wi;
 
     if (cpu->queued_work_first == NULL) {
@@ -697,7 +696,7 @@ static void qemu_wait_io_event_common(CPUArchState *env)
         cpu->stopped = true;
         qemu_cond_signal(&qemu_pause_cond);
     }
-    flush_queued_work(env);
+    flush_queued_work(cpu);
     cpu->thread_kicked = false;
 }
 
-- 
1.7.10.4

[Qemu-devel] [PATCH 23/35] cpus: Pass CPUState to qemu_wait_io_event_common()

[Andreas Färber]

CPUArchState is no longer needed there.

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 cpus.c |   12 +++++-------
 1 Datei geändert, 5 Zeilen hinzugefügt(+), 7 Zeilen entfernt(-)

diff --git a/cpus.c b/cpus.c
index e40823c..6baf2bc 100644
--- a/cpus.c
+++ b/cpus.c
@@ -687,10 +687,8 @@ static void flush_queued_work(CPUState *cpu)
     qemu_cond_broadcast(&qemu_work_cond);
 }
 
-static void qemu_wait_io_event_common(CPUArchState *env)
+static void qemu_wait_io_event_common(CPUState *cpu)
 {
-    CPUState *cpu = ENV_GET_CPU(env);
-
     if (cpu->stop) {
         cpu->stop = false;
         cpu->stopped = true;
@@ -716,7 +714,7 @@ static void qemu_tcg_wait_io_event(void)
     }
 
     for (env = first_cpu; env != NULL; env = env->next_cpu) {
-        qemu_wait_io_event_common(env);
+        qemu_wait_io_event_common(ENV_GET_CPU(env));
     }
 }
 
@@ -729,7 +727,7 @@ static void qemu_kvm_wait_io_event(CPUArchState *env)
     }
 
     qemu_kvm_eat_signals(env);
-    qemu_wait_io_event_common(env);
+    qemu_wait_io_event_common(cpu);
 }
 
 static void *qemu_kvm_cpu_thread_fn(void *arg)
@@ -804,7 +802,7 @@ static void *qemu_dummy_cpu_thread_fn(void *arg)
         }
         qemu_mutex_lock_iothread();
         cpu_single_env = env;
-        qemu_wait_io_event_common(env);
+        qemu_wait_io_event_common(cpu);
     }
 
     return NULL;
@@ -836,7 +834,7 @@ static void *qemu_tcg_cpu_thread_fn(void *arg)
 
         /* process any pending work */
         for (env = first_cpu; env != NULL; env = env->next_cpu) {
-            qemu_wait_io_event_common(env);
+            qemu_wait_io_event_common(ENV_GET_CPU(env));
         }
     }
 
-- 
1.7.10.4

[Qemu-devel] [PATCH 24/35] xtensa_pic: Pass XtensaCPU to xtensa_ccompare_cb()

[Andreas Färber]

Needed for changing cpu_has_work() argument type to CPUState.

Signed-off-by: Andreas Färber <afaerber@suse.de>
Acked-by: Max Filippov <jcmvbkbc@gmail.com>
---
 hw/xtensa_pic.c |    7 +++++--
 1 Datei geändert, 5 Zeilen hinzugefügt(+), 2 Zeilen entfernt(-)

diff --git a/hw/xtensa_pic.c b/hw/xtensa_pic.c
index 653ded6..8b9c051 100644
--- a/hw/xtensa_pic.c
+++ b/hw/xtensa_pic.c
@@ -125,7 +125,8 @@ void xtensa_rearm_ccompare_timer(CPUXtensaState *env)
 
 static void xtensa_ccompare_cb(void *opaque)
 {
-    CPUXtensaState *env = opaque;
+    XtensaCPU *cpu = opaque;
+    CPUXtensaState *env = &cpu->env;
 
     if (env->halted) {
         env->halt_clock = qemu_get_clock_ns(vm_clock);
@@ -139,12 +140,14 @@ static void xtensa_ccompare_cb(void *opaque)
 
 void xtensa_irq_init(CPUXtensaState *env)
 {
+    XtensaCPU *cpu = xtensa_env_get_cpu(env);
+
     env->irq_inputs = (void **)qemu_allocate_irqs(
             xtensa_set_irq, env, env->config->ninterrupt);
     if (xtensa_option_enabled(env->config, XTENSA_OPTION_TIMER_INTERRUPT) &&
             env->config->nccompare > 0) {
         env->ccompare_timer =
-            qemu_new_timer_ns(vm_clock, &xtensa_ccompare_cb, env);
+            qemu_new_timer_ns(vm_clock, &xtensa_ccompare_cb, cpu);
     }
 }
 
-- 
1.7.10.4

[Qemu-devel] [PATCH 25/35] target-ppc: Pass PowerPCCPU to powerpc_excp()

[Andreas Färber]

Needed for changing cpu_ppc_hypercall() argument type to PowerPCCPU.

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 target-ppc/excp_helper.c |   36 ++++++++++++++++++++----------------
 1 Datei geändert, 20 Zeilen hinzugefügt(+), 16 Zeilen entfernt(-)

diff --git a/target-ppc/excp_helper.c b/target-ppc/excp_helper.c
index 1a593f6..d19a46b 100644
--- a/target-ppc/excp_helper.c
+++ b/target-ppc/excp_helper.c
@@ -63,8 +63,9 @@ static inline void dump_syscall(CPUPPCState *env)
 /* Note that this function should be greatly optimized
  * when called with a constant excp, from ppc_hw_interrupt
  */
-static inline void powerpc_excp(CPUPPCState *env, int excp_model, int excp)
+static inline void powerpc_excp(PowerPCCPU *cpu, int excp_model, int excp)
 {
+    CPUPPCState *env = &cpu->env;
     target_ulong msr, new_msr, vector;
     int srr0, srr1, asrr0, asrr1;
     int lpes0, lpes1, lev;
@@ -643,11 +644,14 @@ static inline void powerpc_excp(CPUPPCState *env, int excp_model, int excp)
 
 void do_interrupt(CPUPPCState *env)
 {
-    powerpc_excp(env, env->excp_model, env->exception_index);
+    PowerPCCPU *cpu = ppc_env_get_cpu(env);
+
+    powerpc_excp(cpu, env->excp_model, env->exception_index);
 }
 
 void ppc_hw_interrupt(CPUPPCState *env)
 {
+    PowerPCCPU *cpu = ppc_env_get_cpu(env);
     int hdice;
 
 #if 0
@@ -658,20 +662,20 @@ void ppc_hw_interrupt(CPUPPCState *env)
     /* External reset */
     if (env->pending_interrupts & (1 << PPC_INTERRUPT_RESET)) {
         env->pending_interrupts &= ~(1 << PPC_INTERRUPT_RESET);
-        powerpc_excp(env, env->excp_model, POWERPC_EXCP_RESET);
+        powerpc_excp(cpu, env->excp_model, POWERPC_EXCP_RESET);
         return;
     }
     /* Machine check exception */
     if (env->pending_interrupts & (1 << PPC_INTERRUPT_MCK)) {
         env->pending_interrupts &= ~(1 << PPC_INTERRUPT_MCK);
-        powerpc_excp(env, env->excp_model, POWERPC_EXCP_MCHECK);
+        powerpc_excp(cpu, env->excp_model, POWERPC_EXCP_MCHECK);
         return;
     }
 #if 0 /* TODO */
     /* External debug exception */
     if (env->pending_interrupts & (1 << PPC_INTERRUPT_DEBUG)) {
         env->pending_interrupts &= ~(1 << PPC_INTERRUPT_DEBUG);
-        powerpc_excp(env, env->excp_model, POWERPC_EXCP_DEBUG);
+        powerpc_excp(cpu, env->excp_model, POWERPC_EXCP_DEBUG);
         return;
     }
 #endif
@@ -685,7 +689,7 @@ void ppc_hw_interrupt(CPUPPCState *env)
         /* Hypervisor decrementer exception */
         if (env->pending_interrupts & (1 << PPC_INTERRUPT_HDECR)) {
             env->pending_interrupts &= ~(1 << PPC_INTERRUPT_HDECR);
-            powerpc_excp(env, env->excp_model, POWERPC_EXCP_HDECR);
+            powerpc_excp(cpu, env->excp_model, POWERPC_EXCP_HDECR);
             return;
         }
     }
@@ -698,7 +702,7 @@ void ppc_hw_interrupt(CPUPPCState *env)
 #if 0
             env->pending_interrupts &= ~(1 << PPC_INTERRUPT_CEXT);
 #endif
-            powerpc_excp(env, env->excp_model, POWERPC_EXCP_CRITICAL);
+            powerpc_excp(cpu, env->excp_model, POWERPC_EXCP_CRITICAL);
             return;
         }
     }
@@ -706,30 +710,30 @@ void ppc_hw_interrupt(CPUPPCState *env)
         /* Watchdog timer on embedded PowerPC */
         if (env->pending_interrupts & (1 << PPC_INTERRUPT_WDT)) {
             env->pending_interrupts &= ~(1 << PPC_INTERRUPT_WDT);
-            powerpc_excp(env, env->excp_model, POWERPC_EXCP_WDT);
+            powerpc_excp(cpu, env->excp_model, POWERPC_EXCP_WDT);
             return;
         }
         if (env->pending_interrupts & (1 << PPC_INTERRUPT_CDOORBELL)) {
             env->pending_interrupts &= ~(1 << PPC_INTERRUPT_CDOORBELL);
-            powerpc_excp(env, env->excp_model, POWERPC_EXCP_DOORCI);
+            powerpc_excp(cpu, env->excp_model, POWERPC_EXCP_DOORCI);
             return;
         }
         /* Fixed interval timer on embedded PowerPC */
         if (env->pending_interrupts & (1 << PPC_INTERRUPT_FIT)) {
             env->pending_interrupts &= ~(1 << PPC_INTERRUPT_FIT);
-            powerpc_excp(env, env->excp_model, POWERPC_EXCP_FIT);
+            powerpc_excp(cpu, env->excp_model, POWERPC_EXCP_FIT);
             return;
         }
         /* Programmable interval timer on embedded PowerPC */
         if (env->pending_interrupts & (1 << PPC_INTERRUPT_PIT)) {
             env->pending_interrupts &= ~(1 << PPC_INTERRUPT_PIT);
-            powerpc_excp(env, env->excp_model, POWERPC_EXCP_PIT);
+            powerpc_excp(cpu, env->excp_model, POWERPC_EXCP_PIT);
             return;
         }
         /* Decrementer exception */
         if (env->pending_interrupts & (1 << PPC_INTERRUPT_DECR)) {
             env->pending_interrupts &= ~(1 << PPC_INTERRUPT_DECR);
-            powerpc_excp(env, env->excp_model, POWERPC_EXCP_DECR);
+            powerpc_excp(cpu, env->excp_model, POWERPC_EXCP_DECR);
             return;
         }
         /* External interrupt */
@@ -740,23 +744,23 @@ void ppc_hw_interrupt(CPUPPCState *env)
 #if 0
             env->pending_interrupts &= ~(1 << PPC_INTERRUPT_EXT);
 #endif
-            powerpc_excp(env, env->excp_model, POWERPC_EXCP_EXTERNAL);
+            powerpc_excp(cpu, env->excp_model, POWERPC_EXCP_EXTERNAL);
             return;
         }
         if (env->pending_interrupts & (1 << PPC_INTERRUPT_DOORBELL)) {
             env->pending_interrupts &= ~(1 << PPC_INTERRUPT_DOORBELL);
-            powerpc_excp(env, env->excp_model, POWERPC_EXCP_DOORI);
+            powerpc_excp(cpu, env->excp_model, POWERPC_EXCP_DOORI);
             return;
         }
         if (env->pending_interrupts & (1 << PPC_INTERRUPT_PERFM)) {
             env->pending_interrupts &= ~(1 << PPC_INTERRUPT_PERFM);
-            powerpc_excp(env, env->excp_model, POWERPC_EXCP_PERFM);
+            powerpc_excp(cpu, env->excp_model, POWERPC_EXCP_PERFM);
             return;
         }
         /* Thermal interrupt */
         if (env->pending_interrupts & (1 << PPC_INTERRUPT_THERM)) {
             env->pending_interrupts &= ~(1 << PPC_INTERRUPT_THERM);
-            powerpc_excp(env, env->excp_model, POWERPC_EXCP_THERM);
+            powerpc_excp(cpu, env->excp_model, POWERPC_EXCP_THERM);
             return;
         }
     }
-- 
1.7.10.4

[Qemu-devel] [PATCH 26/35] target-ppc: Pass PowerPCCPU to cpu_ppc_hypercall

[Andreas Färber]

Adapt emulate_spapr_hypercall() accordingly.

Needed for changing spapr_hypercall() argument type to PowerPCCPU.

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 hw/spapr.c               |    4 +++-
 target-ppc/cpu.h         |    2 +-
 target-ppc/excp_helper.c |    4 ++--
 3 Dateien geändert, 6 Zeilen hinzugefügt(+), 4 Zeilen entfernt(-)

diff --git a/hw/spapr.c b/hw/spapr.c
index 8d0ad3c..30707ee 100644
--- a/hw/spapr.c
+++ b/hw/spapr.c
@@ -576,8 +576,10 @@ static uint64_t translate_kernel_address(void *opaque, uint64_t addr)
     return (addr & 0x0fffffff) + KERNEL_LOAD_ADDR;
 }
 
-static void emulate_spapr_hypercall(CPUPPCState *env)
+static void emulate_spapr_hypercall(PowerPCCPU *cpu)
 {
+    CPUPPCState *env = &cpu->env;
+
     if (msr_pr) {
         hcall_dprintf("Hypercall made with MSR[PR]=1\n");
         env->gpr[3] = H_PRIVILEGE;
diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h
index 286f42a..5574042 100644
--- a/target-ppc/cpu.h
+++ b/target-ppc/cpu.h
@@ -2220,7 +2220,7 @@ static inline bool msr_is_64bit(CPUPPCState *env, target_ulong msr)
     return msr & (1ULL << MSR_SF);
 }
 
-extern void (*cpu_ppc_hypercall)(CPUPPCState *);
+extern void (*cpu_ppc_hypercall)(PowerPCCPU *);
 
 static inline bool cpu_has_work(CPUPPCState *env)
 {
diff --git a/target-ppc/excp_helper.c b/target-ppc/excp_helper.c
index d19a46b..5e34ad0 100644
--- a/target-ppc/excp_helper.c
+++ b/target-ppc/excp_helper.c
@@ -33,7 +33,7 @@
 /*****************************************************************************/
 /* PowerPC Hypercall emulation */
 
-void (*cpu_ppc_hypercall)(CPUPPCState *);
+void (*cpu_ppc_hypercall)(PowerPCCPU *);
 
 /*****************************************************************************/
 /* Exception processing */
@@ -239,7 +239,7 @@ static inline void powerpc_excp(PowerPCCPU *cpu, int excp_model, int excp)
         dump_syscall(env);
         lev = env->error_code;
         if ((lev == 1) && cpu_ppc_hypercall) {
-            cpu_ppc_hypercall(env);
+            cpu_ppc_hypercall(cpu);
             return;
         }
         if (lev == 1 || (lpes0 == 0 && lpes1 == 0)) {
-- 
1.7.10.4

[Qemu-devel] [PATCH 27/35] spapr: Pass PowerPCCPU to spapr_hypercall()

[Andreas Färber]

Needed for changing the hypercall handlers' argument type to PowerPCCPU.

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 hw/spapr.c       |    2 +-
 hw/spapr.h       |    2 +-
 hw/spapr_hcall.c |    4 +++-
 target-ppc/kvm.c |    3 ++-
 4 Dateien geändert, 7 Zeilen hinzugefügt(+), 4 Zeilen entfernt(-)

diff --git a/hw/spapr.c b/hw/spapr.c
index 30707ee..ad3f0ea 100644
--- a/hw/spapr.c
+++ b/hw/spapr.c
@@ -584,7 +584,7 @@ static void emulate_spapr_hypercall(PowerPCCPU *cpu)
         hcall_dprintf("Hypercall made with MSR[PR]=1\n");
         env->gpr[3] = H_PRIVILEGE;
     } else {
-        env->gpr[3] = spapr_hypercall(env, env->gpr[3], &env->gpr[4]);
+        env->gpr[3] = spapr_hypercall(cpu, env->gpr[3], &env->gpr[4]);
     }
 }
 
diff --git a/hw/spapr.h b/hw/spapr.h
index 51c709e..f11028d 100644
--- a/hw/spapr.h
+++ b/hw/spapr.h
@@ -291,7 +291,7 @@ typedef target_ulong (*spapr_hcall_fn)(CPUPPCState *env, sPAPREnvironment *spapr
                                        target_ulong *args);
 
 void spapr_register_hypercall(target_ulong opcode, spapr_hcall_fn fn);
-target_ulong spapr_hypercall(CPUPPCState *env, target_ulong opcode,
+target_ulong spapr_hypercall(PowerPCCPU *cpu, target_ulong opcode,
                              target_ulong *args);
 
 int spapr_allocate_irq(int hint, bool lsi);
diff --git a/hw/spapr_hcall.c b/hw/spapr_hcall.c
index 621dabd..b1e8704 100644
--- a/hw/spapr_hcall.c
+++ b/hw/spapr_hcall.c
@@ -679,9 +679,11 @@ void spapr_register_hypercall(target_ulong opcode, spapr_hcall_fn fn)
     *slot = fn;
 }
 
-target_ulong spapr_hypercall(CPUPPCState *env, target_ulong opcode,
+target_ulong spapr_hypercall(PowerPCCPU *cpu, target_ulong opcode,
                              target_ulong *args)
 {
+    CPUPPCState *env = &cpu->env;
+
     if ((opcode <= MAX_HCALL_OPCODE)
         && ((opcode & 0x3) == 0)) {
         spapr_hcall_fn fn = papr_hypercall_table[opcode / 4];
diff --git a/target-ppc/kvm.c b/target-ppc/kvm.c
index 6aacff0..3f5df57 100644
--- a/target-ppc/kvm.c
+++ b/target-ppc/kvm.c
@@ -817,7 +817,8 @@ int kvm_arch_handle_exit(CPUPPCState *env, struct kvm_run *run)
 #ifdef CONFIG_PSERIES
     case KVM_EXIT_PAPR_HCALL:
         dprintf("handle PAPR hypercall\n");
-        run->papr_hcall.ret = spapr_hypercall(env, run->papr_hcall.nr,
+        run->papr_hcall.ret = spapr_hypercall(ppc_env_get_cpu(env),
+                                              run->papr_hcall.nr,
                                               run->papr_hcall.args);
         ret = 0;
         break;
-- 
1.7.10.4

[Qemu-devel] [PATCH 28/35] spapr: Pass PowerPCCPU to hypercalls

[Andreas Färber]

Needed for changing cpu_has_work() argument type to CPUState,
used in h_cede().

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 hw/spapr.h       |    2 +-
 hw/spapr_hcall.c |   38 +++++++++++++++++++++-----------------
 hw/spapr_iommu.c |    2 +-
 hw/spapr_llan.c  |   10 +++++-----
 hw/spapr_vio.c   |   10 +++++-----
 hw/spapr_vty.c   |    4 ++--
 hw/xics.c        |   11 +++++++----
 7 Dateien geändert, 42 Zeilen hinzugefügt(+), 35 Zeilen entfernt(-)

diff --git a/hw/spapr.h b/hw/spapr.h
index f11028d..efe7f57 100644
--- a/hw/spapr.h
+++ b/hw/spapr.h
@@ -286,7 +286,7 @@ extern sPAPREnvironment *spapr;
     do { } while (0)
 #endif
 
-typedef target_ulong (*spapr_hcall_fn)(CPUPPCState *env, sPAPREnvironment *spapr,
+typedef target_ulong (*spapr_hcall_fn)(PowerPCCPU *cpu, sPAPREnvironment *spapr,
                                        target_ulong opcode,
                                        target_ulong *args);
 
diff --git a/hw/spapr_hcall.c b/hw/spapr_hcall.c
index b1e8704..c6d55da 100644
--- a/hw/spapr_hcall.c
+++ b/hw/spapr_hcall.c
@@ -75,9 +75,10 @@ static target_ulong compute_tlbie_rb(target_ulong v, target_ulong r,
     return rb;
 }
 
-static target_ulong h_enter(CPUPPCState *env, sPAPREnvironment *spapr,
+static target_ulong h_enter(PowerPCCPU *cpu, sPAPREnvironment *spapr,
                             target_ulong opcode, target_ulong *args)
 {
+    CPUPPCState *env = &cpu->env;
     target_ulong flags = args[0];
     target_ulong pte_index = args[1];
     target_ulong pteh = args[2];
@@ -192,9 +193,10 @@ static target_ulong remove_hpte(CPUPPCState *env, target_ulong ptex,
     return REMOVE_SUCCESS;
 }
 
-static target_ulong h_remove(CPUPPCState *env, sPAPREnvironment *spapr,
+static target_ulong h_remove(PowerPCCPU *cpu, sPAPREnvironment *spapr,
                              target_ulong opcode, target_ulong *args)
 {
+    CPUPPCState *env = &cpu->env;
     target_ulong flags = args[0];
     target_ulong pte_index = args[1];
     target_ulong avpn = args[2];
@@ -238,9 +240,10 @@ static target_ulong h_remove(CPUPPCState *env, sPAPREnvironment *spapr,
 
 #define H_BULK_REMOVE_MAX_BATCH        4
 
-static target_ulong h_bulk_remove(CPUPPCState *env, sPAPREnvironment *spapr,
+static target_ulong h_bulk_remove(PowerPCCPU *cpu, sPAPREnvironment *spapr,
                                   target_ulong opcode, target_ulong *args)
 {
+    CPUPPCState *env = &cpu->env;
     int i;
 
     for (i = 0; i < H_BULK_REMOVE_MAX_BATCH; i++) {
@@ -284,9 +287,10 @@ static target_ulong h_bulk_remove(CPUPPCState *env, sPAPREnvironment *spapr,
     return H_SUCCESS;
 }
 
-static target_ulong h_protect(CPUPPCState *env, sPAPREnvironment *spapr,
+static target_ulong h_protect(PowerPCCPU *cpu, sPAPREnvironment *spapr,
                               target_ulong opcode, target_ulong *args)
 {
+    CPUPPCState *env = &cpu->env;
     target_ulong flags = args[0];
     target_ulong pte_index = args[1];
     target_ulong avpn = args[2];
@@ -321,7 +325,7 @@ static target_ulong h_protect(CPUPPCState *env, sPAPREnvironment *spapr,
     return H_SUCCESS;
 }
 
-static target_ulong h_set_dabr(CPUPPCState *env, sPAPREnvironment *spapr,
+static target_ulong h_set_dabr(PowerPCCPU *cpu, sPAPREnvironment *spapr,
                                target_ulong opcode, target_ulong *args)
 {
     /* FIXME: actually implement this */
@@ -457,7 +461,7 @@ static target_ulong deregister_dtl(CPUPPCState *env, target_ulong addr)
     return H_SUCCESS;
 }
 
-static target_ulong h_register_vpa(CPUPPCState *env, sPAPREnvironment *spapr,
+static target_ulong h_register_vpa(PowerPCCPU *cpu, sPAPREnvironment *spapr,
                                    target_ulong opcode, target_ulong *args)
 {
     target_ulong flags = args[0];
@@ -505,9 +509,11 @@ static target_ulong h_register_vpa(CPUPPCState *env, sPAPREnvironment *spapr,
     return ret;
 }
 
-static target_ulong h_cede(CPUPPCState *env, sPAPREnvironment *spapr,
+static target_ulong h_cede(PowerPCCPU *cpu, sPAPREnvironment *spapr,
                            target_ulong opcode, target_ulong *args)
 {
+    CPUPPCState *env = &cpu->env;
+
     env->msr |= (1ULL << MSR_EE);
     hreg_compute_hflags(env);
     if (!cpu_has_work(env)) {
@@ -518,7 +524,7 @@ static target_ulong h_cede(CPUPPCState *env, sPAPREnvironment *spapr,
     return H_SUCCESS;
 }
 
-static target_ulong h_rtas(CPUPPCState *env, sPAPREnvironment *spapr,
+static target_ulong h_rtas(PowerPCCPU *cpu, sPAPREnvironment *spapr,
                            target_ulong opcode, target_ulong *args)
 {
     target_ulong rtas_r3 = args[0];
@@ -530,7 +536,7 @@ static target_ulong h_rtas(CPUPPCState *env, sPAPREnvironment *spapr,
                            nret, rtas_r3 + 12 + 4*nargs);
 }
 
-static target_ulong h_logical_load(CPUPPCState *env, sPAPREnvironment *spapr,
+static target_ulong h_logical_load(PowerPCCPU *cpu, sPAPREnvironment *spapr,
                                    target_ulong opcode, target_ulong *args)
 {
     target_ulong size = args[0];
@@ -553,7 +559,7 @@ static target_ulong h_logical_load(CPUPPCState *env, sPAPREnvironment *spapr,
     return H_PARAMETER;
 }
 
-static target_ulong h_logical_store(CPUPPCState *env, sPAPREnvironment *spapr,
+static target_ulong h_logical_store(PowerPCCPU *cpu, sPAPREnvironment *spapr,
                                     target_ulong opcode, target_ulong *args)
 {
     target_ulong size = args[0];
@@ -577,7 +583,7 @@ static target_ulong h_logical_store(CPUPPCState *env, sPAPREnvironment *spapr,
     return H_PARAMETER;
 }
 
-static target_ulong h_logical_memop(CPUPPCState *env, sPAPREnvironment *spapr,
+static target_ulong h_logical_memop(PowerPCCPU *cpu, sPAPREnvironment *spapr,
                                     target_ulong opcode, target_ulong *args)
 {
     target_ulong dst   = args[0]; /* Destination address */
@@ -644,14 +650,14 @@ static target_ulong h_logical_memop(CPUPPCState *env, sPAPREnvironment *spapr,
     return H_SUCCESS;
 }
 
-static target_ulong h_logical_icbi(CPUPPCState *env, sPAPREnvironment *spapr,
+static target_ulong h_logical_icbi(PowerPCCPU *cpu, sPAPREnvironment *spapr,
                                    target_ulong opcode, target_ulong *args)
 {
     /* Nothing to do on emulation, KVM will trap this in the kernel */
     return H_SUCCESS;
 }
 
-static target_ulong h_logical_dcbf(CPUPPCState *env, sPAPREnvironment *spapr,
+static target_ulong h_logical_dcbf(PowerPCCPU *cpu, sPAPREnvironment *spapr,
                                    target_ulong opcode, target_ulong *args)
 {
     /* Nothing to do on emulation, KVM will trap this in the kernel */
@@ -682,21 +688,19 @@ void spapr_register_hypercall(target_ulong opcode, spapr_hcall_fn fn)
 target_ulong spapr_hypercall(PowerPCCPU *cpu, target_ulong opcode,
                              target_ulong *args)
 {
-    CPUPPCState *env = &cpu->env;
-
     if ((opcode <= MAX_HCALL_OPCODE)
         && ((opcode & 0x3) == 0)) {
         spapr_hcall_fn fn = papr_hypercall_table[opcode / 4];
 
         if (fn) {
-            return fn(env, spapr, opcode, args);
+            return fn(cpu, spapr, opcode, args);
         }
     } else if ((opcode >= KVMPPC_HCALL_BASE) &&
                (opcode <= KVMPPC_HCALL_MAX)) {
         spapr_hcall_fn fn = kvmppc_hypercall_table[opcode - KVMPPC_HCALL_BASE];
 
         if (fn) {
-            return fn(env, spapr, opcode, args);
+            return fn(cpu, spapr, opcode, args);
         }
     }
 
diff --git a/hw/spapr_iommu.c b/hw/spapr_iommu.c
index 86dc8f9..02d78cc 100644
--- a/hw/spapr_iommu.c
+++ b/hw/spapr_iommu.c
@@ -204,7 +204,7 @@ static target_ulong put_tce_emu(sPAPRTCETable *tcet, target_ulong ioba,
     return H_SUCCESS;
 }
 
-static target_ulong h_put_tce(CPUPPCState *env, sPAPREnvironment *spapr,
+static target_ulong h_put_tce(PowerPCCPU *cpu, sPAPREnvironment *spapr,
                               target_ulong opcode, target_ulong *args)
 {
     target_ulong liobn = args[0];
diff --git a/hw/spapr_llan.c b/hw/spapr_llan.c
index bd3f131..09ad69f 100644
--- a/hw/spapr_llan.c
+++ b/hw/spapr_llan.c
@@ -264,7 +264,7 @@ static int check_bd(VIOsPAPRVLANDevice *dev, vlan_bd_t bd,
     return 0;
 }
 
-static target_ulong h_register_logical_lan(CPUPPCState *env,
+static target_ulong h_register_logical_lan(PowerPCCPU *cpu,
                                            sPAPREnvironment *spapr,
                                            target_ulong opcode,
                                            target_ulong *args)
@@ -328,7 +328,7 @@ static target_ulong h_register_logical_lan(CPUPPCState *env,
 }
 
 
-static target_ulong h_free_logical_lan(CPUPPCState *env, sPAPREnvironment *spapr,
+static target_ulong h_free_logical_lan(PowerPCCPU *cpu, sPAPREnvironment *spapr,
                                        target_ulong opcode, target_ulong *args)
 {
     target_ulong reg = args[0];
@@ -349,7 +349,7 @@ static target_ulong h_free_logical_lan(CPUPPCState *env, sPAPREnvironment *spapr
     return H_SUCCESS;
 }
 
-static target_ulong h_add_logical_lan_buffer(CPUPPCState *env,
+static target_ulong h_add_logical_lan_buffer(PowerPCCPU *cpu,
                                              sPAPREnvironment *spapr,
                                              target_ulong opcode,
                                              target_ulong *args)
@@ -398,7 +398,7 @@ static target_ulong h_add_logical_lan_buffer(CPUPPCState *env,
     return H_SUCCESS;
 }
 
-static target_ulong h_send_logical_lan(CPUPPCState *env, sPAPREnvironment *spapr,
+static target_ulong h_send_logical_lan(PowerPCCPU *cpu, sPAPREnvironment *spapr,
                                        target_ulong opcode, target_ulong *args)
 {
     target_ulong reg = args[0];
@@ -467,7 +467,7 @@ static target_ulong h_send_logical_lan(CPUPPCState *env, sPAPREnvironment *spapr
     return H_SUCCESS;
 }
 
-static target_ulong h_multicast_ctrl(CPUPPCState *env, sPAPREnvironment *spapr,
+static target_ulong h_multicast_ctrl(PowerPCCPU *cpu, sPAPREnvironment *spapr,
                                      target_ulong opcode, target_ulong *args)
 {
     target_ulong reg = args[0];
diff --git a/hw/spapr_vio.c b/hw/spapr_vio.c
index 848806d..1f19fed 100644
--- a/hw/spapr_vio.c
+++ b/hw/spapr_vio.c
@@ -161,7 +161,7 @@ static int vio_make_devnode(VIOsPAPRDevice *dev,
 /*
  * CRQ handling
  */
-static target_ulong h_reg_crq(CPUPPCState *env, sPAPREnvironment *spapr,
+static target_ulong h_reg_crq(PowerPCCPU *cpu, sPAPREnvironment *spapr,
                               target_ulong opcode, target_ulong *args)
 {
     target_ulong reg = args[0];
@@ -219,7 +219,7 @@ static target_ulong free_crq(VIOsPAPRDevice *dev)
     return H_SUCCESS;
 }
 
-static target_ulong h_free_crq(CPUPPCState *env, sPAPREnvironment *spapr,
+static target_ulong h_free_crq(PowerPCCPU *cpu, sPAPREnvironment *spapr,
                                target_ulong opcode, target_ulong *args)
 {
     target_ulong reg = args[0];
@@ -233,7 +233,7 @@ static target_ulong h_free_crq(CPUPPCState *env, sPAPREnvironment *spapr,
     return free_crq(dev);
 }
 
-static target_ulong h_send_crq(CPUPPCState *env, sPAPREnvironment *spapr,
+static target_ulong h_send_crq(PowerPCCPU *cpu, sPAPREnvironment *spapr,
                                target_ulong opcode, target_ulong *args)
 {
     target_ulong reg = args[0];
@@ -256,7 +256,7 @@ static target_ulong h_send_crq(CPUPPCState *env, sPAPREnvironment *spapr,
     return H_HARDWARE;
 }
 
-static target_ulong h_enable_crq(CPUPPCState *env, sPAPREnvironment *spapr,
+static target_ulong h_enable_crq(PowerPCCPU *cpu, sPAPREnvironment *spapr,
                                  target_ulong opcode, target_ulong *args)
 {
     target_ulong reg = args[0];
@@ -463,7 +463,7 @@ static int spapr_vio_busdev_init(DeviceState *qdev)
     return pc->init(dev);
 }
 
-static target_ulong h_vio_signal(CPUPPCState *env, sPAPREnvironment *spapr,
+static target_ulong h_vio_signal(PowerPCCPU *cpu, sPAPREnvironment *spapr,
                                  target_ulong opcode,
                                  target_ulong *args)
 {
diff --git a/hw/spapr_vty.c b/hw/spapr_vty.c
index 5da17a3..14f862f 100644
--- a/hw/spapr_vty.c
+++ b/hw/spapr_vty.c
@@ -70,7 +70,7 @@ static int spapr_vty_init(VIOsPAPRDevice *sdev)
 }
 
 /* Forward declaration */
-static target_ulong h_put_term_char(CPUPPCState *env, sPAPREnvironment *spapr,
+static target_ulong h_put_term_char(PowerPCCPU *cpu, sPAPREnvironment *spapr,
                                     target_ulong opcode, target_ulong *args)
 {
     target_ulong reg = args[0];
@@ -97,7 +97,7 @@ static target_ulong h_put_term_char(CPUPPCState *env, sPAPREnvironment *spapr,
     return H_SUCCESS;
 }
 
-static target_ulong h_get_term_char(CPUPPCState *env, sPAPREnvironment *spapr,
+static target_ulong h_get_term_char(PowerPCCPU *cpu, sPAPREnvironment *spapr,
                                     target_ulong opcode, target_ulong *args)
 {
     target_ulong reg = args[0];
diff --git a/hw/xics.c b/hw/xics.c
index ce88aa7..91e4e6b 100644
--- a/hw/xics.c
+++ b/hw/xics.c
@@ -342,16 +342,17 @@ void xics_set_irq_type(struct icp_state *icp, int irq, bool lsi)
     icp->ics->irqs[irq - icp->ics->offset].lsi = lsi;
 }
 
-static target_ulong h_cppr(CPUPPCState *env, sPAPREnvironment *spapr,
+static target_ulong h_cppr(PowerPCCPU *cpu, sPAPREnvironment *spapr,
                            target_ulong opcode, target_ulong *args)
 {
+    CPUPPCState *env = &cpu->env;
     target_ulong cppr = args[0];
 
     icp_set_cppr(spapr->icp, env->cpu_index, cppr);
     return H_SUCCESS;
 }
 
-static target_ulong h_ipi(CPUPPCState *env, sPAPREnvironment *spapr,
+static target_ulong h_ipi(PowerPCCPU *cpu, sPAPREnvironment *spapr,
                           target_ulong opcode, target_ulong *args)
 {
     target_ulong server = args[0];
@@ -366,18 +367,20 @@ static target_ulong h_ipi(CPUPPCState *env, sPAPREnvironment *spapr,
 
 }
 
-static target_ulong h_xirr(CPUPPCState *env, sPAPREnvironment *spapr,
+static target_ulong h_xirr(PowerPCCPU *cpu, sPAPREnvironment *spapr,
                            target_ulong opcode, target_ulong *args)
 {
+    CPUPPCState *env = &cpu->env;
     uint32_t xirr = icp_accept(spapr->icp->ss + env->cpu_index);
 
     args[0] = xirr;
     return H_SUCCESS;
 }
 
-static target_ulong h_eoi(CPUPPCState *env, sPAPREnvironment *spapr,
+static target_ulong h_eoi(PowerPCCPU *cpu, sPAPREnvironment *spapr,
                           target_ulong opcode, target_ulong *args)
 {
+    CPUPPCState *env = &cpu->env;
     target_ulong xirr = args[0];
 
     icp_eoi(spapr->icp, env->cpu_index, xirr);
-- 
1.7.10.4

[Qemu-devel] [PATCH 29/35] cpus: Pass CPUState to [qemu_]cpu_has_work()

[Andreas Färber]

For target-mips also change the return type to bool.

Make include paths for cpu-qom.h consistent for alpha and unicore32.

Signed-off-by: Andreas Färber <afaerber@suse.de>
[AF: Updated new target-openrisc function accordingly]
---
 cpu-all.h               |    2 --
 cpu-exec.c              |    8 +++-----
 cpus.c                  |    2 +-
 hw/spapr_hcall.c        |    2 +-
 hw/xtensa_pic.c         |    2 +-
 include/qemu/cpu.h      |   10 ++++++++++
 target-alpha/cpu.c      |    2 +-
 target-alpha/cpu.h      |    4 +++-
 target-arm/cpu.h        |    4 +++-
 target-cris/cpu.h       |    4 +++-
 target-i386/cpu.h       |    4 +++-
 target-lm32/cpu.h       |    4 +++-
 target-m68k/cpu.h       |    4 +++-
 target-microblaze/cpu.h |    4 +++-
 target-mips/cpu.h       |   11 ++++++-----
 target-openrisc/cpu.h   |    4 +++-
 target-ppc/cpu.h        |    4 +++-
 target-s390x/cpu.h      |    4 +++-
 target-sh4/cpu.h        |    4 +++-
 target-sparc/cpu.h      |    4 +++-
 target-unicore32/cpu.c  |    2 +-
 target-unicore32/cpu.h  |    4 +++-
 target-xtensa/cpu.h     |    4 +++-
 23 Dateien geändert, 66 Zeilen hinzugefügt(+), 31 Zeilen entfernt(-)

diff --git a/cpu-all.h b/cpu-all.h
index d19ec12..0356684 100644
--- a/cpu-all.h
+++ b/cpu-all.h
@@ -438,8 +438,6 @@ void cpu_reset_interrupt(CPUArchState *env, int mask);
 
 void cpu_exit(CPUArchState *s);
 
-bool qemu_cpu_has_work(CPUArchState *env);
-
 /* Breakpoint/watchpoint flags */
 #define BP_MEM_READ           0x01
 #define BP_MEM_WRITE          0x02
diff --git a/cpu-exec.c b/cpu-exec.c
index 252da86..904ee73 100644
--- a/cpu-exec.c
+++ b/cpu-exec.c
@@ -27,9 +27,9 @@ int tb_invalidated_flag;
 
 //#define CONFIG_DEBUG_EXEC
 
-bool qemu_cpu_has_work(CPUArchState *env)
+bool qemu_cpu_has_work(CPUState *cpu)
 {
-    return cpu_has_work(env);
+    return cpu_has_work(cpu);
 }
 
 void cpu_loop_exit(CPUArchState *env)
@@ -181,16 +181,14 @@ volatile sig_atomic_t exit_request;
 
 int cpu_exec(CPUArchState *env)
 {
-#ifdef TARGET_PPC
     CPUState *cpu = ENV_GET_CPU(env);
-#endif
     int ret, interrupt_request;
     TranslationBlock *tb;
     uint8_t *tc_ptr;
     tcg_target_ulong next_tb;
 
     if (env->halted) {
-        if (!cpu_has_work(env)) {
+        if (!cpu_has_work(cpu)) {
             return EXCP_HALTED;
         }
 
diff --git a/cpus.c b/cpus.c
index 6baf2bc..76f32fc 100644
--- a/cpus.c
+++ b/cpus.c
@@ -72,7 +72,7 @@ static bool cpu_thread_is_idle(CPUArchState *env)
     if (cpu->stopped || !runstate_is_running()) {
         return true;
     }
-    if (!env->halted || qemu_cpu_has_work(env) ||
+    if (!env->halted || qemu_cpu_has_work(cpu) ||
         kvm_async_interrupts_enabled()) {
         return false;
     }
diff --git a/hw/spapr_hcall.c b/hw/spapr_hcall.c
index c6d55da..63cadb8 100644
--- a/hw/spapr_hcall.c
+++ b/hw/spapr_hcall.c
@@ -516,7 +516,7 @@ static target_ulong h_cede(PowerPCCPU *cpu, sPAPREnvironment *spapr,
 
     env->msr |= (1ULL << MSR_EE);
     hreg_compute_hflags(env);
-    if (!cpu_has_work(env)) {
+    if (!cpu_has_work(CPU(cpu))) {
         env->halted = 1;
         env->exception_index = EXCP_HLT;
         env->exit_request = 1;
diff --git a/hw/xtensa_pic.c b/hw/xtensa_pic.c
index 8b9c051..1ec70cd 100644
--- a/hw/xtensa_pic.c
+++ b/hw/xtensa_pic.c
@@ -131,7 +131,7 @@ static void xtensa_ccompare_cb(void *opaque)
     if (env->halted) {
         env->halt_clock = qemu_get_clock_ns(vm_clock);
         xtensa_advance_ccount(env, env->wake_ccount - env->sregs[CCOUNT]);
-        if (!cpu_has_work(env)) {
+        if (!cpu_has_work(CPU(cpu))) {
             env->sregs[CCOUNT] = env->wake_ccount + 1;
             xtensa_rearm_ccompare_timer(env);
         }
diff --git a/include/qemu/cpu.h b/include/qemu/cpu.h
index eea6175..f04da6e 100644
--- a/include/qemu/cpu.h
+++ b/include/qemu/cpu.h
@@ -87,6 +87,16 @@ struct CPUState {
 void cpu_reset(CPUState *cpu);
 
 /**
+ * qemu_cpu_has_work:
+ * @cpu: The vCPU to check.
+ *
+ * Checks whether the CPU has work to do.
+ *
+ * Returns: %true if the CPU has work, %false otherwise.
+ */
+bool qemu_cpu_has_work(CPUState *cpu);
+
+/**
  * qemu_cpu_is_self:
  * @cpu: The vCPU to check against.
  *
diff --git a/target-alpha/cpu.c b/target-alpha/cpu.c
index 62d2a66..11a19eb 100644
--- a/target-alpha/cpu.c
+++ b/target-alpha/cpu.c
@@ -19,7 +19,7 @@
  * <http://www.gnu.org/licenses/lgpl-2.1.html>
  */
 
-#include "cpu-qom.h"
+#include "cpu.h"
 #include "qemu-common.h"
 
 
diff --git a/target-alpha/cpu.h b/target-alpha/cpu.h
index 8f131b7..34221fb 100644
--- a/target-alpha/cpu.h
+++ b/target-alpha/cpu.h
@@ -510,8 +510,10 @@ static inline void cpu_set_tls(CPUAlphaState *env, target_ulong newtls)
 }
 #endif
 
-static inline bool cpu_has_work(CPUAlphaState *env)
+static inline bool cpu_has_work(CPUState *cpu)
 {
+    CPUAlphaState *env = &ALPHA_CPU(cpu)->env;
+
     /* Here we are checking to see if the CPU should wake up from HALT.
        We will have gotten into this state only for WTINT from PALmode.  */
     /* ??? I'm not sure how the IPL state works with WTINT to keep a CPU
diff --git a/target-arm/cpu.h b/target-arm/cpu.h
index ff4de10..e4ff918 100644
--- a/target-arm/cpu.h
+++ b/target-arm/cpu.h
@@ -718,8 +718,10 @@ static inline void cpu_get_tb_cpu_state(CPUARMState *env, target_ulong *pc,
     }
 }
 
-static inline bool cpu_has_work(CPUARMState *env)
+static inline bool cpu_has_work(CPUState *cpu)
 {
+    CPUARMState *env = &ARM_CPU(cpu)->env;
+
     return env->interrupt_request &
         (CPU_INTERRUPT_FIQ | CPU_INTERRUPT_HARD | CPU_INTERRUPT_EXITTB);
 }
diff --git a/target-cris/cpu.h b/target-cris/cpu.h
index 4f4df6d..2c27506 100644
--- a/target-cris/cpu.h
+++ b/target-cris/cpu.h
@@ -285,8 +285,10 @@ static inline void cpu_get_tb_cpu_state(CPUCRISState *env, target_ulong *pc,
 #define cpu_list cris_cpu_list
 void cris_cpu_list(FILE *f, fprintf_function cpu_fprintf);
 
-static inline bool cpu_has_work(CPUCRISState *env)
+static inline bool cpu_has_work(CPUState *cpu)
 {
+    CPUCRISState *env = &CRIS_CPU(cpu)->env;
+
     return env->interrupt_request & (CPU_INTERRUPT_HARD | CPU_INTERRUPT_NMI);
 }
 
diff --git a/target-i386/cpu.h b/target-i386/cpu.h
index d840914..2d7b4c3 100644
--- a/target-i386/cpu.h
+++ b/target-i386/cpu.h
@@ -1100,8 +1100,10 @@ static inline void cpu_clone_regs(CPUX86State *env, target_ulong newsp)
 #include "hw/apic.h"
 #endif
 
-static inline bool cpu_has_work(CPUX86State *env)
+static inline bool cpu_has_work(CPUState *cpu)
 {
+    CPUX86State *env = &X86_CPU(cpu)->env;
+
     return ((env->interrupt_request & (CPU_INTERRUPT_HARD |
                                        CPU_INTERRUPT_POLL)) &&
             (env->eflags & IF_MASK)) ||
diff --git a/target-lm32/cpu.h b/target-lm32/cpu.h
index da80469..7243b4f 100644
--- a/target-lm32/cpu.h
+++ b/target-lm32/cpu.h
@@ -253,8 +253,10 @@ static inline void cpu_get_tb_cpu_state(CPULM32State *env, target_ulong *pc,
     *flags = 0;
 }
 
-static inline bool cpu_has_work(CPULM32State *env)
+static inline bool cpu_has_work(CPUState *cpu)
 {
+    CPULM32State *env = &LM32_CPU(cpu)->env;
+
     return env->interrupt_request & CPU_INTERRUPT_HARD;
 }
 
diff --git a/target-m68k/cpu.h b/target-m68k/cpu.h
index 5e6ee50..780e2c9 100644
--- a/target-m68k/cpu.h
+++ b/target-m68k/cpu.h
@@ -257,8 +257,10 @@ static inline void cpu_get_tb_cpu_state(CPUM68KState *env, target_ulong *pc,
             | ((env->macsr >> 4) & 0xf);        /* Bits 0-3 */
 }
 
-static inline bool cpu_has_work(CPUM68KState *env)
+static inline bool cpu_has_work(CPUState *cpu)
 {
+    CPUM68KState *env = &M68K_CPU(cpu)->env;
+
     return env->interrupt_request & CPU_INTERRUPT_HARD;
 }
 
diff --git a/target-microblaze/cpu.h b/target-microblaze/cpu.h
index 37bbdf1..585bbd6 100644
--- a/target-microblaze/cpu.h
+++ b/target-microblaze/cpu.h
@@ -374,8 +374,10 @@ void cpu_unassigned_access(CPUMBState *env1, hwaddr addr,
                            int is_write, int is_exec, int is_asi, int size);
 #endif
 
-static inline bool cpu_has_work(CPUMBState *env)
+static inline bool cpu_has_work(CPUState *cpu)
 {
+    CPUMBState *env = &MICROBLAZE_CPU(cpu)->env;
+
     return env->interrupt_request & (CPU_INTERRUPT_HARD | CPU_INTERRUPT_NMI);
 }
 
diff --git a/target-mips/cpu.h b/target-mips/cpu.h
index c4ca285..38943de 100644
--- a/target-mips/cpu.h
+++ b/target-mips/cpu.h
@@ -706,16 +706,17 @@ static inline int mips_vpe_active(CPUMIPSState *env)
     return active;
 }
 
-static inline int cpu_has_work(CPUMIPSState *env)
+static inline bool cpu_has_work(CPUState *cpu)
 {
-    int has_work = 0;
+    CPUMIPSState *env = &MIPS_CPU(cpu)->env;
+    bool has_work = false;
 
     /* It is implementation dependent if non-enabled interrupts
        wake-up the CPU, however most of the implementations only
        check for interrupts that can be taken. */
     if ((env->interrupt_request & CPU_INTERRUPT_HARD) &&
         cpu_mips_hw_interrupts_pending(env)) {
-        has_work = 1;
+        has_work = true;
     }
 
     /* MIPS-MT has the ability to halt the CPU.  */
@@ -723,11 +724,11 @@ static inline int cpu_has_work(CPUMIPSState *env)
         /* The QEMU model will issue an _WAKE request whenever the CPUs
            should be woken up.  */
         if (env->interrupt_request & CPU_INTERRUPT_WAKE) {
-            has_work = 1;
+            has_work = true;
         }
 
         if (!mips_vpe_active(env)) {
-            has_work = 0;
+            has_work = false;
         }
     }
     return has_work;
diff --git a/target-openrisc/cpu.h b/target-openrisc/cpu.h
index a701d36..d42ffb0 100644
--- a/target-openrisc/cpu.h
+++ b/target-openrisc/cpu.h
@@ -437,8 +437,10 @@ static inline int cpu_mmu_index(CPUOpenRISCState *env)
 }
 
 #define CPU_INTERRUPT_TIMER   CPU_INTERRUPT_TGT_INT_0
-static inline bool cpu_has_work(CPUOpenRISCState *env)
+static inline bool cpu_has_work(CPUState *cpu)
 {
+    CPUOpenRISCState *env = &OPENRISC_CPU(cpu)->env;
+
     return env->interrupt_request & (CPU_INTERRUPT_HARD |
                                      CPU_INTERRUPT_TIMER);
 }
diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h
index 5574042..ed491d2 100644
--- a/target-ppc/cpu.h
+++ b/target-ppc/cpu.h
@@ -2222,8 +2222,10 @@ static inline bool msr_is_64bit(CPUPPCState *env, target_ulong msr)
 
 extern void (*cpu_ppc_hypercall)(PowerPCCPU *);
 
-static inline bool cpu_has_work(CPUPPCState *env)
+static inline bool cpu_has_work(CPUState *cpu)
 {
+    CPUPPCState *env = &POWERPC_CPU(cpu)->env;
+
     return msr_ee && (env->interrupt_request & CPU_INTERRUPT_HARD);
 }
 
diff --git a/target-s390x/cpu.h b/target-s390x/cpu.h
index 5be6e83..0f9a1f7 100644
--- a/target-s390x/cpu.h
+++ b/target-s390x/cpu.h
@@ -977,8 +977,10 @@ static inline void cpu_inject_ext(CPUS390XState *env, uint32_t code, uint32_t pa
     cpu_interrupt(env, CPU_INTERRUPT_HARD);
 }
 
-static inline bool cpu_has_work(CPUS390XState *env)
+static inline bool cpu_has_work(CPUState *cpu)
 {
+    CPUS390XState *env = &S390_CPU(cpu)->env;
+
     return (env->interrupt_request & CPU_INTERRUPT_HARD) &&
         (env->psw.mask & PSW_MASK_EXT);
 }
diff --git a/target-sh4/cpu.h b/target-sh4/cpu.h
index 782159e..9a0e72b 100644
--- a/target-sh4/cpu.h
+++ b/target-sh4/cpu.h
@@ -371,8 +371,10 @@ static inline void cpu_get_tb_cpu_state(CPUSH4State *env, target_ulong *pc,
             | (env->movcal_backup ? TB_FLAG_PENDING_MOVCA : 0); /* Bit 4 */
 }
 
-static inline bool cpu_has_work(CPUSH4State *env)
+static inline bool cpu_has_work(CPUState *cpu)
 {
+    CPUSH4State *env = &SUPERH_CPU(cpu)->env;
+
     return env->interrupt_request & CPU_INTERRUPT_HARD;
 }
 
diff --git a/target-sparc/cpu.h b/target-sparc/cpu.h
index a55fe08..6aa82b3 100644
--- a/target-sparc/cpu.h
+++ b/target-sparc/cpu.h
@@ -764,8 +764,10 @@ static inline bool tb_am_enabled(int tb_flags)
 #endif
 }
 
-static inline bool cpu_has_work(CPUSPARCState *env1)
+static inline bool cpu_has_work(CPUState *cpu)
 {
+    CPUSPARCState *env1 = &SPARC_CPU(cpu)->env;
+
     return (env1->interrupt_request & CPU_INTERRUPT_HARD) &&
            cpu_interrupts_enabled(env1);
 }
diff --git a/target-unicore32/cpu.c b/target-unicore32/cpu.c
index 3425bbe..884c101 100644
--- a/target-unicore32/cpu.c
+++ b/target-unicore32/cpu.c
@@ -12,7 +12,7 @@
  * or (at your option) any later version.
  */
 
-#include "cpu-qom.h"
+#include "cpu.h"
 #include "qemu-common.h"
 
 static inline void set_feature(CPUUniCore32State *env, int feature)
diff --git a/target-unicore32/cpu.h b/target-unicore32/cpu.h
index 06508a1..676c5d9 100644
--- a/target-unicore32/cpu.h
+++ b/target-unicore32/cpu.h
@@ -181,8 +181,10 @@ void uc32_translate_init(void);
 void do_interrupt(CPUUniCore32State *);
 void switch_mode(CPUUniCore32State *, int);
 
-static inline bool cpu_has_work(CPUUniCore32State *env)
+static inline bool cpu_has_work(CPUState *cpu)
 {
+    CPUUniCore32State *env = &UNICORE32_CPU(cpu)->env;
+
     return env->interrupt_request &
         (CPU_INTERRUPT_HARD | CPU_INTERRUPT_EXITTB);
 }
diff --git a/target-xtensa/cpu.h b/target-xtensa/cpu.h
index 7348277..74e9888 100644
--- a/target-xtensa/cpu.h
+++ b/target-xtensa/cpu.h
@@ -501,8 +501,10 @@ static inline void cpu_get_tb_cpu_state(CPUXtensaState *env, target_ulong *pc,
 #include "cpu-all.h"
 #include "exec-all.h"
 
-static inline int cpu_has_work(CPUXtensaState *env)
+static inline int cpu_has_work(CPUState *cpu)
 {
+    CPUXtensaState *env = &XTENSA_CPU(cpu)->env;
+
     return env->pending_irq_level;
 }
 
-- 
1.7.10.4

[Qemu-devel] [PATCH 30/35] target-i386: Pass X86CPU to kvm_mce_inject()

[Andreas Färber]

Needed for changing cpu_x86_inject_mce() argument to X86CPU.

Signed-off-by: Andreas Färber <afaerber@suse.de>
[AF: Rebased onto hwaddr]
---
 target-i386/kvm.c |    8 +++++---
 1 Datei geändert, 5 Zeilen hinzugefügt(+), 3 Zeilen entfernt(-)

diff --git a/target-i386/kvm.c b/target-i386/kvm.c
index a3491a4..5bf2f89c 100644
--- a/target-i386/kvm.c
+++ b/target-i386/kvm.c
@@ -229,8 +229,9 @@ static int kvm_get_mce_cap_supported(KVMState *s, uint64_t *mce_cap,
     return -ENOSYS;
 }
 
-static void kvm_mce_inject(CPUX86State *env, hwaddr paddr, int code)
+static void kvm_mce_inject(X86CPU *cpu, hwaddr paddr, int code)
 {
+    CPUX86State *env = &cpu->env;
     uint64_t status = MCI_STATUS_VAL | MCI_STATUS_UC | MCI_STATUS_EN |
                       MCI_STATUS_MISCV | MCI_STATUS_ADDRV | MCI_STATUS_S;
     uint64_t mcg_status = MCG_STATUS_MCIP;
@@ -256,6 +257,7 @@ static void hardware_memory_error(void)
 
 int kvm_arch_on_sigbus_vcpu(CPUX86State *env, int code, void *addr)
 {
+    X86CPU *cpu = x86_env_get_cpu(env);
     ram_addr_t ram_addr;
     hwaddr paddr;
 
@@ -273,7 +275,7 @@ int kvm_arch_on_sigbus_vcpu(CPUX86State *env, int code, void *addr)
             }
         }
         kvm_hwpoison_page_add(ram_addr);
-        kvm_mce_inject(env, paddr, code);
+        kvm_mce_inject(cpu, paddr, code);
     } else {
         if (code == BUS_MCEERR_AO) {
             return 0;
@@ -301,7 +303,7 @@ int kvm_arch_on_sigbus(int code, void *addr)
             return 0;
         }
         kvm_hwpoison_page_add(ram_addr);
-        kvm_mce_inject(first_cpu, paddr, code);
+        kvm_mce_inject(x86_env_get_cpu(first_cpu), paddr, code);
     } else {
         if (code == BUS_MCEERR_AO) {
             return 0;
-- 
1.7.10.4

[Qemu-devel] [PATCH 31/35] target-i386: Pass X86CPU to cpu_x86_inject_mce()

[Andreas Färber]

Needed for changing run_on_cpu() argument to CPUState.

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 monitor.c            |    6 ++++--
 target-i386/cpu.h    |    2 +-
 target-i386/helper.c |    3 ++-
 target-i386/kvm.c    |    2 +-
 4 Dateien geändert, 8 Zeilen hinzugefügt(+), 5 Zeilen entfernt(-)

diff --git a/monitor.c b/monitor.c
index eeef32e..c0e32d6 100644
--- a/monitor.c
+++ b/monitor.c
@@ -1988,7 +1988,8 @@ static void do_acl_remove(Monitor *mon, const QDict *qdict)
 #if defined(TARGET_I386)
 static void do_inject_mce(Monitor *mon, const QDict *qdict)
 {
-    CPUArchState *cenv;
+    X86CPU *cpu;
+    CPUX86State *cenv;
     int cpu_index = qdict_get_int(qdict, "cpu_index");
     int bank = qdict_get_int(qdict, "bank");
     uint64_t status = qdict_get_int(qdict, "status");
@@ -2001,8 +2002,9 @@ static void do_inject_mce(Monitor *mon, const QDict *qdict)
         flags |= MCE_INJECT_BROADCAST;
     }
     for (cenv = first_cpu; cenv != NULL; cenv = cenv->next_cpu) {
+        cpu = x86_env_get_cpu(cenv);
         if (cenv->cpu_index == cpu_index) {
-            cpu_x86_inject_mce(mon, cenv, bank, status, mcg_status, addr, misc,
+            cpu_x86_inject_mce(mon, cpu, bank, status, mcg_status, addr, misc,
                                flags);
             break;
         }
diff --git a/target-i386/cpu.h b/target-i386/cpu.h
index 2d7b4c3..cdc59dc 100644
--- a/target-i386/cpu.h
+++ b/target-i386/cpu.h
@@ -1135,7 +1135,7 @@ void do_cpu_sipi(X86CPU *cpu);
 #define MCE_INJECT_BROADCAST    1
 #define MCE_INJECT_UNCOND_AO    2
 
-void cpu_x86_inject_mce(Monitor *mon, CPUX86State *cenv, int bank,
+void cpu_x86_inject_mce(Monitor *mon, X86CPU *cpu, int bank,
                         uint64_t status, uint64_t mcg_status, uint64_t addr,
                         uint64_t misc, int flags);
 
diff --git a/target-i386/helper.c b/target-i386/helper.c
index 0424ccf..45f4bed 100644
--- a/target-i386/helper.c
+++ b/target-i386/helper.c
@@ -1141,10 +1141,11 @@ static void do_inject_x86_mce(void *data)
     }
 }
 
-void cpu_x86_inject_mce(Monitor *mon, CPUX86State *cenv, int bank,
+void cpu_x86_inject_mce(Monitor *mon, X86CPU *cpu, int bank,
                         uint64_t status, uint64_t mcg_status, uint64_t addr,
                         uint64_t misc, int flags)
 {
+    CPUX86State *cenv = &cpu->env;
     MCEInjectionParams params = {
         .mon = mon,
         .env = cenv,
diff --git a/target-i386/kvm.c b/target-i386/kvm.c
index 5bf2f89c..64b837b 100644
--- a/target-i386/kvm.c
+++ b/target-i386/kvm.c
@@ -243,7 +243,7 @@ static void kvm_mce_inject(X86CPU *cpu, hwaddr paddr, int code)
         status |= 0xc0;
         mcg_status |= MCG_STATUS_RIPV;
     }
-    cpu_x86_inject_mce(NULL, env, 9, status, mcg_status, paddr,
+    cpu_x86_inject_mce(NULL, cpu, 9, status, mcg_status, paddr,
                        (MCM_ADDR_PHYS << 6) | 0xc,
                        cpu_x86_support_mca_broadcast(env) ?
                        MCE_INJECT_BROADCAST : 0);
-- 
1.7.10.4

[Qemu-devel] [PATCH 32/35] cpus: Pass CPUState to run_on_cpu()

[Andreas Färber]

CPUArchState is no longer needed.

Move the declaration to include/qemu/cpu.h and add documentation.

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 cpu-all.h            |    1 -
 cpus.c               |    3 +--
 hw/kvm/apic.c        |    2 +-
 hw/kvmvapic.c        |    6 ++++--
 hw/ppce500_spin.c    |    2 +-
 include/qemu/cpu.h   |   10 ++++++++++
 kvm-all.c            |    7 +++++--
 target-i386/helper.c |    4 ++--
 8 Dateien geändert, 24 Zeilen hinzugefügt(+), 11 Zeilen entfernt(-)

diff --git a/cpu-all.h b/cpu-all.h
index 0356684..c9c51b8 100644
--- a/cpu-all.h
+++ b/cpu-all.h
@@ -464,7 +464,6 @@ void cpu_watchpoint_remove_all(CPUArchState *env, int mask);
 #define SSTEP_NOTIMER 0x4  /* Do not Timers while single stepping */
 
 void cpu_single_step(CPUArchState *env, int enabled);
-void run_on_cpu(CPUArchState *env, void (*func)(void *data), void *data);
 
 #if !defined(CONFIG_USER_ONLY)
 
diff --git a/cpus.c b/cpus.c
index 76f32fc..bee09b9 100644
--- a/cpus.c
+++ b/cpus.c
@@ -640,9 +640,8 @@ void qemu_init_cpu_loop(void)
     qemu_thread_get_self(&io_thread);
 }
 
-void run_on_cpu(CPUArchState *env, void (*func)(void *data), void *data)
+void run_on_cpu(CPUState *cpu, void (*func)(void *data), void *data)
 {
-    CPUState *cpu = ENV_GET_CPU(env);
     struct qemu_work_item wi;
 
     if (qemu_cpu_is_self(cpu)) {
diff --git a/hw/kvm/apic.c b/hw/kvm/apic.c
index e4a7307..8b65d51 100644
--- a/hw/kvm/apic.c
+++ b/hw/kvm/apic.c
@@ -143,7 +143,7 @@ static void do_inject_external_nmi(void *data)
 
 static void kvm_apic_external_nmi(APICCommonState *s)
 {
-    run_on_cpu(&s->cpu->env, do_inject_external_nmi, s);
+    run_on_cpu(CPU(s->cpu), do_inject_external_nmi, s);
 }
 
 static uint64_t kvm_apic_mem_read(void *opaque, hwaddr addr,
diff --git a/hw/kvmvapic.c b/hw/kvmvapic.c
index 5e0a7c9..dc111ee 100644
--- a/hw/kvmvapic.c
+++ b/hw/kvmvapic.c
@@ -475,11 +475,13 @@ static void vapic_enable_tpr_reporting(bool enable)
     VAPICEnableTPRReporting info = {
         .enable = enable,
     };
+    X86CPU *cpu;
     CPUX86State *env;
 
     for (env = first_cpu; env != NULL; env = env->next_cpu) {
+        cpu = x86_env_get_cpu(env);
         info.apic = env->apic_state;
-        run_on_cpu(env, vapic_do_enable_tpr_reporting, &info);
+        run_on_cpu(CPU(cpu), vapic_do_enable_tpr_reporting, &info);
     }
 }
 
@@ -717,7 +719,7 @@ static int vapic_post_load(void *opaque, int version_id)
     }
     if (s->state == VAPIC_ACTIVE) {
         if (smp_cpus == 1) {
-            run_on_cpu(first_cpu, do_vapic_enable, s);
+            run_on_cpu(ENV_GET_CPU(first_cpu), do_vapic_enable, s);
         } else {
             zero = g_malloc0(s->rom_state.vapic_size);
             cpu_physical_memory_rw(s->vapic_paddr, zero,
diff --git a/hw/ppce500_spin.c b/hw/ppce500_spin.c
index 7f8c842..c1a155b 100644
--- a/hw/ppce500_spin.c
+++ b/hw/ppce500_spin.c
@@ -163,7 +163,7 @@ static void spin_write(void *opaque, hwaddr addr, uint64_t value,
             .spin = curspin,
         };
 
-        run_on_cpu(env, spin_kick, &kick);
+        run_on_cpu(CPU(kick.cpu), spin_kick, &kick);
     }
 }
 
diff --git a/include/qemu/cpu.h b/include/qemu/cpu.h
index f04da6e..33f01d9 100644
--- a/include/qemu/cpu.h
+++ b/include/qemu/cpu.h
@@ -125,5 +125,15 @@ void qemu_cpu_kick(CPUState *cpu);
  */
 bool cpu_is_stopped(CPUState *cpu);
 
+/**
+ * run_on_cpu:
+ * @cpu: The vCPU to run on.
+ * @func: The function to be executed.
+ * @data: Data to pass to the function.
+ *
+ * Schedules the function @func for execution on the vCPU @cpu.
+ */
+void run_on_cpu(CPUState *cpu, void (*func)(void *data), void *data);
+
 
 #endif
diff --git a/kvm-all.c b/kvm-all.c
index e41e1c9..b6d0483 100644
--- a/kvm-all.c
+++ b/kvm-all.c
@@ -1500,8 +1500,10 @@ static void do_kvm_cpu_synchronize_state(void *_env)
 
 void kvm_cpu_synchronize_state(CPUArchState *env)
 {
+    CPUState *cpu = ENV_GET_CPU(env);
+
     if (!env->kvm_vcpu_dirty) {
-        run_on_cpu(env, do_kvm_cpu_synchronize_state, env);
+        run_on_cpu(cpu, do_kvm_cpu_synchronize_state, env);
     }
 }
 
@@ -1787,6 +1789,7 @@ static void kvm_invoke_set_guest_debug(void *data)
 
 int kvm_update_guest_debug(CPUArchState *env, unsigned long reinject_trap)
 {
+    CPUState *cpu = ENV_GET_CPU(env);
     struct kvm_set_guest_debug_data data;
 
     data.dbg.control = reinject_trap;
@@ -1797,7 +1800,7 @@ int kvm_update_guest_debug(CPUArchState *env, unsigned long reinject_trap)
     kvm_arch_update_guest_debug(env, &data.dbg);
     data.env = env;
 
-    run_on_cpu(env, kvm_invoke_set_guest_debug, &data);
+    run_on_cpu(cpu, kvm_invoke_set_guest_debug, &data);
     return data.err;
 }
 
diff --git a/target-i386/helper.c b/target-i386/helper.c
index 45f4bed..bf206cf 100644
--- a/target-i386/helper.c
+++ b/target-i386/helper.c
@@ -1177,7 +1177,7 @@ void cpu_x86_inject_mce(Monitor *mon, X86CPU *cpu, int bank,
         return;
     }
 
-    run_on_cpu(cenv, do_inject_x86_mce, &params);
+    run_on_cpu(CPU(cpu), do_inject_x86_mce, &params);
     if (flags & MCE_INJECT_BROADCAST) {
         params.bank = 1;
         params.status = MCI_STATUS_VAL | MCI_STATUS_UC;
@@ -1189,7 +1189,7 @@ void cpu_x86_inject_mce(Monitor *mon, X86CPU *cpu, int bank,
                 continue;
             }
             params.env = env;
-            run_on_cpu(cenv, do_inject_x86_mce, &params);
+            run_on_cpu(CPU(cpu), do_inject_x86_mce, &params);
         }
     }
 }
-- 
1.7.10.4

[Qemu-devel] [PATCH 33/35] cpu: Move thread_id to CPUState

[Andreas Färber]

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 cpu-defs.h         |    1 -
 cpus.c             |   11 ++++++-----
 exec.c             |    5 ++++-
 include/qemu/cpu.h |    1 +
 4 Dateien geändert, 11 Zeilen hinzugefügt(+), 7 Zeilen entfernt(-)

diff --git a/cpu-defs.h b/cpu-defs.h
index b30a8e9..3669241 100644
--- a/cpu-defs.h
+++ b/cpu-defs.h
@@ -201,7 +201,6 @@ typedef struct CPUWatchpoint {
     int nr_cores;  /* number of cores within this CPU package */        \
     int nr_threads;/* number of threads within this CPU */              \
     int running; /* Nonzero if cpu is currently running(usermode).  */  \
-    int thread_id;                                                      \
     /* user data */                                                     \
     void *opaque;                                                       \
                                                                         \
diff --git a/cpus.c b/cpus.c
index bee09b9..d9c332f 100644
--- a/cpus.c
+++ b/cpus.c
@@ -737,7 +737,7 @@ static void *qemu_kvm_cpu_thread_fn(void *arg)
 
     qemu_mutex_lock(&qemu_global_mutex);
     qemu_thread_get_self(cpu->thread);
-    env->thread_id = qemu_get_thread_id();
+    cpu->thread_id = qemu_get_thread_id();
     cpu_single_env = env;
 
     r = kvm_init_vcpu(env);
@@ -778,7 +778,7 @@ static void *qemu_dummy_cpu_thread_fn(void *arg)
 
     qemu_mutex_lock_iothread();
     qemu_thread_get_self(cpu->thread);
-    env->thread_id = qemu_get_thread_id();
+    cpu->thread_id = qemu_get_thread_id();
 
     sigemptyset(&waitset);
     sigaddset(&waitset, SIG_IPI);
@@ -822,7 +822,7 @@ static void *qemu_tcg_cpu_thread_fn(void *arg)
     qemu_mutex_lock(&qemu_global_mutex);
     for (env = first_cpu; env != NULL; env = env->next_cpu) {
         cpu = ENV_GET_CPU(env);
-        env->thread_id = qemu_get_thread_id();
+        cpu->thread_id = qemu_get_thread_id();
         cpu->created = true;
     }
     qemu_cond_signal(&qemu_cpu_cond);
@@ -1205,7 +1205,8 @@ CpuInfoList *qmp_query_cpus(Error **errp)
     CpuInfoList *head = NULL, *cur_item = NULL;
     CPUArchState *env;
 
-    for(env = first_cpu; env != NULL; env = env->next_cpu) {
+    for (env = first_cpu; env != NULL; env = env->next_cpu) {
+        CPUState *cpu = ENV_GET_CPU(env);
         CpuInfoList *info;
 
         cpu_synchronize_state(env);
@@ -1215,7 +1216,7 @@ CpuInfoList *qmp_query_cpus(Error **errp)
         info->value->CPU = env->cpu_index;
         info->value->current = (env == first_cpu);
         info->value->halted = env->halted;
-        info->value->thread_id = env->thread_id;
+        info->value->thread_id = cpu->thread_id;
 #if defined(TARGET_I386)
         info->value->has_pc = true;
         info->value->pc = env->eip + env->segs[R_CS].base;
diff --git a/exec.c b/exec.c
index 038e40d..df67938 100644
--- a/exec.c
+++ b/exec.c
@@ -689,6 +689,9 @@ CPUArchState *qemu_get_cpu(int cpu)
 
 void cpu_exec_init(CPUArchState *env)
 {
+#ifndef CONFIG_USER_ONLY
+    CPUState *cpu = ENV_GET_CPU(env);
+#endif
     CPUArchState **penv;
     int cpu_index;
 
@@ -707,7 +710,7 @@ void cpu_exec_init(CPUArchState *env)
     QTAILQ_INIT(&env->breakpoints);
     QTAILQ_INIT(&env->watchpoints);
 #ifndef CONFIG_USER_ONLY
-    env->thread_id = qemu_get_thread_id();
+    cpu->thread_id = qemu_get_thread_id();
 #endif
     *penv = env;
 #if defined(CONFIG_USER_ONLY)
diff --git a/include/qemu/cpu.h b/include/qemu/cpu.h
index 33f01d9..61b7698 100644
--- a/include/qemu/cpu.h
+++ b/include/qemu/cpu.h
@@ -69,6 +69,7 @@ struct CPUState {
 #ifdef _WIN32
     HANDLE hThread;
 #endif
+    int thread_id;
     struct QemuCond *halt_cond;
     struct qemu_work_item *queued_work_first, *queued_work_last;
     bool thread_kicked;
-- 
1.7.10.4

[Qemu-devel] [PATCH 34/35] target-i386: Pass X86CPU to kvm_get_mp_state()

[Andreas Färber]

Needed for moving halted field to CPUState.

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 target-i386/kvm.c |    9 +++++----
 1 Datei geändert, 5 Zeilen hinzugefügt(+), 4 Zeilen entfernt(-)

diff --git a/target-i386/kvm.c b/target-i386/kvm.c
index 64b837b..7da816f 100644
--- a/target-i386/kvm.c
+++ b/target-i386/kvm.c
@@ -1367,8 +1367,9 @@ static int kvm_put_mp_state(CPUX86State *env)
     return kvm_vcpu_ioctl(env, KVM_SET_MP_STATE, &mp_state);
 }
 
-static int kvm_get_mp_state(CPUX86State *env)
+static int kvm_get_mp_state(X86CPU *cpu)
 {
+    CPUX86State *env = &cpu->env;
     struct kvm_mp_state mp_state;
     int ret;
 
@@ -1612,10 +1613,10 @@ int kvm_arch_put_registers(CPUX86State *env, int level)
 
 int kvm_arch_get_registers(CPUX86State *env)
 {
-    CPUState *cpu = ENV_GET_CPU(env);
+    X86CPU *cpu = x86_env_get_cpu(env);
     int ret;
 
-    assert(cpu_is_stopped(cpu) || qemu_cpu_is_self(cpu));
+    assert(cpu_is_stopped(CPU(cpu)) || qemu_cpu_is_self(CPU(cpu)));
 
     ret = kvm_getput_regs(env, 0);
     if (ret < 0) {
@@ -1637,7 +1638,7 @@ int kvm_arch_get_registers(CPUX86State *env)
     if (ret < 0) {
         return ret;
     }
-    ret = kvm_get_mp_state(env);
+    ret = kvm_get_mp_state(cpu);
     if (ret < 0) {
         return ret;
     }
-- 
1.7.10.4

[Qemu-devel] [PATCH 35/35] target-i386: Pass X86CPU to kvm_handle_halt()

[Andreas Färber]

Needed for moving interrupt_request and halted fields to CPUState.

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 target-i386/kvm.c |    7 +++++--
 1 Datei geändert, 5 Zeilen hinzugefügt(+), 2 Zeilen entfernt(-)

diff --git a/target-i386/kvm.c b/target-i386/kvm.c
index 7da816f..9ccbcb5 100644
--- a/target-i386/kvm.c
+++ b/target-i386/kvm.c
@@ -1786,8 +1786,10 @@ int kvm_arch_process_async_events(CPUX86State *env)
     return env->halted;
 }
 
-static int kvm_handle_halt(CPUX86State *env)
+static int kvm_handle_halt(X86CPU *cpu)
 {
+    CPUX86State *env = &cpu->env;
+
     if (!((env->interrupt_request & CPU_INTERRUPT_HARD) &&
           (env->eflags & IF_MASK)) &&
         !(env->interrupt_request & CPU_INTERRUPT_NMI)) {
@@ -2001,13 +2003,14 @@ static bool host_supports_vmx(void)
 
 int kvm_arch_handle_exit(CPUX86State *env, struct kvm_run *run)
 {
+    X86CPU *cpu = x86_env_get_cpu(env);
     uint64_t code;
     int ret;
 
     switch (run->exit_reason) {
     case KVM_EXIT_HLT:
         DPRINTF("handle_hlt\n");
-        ret = kvm_handle_halt(env);
+        ret = kvm_handle_halt(cpu);
         break;
     case KVM_EXIT_SET_TPR:
         ret = 0;
-- 
1.7.10.4

Re: [Qemu-devel] [PATCH 29/35] cpus: Pass CPUState to [qemu_]cpu_has_work()

[Richard Henderson]

On 2012-10-31 12:00, Andreas Färber wrote:
>  target-alpha/cpu.c      |    2 +-
>  target-alpha/cpu.h      |    4 +++-

Acked-by: Richard Henderson <rth@twiddle.net>


r~

Re: [Qemu-devel] [PULL] QOM CPUState patch queue 2012-10-31

[Andreas Färber]

Am 31.10.2012 01:59, schrieb Andreas Färber:
> Hello Anthony,
> 
> This is my current QOM CPUState queue. Please pull.
> 
> This completes Igor's first step of x86 CPU hotplug roadmap:
> http://wiki.qemu.org/Features/CPUHotplug
> CPU-as-a-device is still under review and blocking CPU properties/subclasses;
> I hope to get that in during the Soft Freeze if no problems arise.
> 
> Cc: Igor Mammedov <imammedo@redhat.com>
> Cc: Eduardo Habkost <ehabkost@redhat.com>
> Cc: Don Slutz <don@cloudswitch.com>
> 
> With Blue and Aurélien having applied sparc/mips prerequisites, I'm including:
> * CPUState part 4a series (CPU_COMMON -> CPUState field movements),
> * remaining xtensa and ppc prerequisites,
> * as well as the remainder of original CPUState part 4 series
>   except for the final bit depending on TLB rework.
> 
> Cc: Max Filippov <jcmvbkbc@gmail.com>
> Cc: Alexander Graf <agraf@suse.de>
> 
> Regards,
> Andreas
> 
> 
> The following changes since commit aee0bf7d8d7564f8f2c40e4501695c492b7dd8d1:
> 
>   tap-win32: stubs to fix win32 build (2012-10-30 19:18:53 +0000)
> 
> are available in the git repository at:
> 
>   git://github.com/afaerber/qemu-cpu.git qom-cpu
> 
> for you to fetch changes up to 78585fedbd53b3629150bcf8ab4c9ff32d832460:
> 
>   target-i386: Pass X86CPU to kvm_handle_halt() (2012-10-31 01:02:46 +0100)

Branch updated with rth's Acked-by - up to
839b5630cd4f49ce10618a7bf0b705b76f3a01ca.

Andreas

> ----------------------------------------------------------------
> Andreas Färber (32):
>       target-i386: Inline APIC cpu_env property setting
>       apic: Store X86CPU in APICCommonState
>       target-i386: Pass X86CPU to cpu_x86_load_seg_cache_sipi()
>       cpus: Pass CPUState to qemu_cpu_is_self()
>       cpus: Pass CPUState to qemu_cpu_kick_thread()
>       cpu: Move created field to CPUState
>       cpu: Move stop field to CPUState
>       ppce500_spin: Store PowerPCCPU in SpinKick
>       cpu: Move stopped field to CPUState
>       cpus: Pass CPUState to cpu_is_stopped()
>       cpus: Pass CPUState to cpu_can_run()
>       cpu: Move halt_cond to CPUState
>       cpus: Pass CPUState to qemu_tcg_cpu_thread_fn
>       cpus: Pass CPUState to qemu_tcg_init_vcpu()
>       ppc: Pass PowerPCCPU to {ppc6xx,ppc970,power7,ppc40x,ppce500}_set_irq()
>       target-ppc: Rename kvm_kick_{env => cpu} and pass PowerPCCPU
>       cpus: Pass CPUState to qemu_cpu_kick()
>       cpu: Move queued_work_{first,last} to CPUState
>       cpus: Pass CPUState to flush_queued_work()
>       cpus: Pass CPUState to qemu_wait_io_event_common()
>       xtensa_pic: Pass XtensaCPU to xtensa_ccompare_cb()
>       target-ppc: Pass PowerPCCPU to powerpc_excp()
>       target-ppc: Pass PowerPCCPU to cpu_ppc_hypercall
>       spapr: Pass PowerPCCPU to spapr_hypercall()
>       spapr: Pass PowerPCCPU to hypercalls
>       cpus: Pass CPUState to [qemu_]cpu_has_work()
>       target-i386: Pass X86CPU to kvm_mce_inject()
>       target-i386: Pass X86CPU to cpu_x86_inject_mce()
>       cpus: Pass CPUState to run_on_cpu()
>       cpu: Move thread_id to CPUState
>       target-i386: Pass X86CPU to kvm_get_mp_state()
>       target-i386: Pass X86CPU to kvm_handle_halt()
> 
> Igor Mammedov (3):
>       target-i386: cpu_x86_register(): report error from property setter
>       target-i386: If x86_cpu_realize() failed, report error and do cleanup
>       target-i386: Initialize APIC at CPU level
> 
>  cpu-all.h                |    4 -
>  cpu-defs.h               |    6 --
>  cpu-exec.c               |    8 +-
>  cpus.c                   |  193 +++++++++++++++++++++++-----------------------
>  exec.c                   |   10 ++-
>  hw/apic.c                |   40 ++++++----
>  hw/apic_common.c         |    5 +-
>  hw/apic_internal.h       |    3 +-
>  hw/kvm/apic.c            |    8 +-
>  hw/kvmvapic.c            |    6 +-
>  hw/pc.c                  |   56 ++------------
>  hw/ppc.c                 |   59 ++++++++------
>  hw/ppce500_spin.c        |   13 ++--
>  hw/spapr.c               |    6 +-
>  hw/spapr.h               |    4 +-
>  hw/spapr_hcall.c         |   40 ++++++----
>  hw/spapr_iommu.c         |    2 +-
>  hw/spapr_llan.c          |   10 +--
>  hw/spapr_rtas.c          |    5 +-
>  hw/spapr_vio.c           |   10 +--
>  hw/spapr_vty.c           |    4 +-
>  hw/sun4m.c               |    2 +-
>  hw/sun4u.c               |    2 +-
>  hw/xics.c                |   11 ++-
>  hw/xtensa_pic.c          |    9 ++-
>  include/qemu/cpu.h       |   58 ++++++++++++++
>  kvm-all.c                |   13 +++-
>  monitor.c                |    6 +-
>  qemu-common.h            |    2 -
>  target-alpha/cpu.c       |    2 +-
>  target-alpha/cpu.h       |    4 +-
>  target-arm/cpu.h         |    4 +-
>  target-cris/cpu.h        |    4 +-
>  target-i386/cpu.c        |   63 ++++++++++++++-
>  target-i386/cpu.h        |   10 ++-
>  target-i386/helper.c     |   16 ++--
>  target-i386/kvm.c        |   28 ++++---
>  target-lm32/cpu.h        |    4 +-
>  target-m68k/cpu.h        |    4 +-
>  target-microblaze/cpu.h  |    4 +-
>  target-mips/cpu.h        |   11 +--
>  target-openrisc/cpu.h    |    4 +-
>  target-ppc/cpu.h         |    6 +-
>  target-ppc/excp_helper.c |   40 +++++-----
>  target-ppc/kvm.c         |   12 ++-
>  target-s390x/cpu.h       |    4 +-
>  target-s390x/kvm.c       |    2 +-
>  target-sh4/cpu.h         |    4 +-
>  target-sparc/cpu.h       |    4 +-
>  target-unicore32/cpu.c   |    2 +-
>  target-unicore32/cpu.h   |    4 +-
>  target-xtensa/cpu.h      |    4 +-
>  52 Dateien geändert, 501 Zeilen hinzugefügt(+), 334 Zeilen entfernt(-)

-- 
SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg

Re: [Qemu-devel] [PATCH 29/35] cpus: Pass CPUState to [qemu_]cpu_has_work()

[Aurelien Jarno]

On Wed, Oct 31, 2012 at 02:00:00AM +0100, Andreas Färber wrote:
> For target-mips also change the return type to bool.
> 
> Make include paths for cpu-qom.h consistent for alpha and unicore32.
> 
> Signed-off-by: Andreas Färber <afaerber@suse.de>
> [AF: Updated new target-openrisc function accordingly]
> ---
>  cpu-all.h               |    2 --
>  cpu-exec.c              |    8 +++-----
>  cpus.c                  |    2 +-
>  hw/spapr_hcall.c        |    2 +-
>  hw/xtensa_pic.c         |    2 +-
>  include/qemu/cpu.h      |   10 ++++++++++
>  target-alpha/cpu.c      |    2 +-
>  target-alpha/cpu.h      |    4 +++-
>  target-arm/cpu.h        |    4 +++-
>  target-cris/cpu.h       |    4 +++-
>  target-i386/cpu.h       |    4 +++-
>  target-lm32/cpu.h       |    4 +++-
>  target-m68k/cpu.h       |    4 +++-
>  target-microblaze/cpu.h |    4 +++-
>  target-mips/cpu.h       |   11 ++++++-----
>  target-openrisc/cpu.h   |    4 +++-
>  target-ppc/cpu.h        |    4 +++-
>  target-s390x/cpu.h      |    4 +++-
>  target-sh4/cpu.h        |    4 +++-
>  target-sparc/cpu.h      |    4 +++-
>  target-unicore32/cpu.c  |    2 +-
>  target-unicore32/cpu.h  |    4 +++-
>  target-xtensa/cpu.h     |    4 +++-
>  23 Dateien geändert, 66 Zeilen hinzugefügt(+), 31 Zeilen entfernt(-)
> 
> diff --git a/cpu-all.h b/cpu-all.h
> index d19ec12..0356684 100644
> --- a/cpu-all.h
> +++ b/cpu-all.h
> @@ -438,8 +438,6 @@ void cpu_reset_interrupt(CPUArchState *env, int mask);
>  
>  void cpu_exit(CPUArchState *s);
>  
> -bool qemu_cpu_has_work(CPUArchState *env);
> -
>  /* Breakpoint/watchpoint flags */
>  #define BP_MEM_READ           0x01
>  #define BP_MEM_WRITE          0x02
> diff --git a/cpu-exec.c b/cpu-exec.c
> index 252da86..904ee73 100644
> --- a/cpu-exec.c
> +++ b/cpu-exec.c
> @@ -27,9 +27,9 @@ int tb_invalidated_flag;
>  
>  //#define CONFIG_DEBUG_EXEC
>  
> -bool qemu_cpu_has_work(CPUArchState *env)
> +bool qemu_cpu_has_work(CPUState *cpu)
>  {
> -    return cpu_has_work(env);
> +    return cpu_has_work(cpu);
>  }
>  
>  void cpu_loop_exit(CPUArchState *env)
> @@ -181,16 +181,14 @@ volatile sig_atomic_t exit_request;
>  
>  int cpu_exec(CPUArchState *env)
>  {
> -#ifdef TARGET_PPC
>      CPUState *cpu = ENV_GET_CPU(env);
> -#endif
>      int ret, interrupt_request;
>      TranslationBlock *tb;
>      uint8_t *tc_ptr;
>      tcg_target_ulong next_tb;
>  
>      if (env->halted) {
> -        if (!cpu_has_work(env)) {
> +        if (!cpu_has_work(cpu)) {
>              return EXCP_HALTED;
>          }
>  
> diff --git a/cpus.c b/cpus.c
> index 6baf2bc..76f32fc 100644
> --- a/cpus.c
> +++ b/cpus.c
> @@ -72,7 +72,7 @@ static bool cpu_thread_is_idle(CPUArchState *env)
>      if (cpu->stopped || !runstate_is_running()) {
>          return true;
>      }
> -    if (!env->halted || qemu_cpu_has_work(env) ||
> +    if (!env->halted || qemu_cpu_has_work(cpu) ||
>          kvm_async_interrupts_enabled()) {
>          return false;
>      }
> diff --git a/hw/spapr_hcall.c b/hw/spapr_hcall.c
> index c6d55da..63cadb8 100644
> --- a/hw/spapr_hcall.c
> +++ b/hw/spapr_hcall.c
> @@ -516,7 +516,7 @@ static target_ulong h_cede(PowerPCCPU *cpu, sPAPREnvironment *spapr,
>  
>      env->msr |= (1ULL << MSR_EE);
>      hreg_compute_hflags(env);
> -    if (!cpu_has_work(env)) {
> +    if (!cpu_has_work(CPU(cpu))) {
>          env->halted = 1;
>          env->exception_index = EXCP_HLT;
>          env->exit_request = 1;
> diff --git a/hw/xtensa_pic.c b/hw/xtensa_pic.c
> index 8b9c051..1ec70cd 100644
> --- a/hw/xtensa_pic.c
> +++ b/hw/xtensa_pic.c
> @@ -131,7 +131,7 @@ static void xtensa_ccompare_cb(void *opaque)
>      if (env->halted) {
>          env->halt_clock = qemu_get_clock_ns(vm_clock);
>          xtensa_advance_ccount(env, env->wake_ccount - env->sregs[CCOUNT]);
> -        if (!cpu_has_work(env)) {
> +        if (!cpu_has_work(CPU(cpu))) {
>              env->sregs[CCOUNT] = env->wake_ccount + 1;
>              xtensa_rearm_ccompare_timer(env);
>          }
> diff --git a/include/qemu/cpu.h b/include/qemu/cpu.h
> index eea6175..f04da6e 100644
> --- a/include/qemu/cpu.h
> +++ b/include/qemu/cpu.h
> @@ -87,6 +87,16 @@ struct CPUState {
>  void cpu_reset(CPUState *cpu);
>  
>  /**
> + * qemu_cpu_has_work:
> + * @cpu: The vCPU to check.
> + *
> + * Checks whether the CPU has work to do.
> + *
> + * Returns: %true if the CPU has work, %false otherwise.
> + */
> +bool qemu_cpu_has_work(CPUState *cpu);
> +
> +/**
>   * qemu_cpu_is_self:
>   * @cpu: The vCPU to check against.
>   *
> diff --git a/target-alpha/cpu.c b/target-alpha/cpu.c
> index 62d2a66..11a19eb 100644
> --- a/target-alpha/cpu.c
> +++ b/target-alpha/cpu.c
> @@ -19,7 +19,7 @@
>   * <http://www.gnu.org/licenses/lgpl-2.1.html>
>   */
>  
> -#include "cpu-qom.h"
> +#include "cpu.h"
>  #include "qemu-common.h"
>  
>  
> diff --git a/target-alpha/cpu.h b/target-alpha/cpu.h
> index 8f131b7..34221fb 100644
> --- a/target-alpha/cpu.h
> +++ b/target-alpha/cpu.h
> @@ -510,8 +510,10 @@ static inline void cpu_set_tls(CPUAlphaState *env, target_ulong newtls)
>  }
>  #endif
>  
> -static inline bool cpu_has_work(CPUAlphaState *env)
> +static inline bool cpu_has_work(CPUState *cpu)
>  {
> +    CPUAlphaState *env = &ALPHA_CPU(cpu)->env;
> +
>      /* Here we are checking to see if the CPU should wake up from HALT.
>         We will have gotten into this state only for WTINT from PALmode.  */
>      /* ??? I'm not sure how the IPL state works with WTINT to keep a CPU
> diff --git a/target-arm/cpu.h b/target-arm/cpu.h
> index ff4de10..e4ff918 100644
> --- a/target-arm/cpu.h
> +++ b/target-arm/cpu.h
> @@ -718,8 +718,10 @@ static inline void cpu_get_tb_cpu_state(CPUARMState *env, target_ulong *pc,
>      }
>  }
>  
> -static inline bool cpu_has_work(CPUARMState *env)
> +static inline bool cpu_has_work(CPUState *cpu)
>  {
> +    CPUARMState *env = &ARM_CPU(cpu)->env;
> +
>      return env->interrupt_request &
>          (CPU_INTERRUPT_FIQ | CPU_INTERRUPT_HARD | CPU_INTERRUPT_EXITTB);
>  }
> diff --git a/target-cris/cpu.h b/target-cris/cpu.h
> index 4f4df6d..2c27506 100644
> --- a/target-cris/cpu.h
> +++ b/target-cris/cpu.h
> @@ -285,8 +285,10 @@ static inline void cpu_get_tb_cpu_state(CPUCRISState *env, target_ulong *pc,
>  #define cpu_list cris_cpu_list
>  void cris_cpu_list(FILE *f, fprintf_function cpu_fprintf);
>  
> -static inline bool cpu_has_work(CPUCRISState *env)
> +static inline bool cpu_has_work(CPUState *cpu)
>  {
> +    CPUCRISState *env = &CRIS_CPU(cpu)->env;
> +
>      return env->interrupt_request & (CPU_INTERRUPT_HARD | CPU_INTERRUPT_NMI);
>  }
>  
> diff --git a/target-i386/cpu.h b/target-i386/cpu.h
> index d840914..2d7b4c3 100644
> --- a/target-i386/cpu.h
> +++ b/target-i386/cpu.h
> @@ -1100,8 +1100,10 @@ static inline void cpu_clone_regs(CPUX86State *env, target_ulong newsp)
>  #include "hw/apic.h"
>  #endif
>  
> -static inline bool cpu_has_work(CPUX86State *env)
> +static inline bool cpu_has_work(CPUState *cpu)
>  {
> +    CPUX86State *env = &X86_CPU(cpu)->env;
> +
>      return ((env->interrupt_request & (CPU_INTERRUPT_HARD |
>                                         CPU_INTERRUPT_POLL)) &&
>              (env->eflags & IF_MASK)) ||
> diff --git a/target-lm32/cpu.h b/target-lm32/cpu.h
> index da80469..7243b4f 100644
> --- a/target-lm32/cpu.h
> +++ b/target-lm32/cpu.h
> @@ -253,8 +253,10 @@ static inline void cpu_get_tb_cpu_state(CPULM32State *env, target_ulong *pc,
>      *flags = 0;
>  }
>  
> -static inline bool cpu_has_work(CPULM32State *env)
> +static inline bool cpu_has_work(CPUState *cpu)
>  {
> +    CPULM32State *env = &LM32_CPU(cpu)->env;
> +
>      return env->interrupt_request & CPU_INTERRUPT_HARD;
>  }
>  
> diff --git a/target-m68k/cpu.h b/target-m68k/cpu.h
> index 5e6ee50..780e2c9 100644
> --- a/target-m68k/cpu.h
> +++ b/target-m68k/cpu.h
> @@ -257,8 +257,10 @@ static inline void cpu_get_tb_cpu_state(CPUM68KState *env, target_ulong *pc,
>              | ((env->macsr >> 4) & 0xf);        /* Bits 0-3 */
>  }
>  
> -static inline bool cpu_has_work(CPUM68KState *env)
> +static inline bool cpu_has_work(CPUState *cpu)
>  {
> +    CPUM68KState *env = &M68K_CPU(cpu)->env;
> +
>      return env->interrupt_request & CPU_INTERRUPT_HARD;
>  }
>  
> diff --git a/target-microblaze/cpu.h b/target-microblaze/cpu.h
> index 37bbdf1..585bbd6 100644
> --- a/target-microblaze/cpu.h
> +++ b/target-microblaze/cpu.h
> @@ -374,8 +374,10 @@ void cpu_unassigned_access(CPUMBState *env1, hwaddr addr,
>                             int is_write, int is_exec, int is_asi, int size);
>  #endif
>  
> -static inline bool cpu_has_work(CPUMBState *env)
> +static inline bool cpu_has_work(CPUState *cpu)
>  {
> +    CPUMBState *env = &MICROBLAZE_CPU(cpu)->env;
> +
>      return env->interrupt_request & (CPU_INTERRUPT_HARD | CPU_INTERRUPT_NMI);
>  }
>  
> diff --git a/target-mips/cpu.h b/target-mips/cpu.h
> index c4ca285..38943de 100644
> --- a/target-mips/cpu.h
> +++ b/target-mips/cpu.h
> @@ -706,16 +706,17 @@ static inline int mips_vpe_active(CPUMIPSState *env)
>      return active;
>  }
>  
> -static inline int cpu_has_work(CPUMIPSState *env)
> +static inline bool cpu_has_work(CPUState *cpu)
>  {
> -    int has_work = 0;
> +    CPUMIPSState *env = &MIPS_CPU(cpu)->env;
> +    bool has_work = false;
>  
>      /* It is implementation dependent if non-enabled interrupts
>         wake-up the CPU, however most of the implementations only
>         check for interrupts that can be taken. */
>      if ((env->interrupt_request & CPU_INTERRUPT_HARD) &&
>          cpu_mips_hw_interrupts_pending(env)) {
> -        has_work = 1;
> +        has_work = true;
>      }
>  
>      /* MIPS-MT has the ability to halt the CPU.  */
> @@ -723,11 +724,11 @@ static inline int cpu_has_work(CPUMIPSState *env)
>          /* The QEMU model will issue an _WAKE request whenever the CPUs
>             should be woken up.  */
>          if (env->interrupt_request & CPU_INTERRUPT_WAKE) {
> -            has_work = 1;
> +            has_work = true;
>          }
>  
>          if (!mips_vpe_active(env)) {
> -            has_work = 0;
> +            has_work = false;
>          }
>      }
>      return has_work;
> diff --git a/target-openrisc/cpu.h b/target-openrisc/cpu.h
> index a701d36..d42ffb0 100644
> --- a/target-openrisc/cpu.h
> +++ b/target-openrisc/cpu.h
> @@ -437,8 +437,10 @@ static inline int cpu_mmu_index(CPUOpenRISCState *env)
>  }
>  
>  #define CPU_INTERRUPT_TIMER   CPU_INTERRUPT_TGT_INT_0
> -static inline bool cpu_has_work(CPUOpenRISCState *env)
> +static inline bool cpu_has_work(CPUState *cpu)
>  {
> +    CPUOpenRISCState *env = &OPENRISC_CPU(cpu)->env;
> +
>      return env->interrupt_request & (CPU_INTERRUPT_HARD |
>                                       CPU_INTERRUPT_TIMER);
>  }
> diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h
> index 5574042..ed491d2 100644
> --- a/target-ppc/cpu.h
> +++ b/target-ppc/cpu.h
> @@ -2222,8 +2222,10 @@ static inline bool msr_is_64bit(CPUPPCState *env, target_ulong msr)
>  
>  extern void (*cpu_ppc_hypercall)(PowerPCCPU *);
>  
> -static inline bool cpu_has_work(CPUPPCState *env)
> +static inline bool cpu_has_work(CPUState *cpu)
>  {
> +    CPUPPCState *env = &POWERPC_CPU(cpu)->env;
> +
>      return msr_ee && (env->interrupt_request & CPU_INTERRUPT_HARD);
>  }
>  
> diff --git a/target-s390x/cpu.h b/target-s390x/cpu.h
> index 5be6e83..0f9a1f7 100644
> --- a/target-s390x/cpu.h
> +++ b/target-s390x/cpu.h
> @@ -977,8 +977,10 @@ static inline void cpu_inject_ext(CPUS390XState *env, uint32_t code, uint32_t pa
>      cpu_interrupt(env, CPU_INTERRUPT_HARD);
>  }
>  
> -static inline bool cpu_has_work(CPUS390XState *env)
> +static inline bool cpu_has_work(CPUState *cpu)
>  {
> +    CPUS390XState *env = &S390_CPU(cpu)->env;
> +
>      return (env->interrupt_request & CPU_INTERRUPT_HARD) &&
>          (env->psw.mask & PSW_MASK_EXT);
>  }
> diff --git a/target-sh4/cpu.h b/target-sh4/cpu.h
> index 782159e..9a0e72b 100644
> --- a/target-sh4/cpu.h
> +++ b/target-sh4/cpu.h
> @@ -371,8 +371,10 @@ static inline void cpu_get_tb_cpu_state(CPUSH4State *env, target_ulong *pc,
>              | (env->movcal_backup ? TB_FLAG_PENDING_MOVCA : 0); /* Bit 4 */
>  }
>  
> -static inline bool cpu_has_work(CPUSH4State *env)
> +static inline bool cpu_has_work(CPUState *cpu)
>  {
> +    CPUSH4State *env = &SUPERH_CPU(cpu)->env;
> +
>      return env->interrupt_request & CPU_INTERRUPT_HARD;
>  }
>  
> diff --git a/target-sparc/cpu.h b/target-sparc/cpu.h
> index a55fe08..6aa82b3 100644
> --- a/target-sparc/cpu.h
> +++ b/target-sparc/cpu.h
> @@ -764,8 +764,10 @@ static inline bool tb_am_enabled(int tb_flags)
>  #endif
>  }
>  
> -static inline bool cpu_has_work(CPUSPARCState *env1)
> +static inline bool cpu_has_work(CPUState *cpu)
>  {
> +    CPUSPARCState *env1 = &SPARC_CPU(cpu)->env;
> +
>      return (env1->interrupt_request & CPU_INTERRUPT_HARD) &&
>             cpu_interrupts_enabled(env1);
>  }
> diff --git a/target-unicore32/cpu.c b/target-unicore32/cpu.c
> index 3425bbe..884c101 100644
> --- a/target-unicore32/cpu.c
> +++ b/target-unicore32/cpu.c
> @@ -12,7 +12,7 @@
>   * or (at your option) any later version.
>   */
>  
> -#include "cpu-qom.h"
> +#include "cpu.h"
>  #include "qemu-common.h"
>  
>  static inline void set_feature(CPUUniCore32State *env, int feature)
> diff --git a/target-unicore32/cpu.h b/target-unicore32/cpu.h
> index 06508a1..676c5d9 100644
> --- a/target-unicore32/cpu.h
> +++ b/target-unicore32/cpu.h
> @@ -181,8 +181,10 @@ void uc32_translate_init(void);
>  void do_interrupt(CPUUniCore32State *);
>  void switch_mode(CPUUniCore32State *, int);
>  
> -static inline bool cpu_has_work(CPUUniCore32State *env)
> +static inline bool cpu_has_work(CPUState *cpu)
>  {
> +    CPUUniCore32State *env = &UNICORE32_CPU(cpu)->env;
> +
>      return env->interrupt_request &
>          (CPU_INTERRUPT_HARD | CPU_INTERRUPT_EXITTB);
>  }
> diff --git a/target-xtensa/cpu.h b/target-xtensa/cpu.h
> index 7348277..74e9888 100644
> --- a/target-xtensa/cpu.h
> +++ b/target-xtensa/cpu.h
> @@ -501,8 +501,10 @@ static inline void cpu_get_tb_cpu_state(CPUXtensaState *env, target_ulong *pc,
>  #include "cpu-all.h"
>  #include "exec-all.h"
>  
> -static inline int cpu_has_work(CPUXtensaState *env)
> +static inline int cpu_has_work(CPUState *cpu)
>  {
> +    CPUXtensaState *env = &XTENSA_CPU(cpu)->env;
> +
>      return env->pending_irq_level;
>  }
>  

I find strange to see a pull request for something that hasn't been sent
on the list before. That said MIPS part is

Acked-by: Aurelien Jarno <aurelien@aurel32.net>

-- 
Aurelien Jarno                          GPG: 1024D/F1BCDB73
aurelien@aurel32.net                 http://www.aurel32.net

Re: [Qemu-devel] [PATCH 29/35] cpus: Pass CPUState to [qemu_]cpu_has_work()

[Andreas Färber]

Am 31.10.2012 22:05, schrieb Aurelien Jarno:
> On Wed, Oct 31, 2012 at 02:00:00AM +0100, Andreas Färber wrote:
>> For target-mips also change the return type to bool.
>>
>> Make include paths for cpu-qom.h consistent for alpha and unicore32.
>>
>> Signed-off-by: Andreas Färber <afaerber@suse.de>
>> [AF: Updated new target-openrisc function accordingly]
[...]
> I find strange to see a pull request for something that hasn't been sent
> on the list before. That said MIPS part is
> 
> Acked-by: Aurelien Jarno <aurelien@aurel32.net>

The patch has been on the list before [1], I just spared me a v2 for the
rebase (therefore the marking above) due to the upcoming Soft Freeze.
The responsiveness to these CPUState patches has generally been low in
the past, especially when cross-target, and most of them are rather trivial.

Andreas

[1] http://patchwork.ozlabs.org/patch/160822/

-- 
SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg

Re: [Qemu-devel] [PATCH 29/35] cpus: Pass CPUState to [qemu_]cpu_has_work()

[Aurelien Jarno]

On Wed, Oct 31, 2012 at 10:37:41PM +0100, Andreas Färber wrote:
> Am 31.10.2012 22:05, schrieb Aurelien Jarno:
> > On Wed, Oct 31, 2012 at 02:00:00AM +0100, Andreas Färber wrote:
> >> For target-mips also change the return type to bool.
> >>
> >> Make include paths for cpu-qom.h consistent for alpha and unicore32.
> >>
> >> Signed-off-by: Andreas Färber <afaerber@suse.de>
> >> [AF: Updated new target-openrisc function accordingly]
> [...]
> > I find strange to see a pull request for something that hasn't been sent
> > on the list before. That said MIPS part is
> > 
> > Acked-by: Aurelien Jarno <aurelien@aurel32.net>
> 
> The patch has been on the list before [1], I just spared me a v2 for the
> rebase (therefore the marking above) due to the upcoming Soft Freeze.
> The responsiveness to these CPUState patches has generally been low in
> the past, especially when cross-target, and most of them are rather trivial.
> 

Ok, then I missed it. Sorry about that.

-- 
Aurelien Jarno                          GPG: 1024D/F1BCDB73
aurelien@aurel32.net                 http://www.aurel32.net

Re: [Qemu-devel] [PULL] QOM CPUState patch queue 2012-10-31

[Anthony Liguori]

Andreas Färber <afaerber@suse.de> writes:

> Hello Anthony,
>
> This is my current QOM CPUState queue. Please pull.
>
> This completes Igor's first step of x86 CPU hotplug roadmap:
> http://wiki.qemu.org/Features/CPUHotplug
> CPU-as-a-device is still under review and blocking CPU properties/subclasses;
> I hope to get that in during the Soft Freeze if no problems arise.
>
> Cc: Igor Mammedov <imammedo@redhat.com>
> Cc: Eduardo Habkost <ehabkost@redhat.com>
> Cc: Don Slutz <don@cloudswitch.com>
>
> With Blue and Aurélien having applied sparc/mips prerequisites, I'm including:
> * CPUState part 4a series (CPU_COMMON -> CPUState field movements),
> * remaining xtensa and ppc prerequisites,
> * as well as the remainder of original CPUState part 4 series
>   except for the final bit depending on TLB rework.
>
> Cc: Max Filippov <jcmvbkbc@gmail.com>
> Cc: Alexander Graf <agraf@suse.de>
>
> Regards,
> Andreas
>

Pulled. Thanks.

Regards,

Anthony Liguori

>
> The following changes since commit aee0bf7d8d7564f8f2c40e4501695c492b7dd8d1:
>
>   tap-win32: stubs to fix win32 build (2012-10-30 19:18:53 +0000)
>
> are available in the git repository at:
>
>   git://github.com/afaerber/qemu-cpu.git qom-cpu
>
> for you to fetch changes up to 78585fedbd53b3629150bcf8ab4c9ff32d832460:
>
>   target-i386: Pass X86CPU to kvm_handle_halt() (2012-10-31 01:02:46 +0100)
>
> ----------------------------------------------------------------
> Andreas Färber (32):
>       target-i386: Inline APIC cpu_env property setting
>       apic: Store X86CPU in APICCommonState
>       target-i386: Pass X86CPU to cpu_x86_load_seg_cache_sipi()
>       cpus: Pass CPUState to qemu_cpu_is_self()
>       cpus: Pass CPUState to qemu_cpu_kick_thread()
>       cpu: Move created field to CPUState
>       cpu: Move stop field to CPUState
>       ppce500_spin: Store PowerPCCPU in SpinKick
>       cpu: Move stopped field to CPUState
>       cpus: Pass CPUState to cpu_is_stopped()
>       cpus: Pass CPUState to cpu_can_run()
>       cpu: Move halt_cond to CPUState
>       cpus: Pass CPUState to qemu_tcg_cpu_thread_fn
>       cpus: Pass CPUState to qemu_tcg_init_vcpu()
>       ppc: Pass PowerPCCPU to {ppc6xx,ppc970,power7,ppc40x,ppce500}_set_irq()
>       target-ppc: Rename kvm_kick_{env => cpu} and pass PowerPCCPU
>       cpus: Pass CPUState to qemu_cpu_kick()
>       cpu: Move queued_work_{first,last} to CPUState
>       cpus: Pass CPUState to flush_queued_work()
>       cpus: Pass CPUState to qemu_wait_io_event_common()
>       xtensa_pic: Pass XtensaCPU to xtensa_ccompare_cb()
>       target-ppc: Pass PowerPCCPU to powerpc_excp()
>       target-ppc: Pass PowerPCCPU to cpu_ppc_hypercall
>       spapr: Pass PowerPCCPU to spapr_hypercall()
>       spapr: Pass PowerPCCPU to hypercalls
>       cpus: Pass CPUState to [qemu_]cpu_has_work()
>       target-i386: Pass X86CPU to kvm_mce_inject()
>       target-i386: Pass X86CPU to cpu_x86_inject_mce()
>       cpus: Pass CPUState to run_on_cpu()
>       cpu: Move thread_id to CPUState
>       target-i386: Pass X86CPU to kvm_get_mp_state()
>       target-i386: Pass X86CPU to kvm_handle_halt()
>
> Igor Mammedov (3):
>       target-i386: cpu_x86_register(): report error from property setter
>       target-i386: If x86_cpu_realize() failed, report error and do cleanup
>       target-i386: Initialize APIC at CPU level
>
>  cpu-all.h                |    4 -
>  cpu-defs.h               |    6 --
>  cpu-exec.c               |    8 +-
>  cpus.c                   |  193 +++++++++++++++++++++++-----------------------
>  exec.c                   |   10 ++-
>  hw/apic.c                |   40 ++++++----
>  hw/apic_common.c         |    5 +-
>  hw/apic_internal.h       |    3 +-
>  hw/kvm/apic.c            |    8 +-
>  hw/kvmvapic.c            |    6 +-
>  hw/pc.c                  |   56 ++------------
>  hw/ppc.c                 |   59 ++++++++------
>  hw/ppce500_spin.c        |   13 ++--
>  hw/spapr.c               |    6 +-
>  hw/spapr.h               |    4 +-
>  hw/spapr_hcall.c         |   40 ++++++----
>  hw/spapr_iommu.c         |    2 +-
>  hw/spapr_llan.c          |   10 +--
>  hw/spapr_rtas.c          |    5 +-
>  hw/spapr_vio.c           |   10 +--
>  hw/spapr_vty.c           |    4 +-
>  hw/sun4m.c               |    2 +-
>  hw/sun4u.c               |    2 +-
>  hw/xics.c                |   11 ++-
>  hw/xtensa_pic.c          |    9 ++-
>  include/qemu/cpu.h       |   58 ++++++++++++++
>  kvm-all.c                |   13 +++-
>  monitor.c                |    6 +-
>  qemu-common.h            |    2 -
>  target-alpha/cpu.c       |    2 +-
>  target-alpha/cpu.h       |    4 +-
>  target-arm/cpu.h         |    4 +-
>  target-cris/cpu.h        |    4 +-
>  target-i386/cpu.c        |   63 ++++++++++++++-
>  target-i386/cpu.h        |   10 ++-
>  target-i386/helper.c     |   16 ++--
>  target-i386/kvm.c        |   28 ++++---
>  target-lm32/cpu.h        |    4 +-
>  target-m68k/cpu.h        |    4 +-
>  target-microblaze/cpu.h  |    4 +-
>  target-mips/cpu.h        |   11 +--
>  target-openrisc/cpu.h    |    4 +-
>  target-ppc/cpu.h         |    6 +-
>  target-ppc/excp_helper.c |   40 +++++-----
>  target-ppc/kvm.c         |   12 ++-
>  target-s390x/cpu.h       |    4 +-
>  target-s390x/kvm.c       |    2 +-
>  target-sh4/cpu.h         |    4 +-
>  target-sparc/cpu.h       |    4 +-
>  target-unicore32/cpu.c   |    2 +-
>  target-unicore32/cpu.h   |    4 +-
>  target-xtensa/cpu.h      |    4 +-
>  52 Dateien geändert, 501 Zeilen hinzugefügt(+), 334 Zeilen entfernt(-)