From: "Alex Bennée" <alex.bennee@linaro.org>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: qemu-arm@nongnu.org, qemu-devel@nongnu.org, patches@linaro.org,
Paolo Bonzini <pbonzini@redhat.com>,
Richard Henderson <rth@twiddle.net>
Subject: Re: [Qemu-devel] [PATCH 16/27] iommu: Add IOMMU index argument to translate method
Date: Wed, 23 May 2018 10:11:53 +0100 [thread overview]
Message-ID: <874liyviqu.fsf@linaro.org> (raw)
In-Reply-To: <20180521140402.23318-17-peter.maydell@linaro.org>
Peter Maydell <peter.maydell@linaro.org> writes:
> Add an IOMMU index argument to the translate method of
> IOMMUs. Since all of our current IOMMU implementations
> support only a single IOMMU index, this has no effect
> on the behaviour.
>
> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Modulo comment about signed indexes in previous commit:
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
> ---
> include/exec/memory.h | 3 ++-
> exec.c | 11 +++++++++--
> hw/alpha/typhoon.c | 3 ++-
> hw/arm/smmuv3.c | 2 +-
> hw/dma/rc4030.c | 2 +-
> hw/i386/amd_iommu.c | 2 +-
> hw/i386/intel_iommu.c | 2 +-
> hw/ppc/spapr_iommu.c | 3 ++-
> hw/s390x/s390-pci-bus.c | 2 +-
> hw/sparc/sun4m_iommu.c | 3 ++-
> hw/sparc64/sun4u_iommu.c | 2 +-
> memory.c | 2 +-
> 12 files changed, 24 insertions(+), 13 deletions(-)
>
> diff --git a/include/exec/memory.h b/include/exec/memory.h
> index 4e6b125add..b25cf527bb 100644
> --- a/include/exec/memory.h
> +++ b/include/exec/memory.h
> @@ -252,9 +252,10 @@ typedef struct IOMMUMemoryRegionClass {
> * @iommu: the IOMMUMemoryRegion
> * @hwaddr: address to be translated within the memory region
> * @flag: requested access permissions
> + * @iommu_idx: IOMMU index for the translation
> */
> IOMMUTLBEntry (*translate)(IOMMUMemoryRegion *iommu, hwaddr addr,
> - IOMMUAccessFlags flag);
> + IOMMUAccessFlags flag, int iommu_idx);
> /* Returns minimum supported page size in bytes.
> * If this method is not provided then the minimum is assumed to
> * be TARGET_PAGE_SIZE.
> diff --git a/exec.c b/exec.c
> index c3baadc349..c9285c9c39 100644
> --- a/exec.c
> +++ b/exec.c
> @@ -498,8 +498,15 @@ static MemoryRegionSection address_space_translate_iommu(IOMMUMemoryRegion *iomm
> do {
> hwaddr addr = *xlat;
> IOMMUMemoryRegionClass *imrc = memory_region_get_iommu_class_nocheck(iommu_mr);
> - IOMMUTLBEntry iotlb = imrc->translate(iommu_mr, addr, is_write ?
> - IOMMU_WO : IOMMU_RO);
> + int iommu_idx = 0;
> + IOMMUTLBEntry iotlb;
> +
> + if (imrc->attrs_to_index) {
> + iommu_idx = imrc->attrs_to_index(iommu_mr, attrs);
> + }
> +
> + iotlb = imrc->translate(iommu_mr, addr, is_write ?
> + IOMMU_WO : IOMMU_RO, iommu_idx);
>
> if (!(iotlb.perm & (1 << is_write))) {
> goto unassigned;
> diff --git a/hw/alpha/typhoon.c b/hw/alpha/typhoon.c
> index 6a40869488..d3ed7cdbe8 100644
> --- a/hw/alpha/typhoon.c
> +++ b/hw/alpha/typhoon.c
> @@ -666,7 +666,8 @@ static bool window_translate(TyphoonWindow *win, hwaddr addr,
> Pchip and generate a machine check interrupt. */
> static IOMMUTLBEntry typhoon_translate_iommu(IOMMUMemoryRegion *iommu,
> hwaddr addr,
> - IOMMUAccessFlags flag)
> + IOMMUAccessFlags flag,
> + int iommu_idx)
> {
> TyphoonPchip *pchip = container_of(iommu, TyphoonPchip, iommu);
> IOMMUTLBEntry ret;
> diff --git a/hw/arm/smmuv3.c b/hw/arm/smmuv3.c
> index 42dc521c13..978330900d 100644
> --- a/hw/arm/smmuv3.c
> +++ b/hw/arm/smmuv3.c
> @@ -538,7 +538,7 @@ static int smmuv3_decode_config(IOMMUMemoryRegion *mr, SMMUTransCfg *cfg,
> }
>
> static IOMMUTLBEntry smmuv3_translate(IOMMUMemoryRegion *mr, hwaddr addr,
> - IOMMUAccessFlags flag)
> + IOMMUAccessFlags flag, int iommu_idx)
> {
> SMMUDevice *sdev = container_of(mr, SMMUDevice, iommu);
> SMMUv3State *s = sdev->smmu;
> diff --git a/hw/dma/rc4030.c b/hw/dma/rc4030.c
> index 5d4833eeca..ccd8612888 100644
> --- a/hw/dma/rc4030.c
> +++ b/hw/dma/rc4030.c
> @@ -491,7 +491,7 @@ static const MemoryRegionOps jazzio_ops = {
> };
>
> static IOMMUTLBEntry rc4030_dma_translate(IOMMUMemoryRegion *iommu, hwaddr addr,
> - IOMMUAccessFlags flag)
> + IOMMUAccessFlags flag, int iommu_idx)
> {
> rc4030State *s = container_of(iommu, rc4030State, dma_mr);
> IOMMUTLBEntry ret = {
> diff --git a/hw/i386/amd_iommu.c b/hw/i386/amd_iommu.c
> index 63d46ff6ee..1fd669fef8 100644
> --- a/hw/i386/amd_iommu.c
> +++ b/hw/i386/amd_iommu.c
> @@ -991,7 +991,7 @@ static inline bool amdvi_is_interrupt_addr(hwaddr addr)
> }
>
> static IOMMUTLBEntry amdvi_translate(IOMMUMemoryRegion *iommu, hwaddr addr,
> - IOMMUAccessFlags flag)
> + IOMMUAccessFlags flag, int iommu_idx)
> {
> AMDVIAddressSpace *as = container_of(iommu, AMDVIAddressSpace, iommu);
> AMDVIState *s = as->iommu_state;
> diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c
> index b8c9354b0b..a4b9a254bd 100644
> --- a/hw/i386/intel_iommu.c
> +++ b/hw/i386/intel_iommu.c
> @@ -2282,7 +2282,7 @@ static void vtd_mem_write(void *opaque, hwaddr addr,
> }
>
> static IOMMUTLBEntry vtd_iommu_translate(IOMMUMemoryRegion *iommu, hwaddr addr,
> - IOMMUAccessFlags flag)
> + IOMMUAccessFlags flag, int iommu_idx)
> {
> VTDAddressSpace *vtd_as = container_of(iommu, VTDAddressSpace, iommu);
> IntelIOMMUState *s = vtd_as->iommu_state;
> diff --git a/hw/ppc/spapr_iommu.c b/hw/ppc/spapr_iommu.c
> index 301708e45e..1b0880ac9e 100644
> --- a/hw/ppc/spapr_iommu.c
> +++ b/hw/ppc/spapr_iommu.c
> @@ -112,7 +112,8 @@ static void spapr_tce_free_table(uint64_t *table, int fd, uint32_t nb_table)
> /* Called from RCU critical section */
> static IOMMUTLBEntry spapr_tce_translate_iommu(IOMMUMemoryRegion *iommu,
> hwaddr addr,
> - IOMMUAccessFlags flag)
> + IOMMUAccessFlags flag,
> + int iommu_idx)
> {
> sPAPRTCETable *tcet = container_of(iommu, sPAPRTCETable, iommu);
> uint64_t tce;
> diff --git a/hw/s390x/s390-pci-bus.c b/hw/s390x/s390-pci-bus.c
> index 10da87458e..e3e0ebb7f6 100644
> --- a/hw/s390x/s390-pci-bus.c
> +++ b/hw/s390x/s390-pci-bus.c
> @@ -484,7 +484,7 @@ uint16_t s390_guest_io_table_walk(uint64_t g_iota, hwaddr addr,
> }
>
> static IOMMUTLBEntry s390_translate_iommu(IOMMUMemoryRegion *mr, hwaddr addr,
> - IOMMUAccessFlags flag)
> + IOMMUAccessFlags flag, int iommu_idx)
> {
> S390PCIIOMMU *iommu = container_of(mr, S390PCIIOMMU, iommu_mr);
> S390IOTLBEntry *entry;
> diff --git a/hw/sparc/sun4m_iommu.c b/hw/sparc/sun4m_iommu.c
> index b677601fc6..7ca1e3fce4 100644
> --- a/hw/sparc/sun4m_iommu.c
> +++ b/hw/sparc/sun4m_iommu.c
> @@ -282,7 +282,8 @@ static void iommu_bad_addr(IOMMUState *s, hwaddr addr,
> /* Called from RCU critical section */
> static IOMMUTLBEntry sun4m_translate_iommu(IOMMUMemoryRegion *iommu,
> hwaddr addr,
> - IOMMUAccessFlags flags)
> + IOMMUAccessFlags flags,
> + int iommu_idx)
> {
> IOMMUState *is = container_of(iommu, IOMMUState, iommu);
> hwaddr page, pa;
> diff --git a/hw/sparc64/sun4u_iommu.c b/hw/sparc64/sun4u_iommu.c
> index eb3aaa87e6..1ef7645ba5 100644
> --- a/hw/sparc64/sun4u_iommu.c
> +++ b/hw/sparc64/sun4u_iommu.c
> @@ -73,7 +73,7 @@
> /* Called from RCU critical section */
> static IOMMUTLBEntry sun4u_translate_iommu(IOMMUMemoryRegion *iommu,
> hwaddr addr,
> - IOMMUAccessFlags flag)
> + IOMMUAccessFlags flag, int iommu_idx)
> {
> IOMMUState *is = container_of(iommu, IOMMUState, iommu);
> hwaddr baseaddr, offset;
> diff --git a/memory.c b/memory.c
> index accb28d694..ff6cbf5831 100644
> --- a/memory.c
> +++ b/memory.c
> @@ -1835,7 +1835,7 @@ void memory_region_iommu_replay(IOMMUMemoryRegion *iommu_mr, IOMMUNotifier *n)
> granularity = memory_region_iommu_get_min_page_size(iommu_mr);
>
> for (addr = 0; addr < memory_region_size(mr); addr += granularity) {
> - iotlb = imrc->translate(iommu_mr, addr, IOMMU_NONE);
> + iotlb = imrc->translate(iommu_mr, addr, IOMMU_NONE, n->iommu_idx);
> if (iotlb.perm != IOMMU_NONE) {
> n->notify(n, &iotlb);
> }
--
Alex Bennée
next prev parent reply other threads:[~2018-05-23 9:12 UTC|newest]
Thread overview: 114+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-05-21 14:03 [Qemu-devel] [PATCH 00/27] iommu: support txattrs, support TCG execution, implement TZ MPC Peter Maydell
2018-05-21 14:03 ` [Qemu-devel] [PATCH 01/27] memory.h: Improve IOMMU related documentation Peter Maydell
2018-05-21 19:46 ` Richard Henderson
2018-05-22 9:16 ` Alex Bennée
2018-05-22 11:40 ` Auger Eric
2018-05-21 14:03 ` [Qemu-devel] [PATCH 02/27] Make tb_invalidate_phys_addr() take a MemTxAttrs argument Peter Maydell
2018-05-21 23:54 ` Richard Henderson
2018-05-22 9:21 ` Alex Bennée
2018-05-21 14:03 ` [Qemu-devel] [PATCH 03/27] Make address_space_translate{, _cached}() " Peter Maydell
2018-05-22 10:49 ` Alex Bennée
2018-05-22 16:12 ` Richard Henderson
2018-05-21 14:03 ` [Qemu-devel] [PATCH 04/27] Make address_space_map() " Peter Maydell
2018-05-22 10:49 ` Alex Bennée
2018-05-22 16:13 ` Richard Henderson
2018-05-21 14:03 ` [Qemu-devel] [PATCH 05/27] Make address_space_access_valid() " Peter Maydell
2018-05-22 10:50 ` Alex Bennée
2018-05-22 16:14 ` Richard Henderson
2018-05-21 14:03 ` [Qemu-devel] [PATCH 06/27] Make flatview_extend_translation() " Peter Maydell
2018-05-22 10:56 ` Alex Bennée
2018-05-22 16:15 ` Richard Henderson
2018-05-21 14:03 ` [Qemu-devel] [PATCH 07/27] Make memory_region_access_valid() " Peter Maydell
2018-05-22 10:57 ` Alex Bennée
2018-05-22 16:17 ` Richard Henderson
2018-05-21 14:03 ` [Qemu-devel] [PATCH 08/27] Make MemoryRegion valid.accepts callback " Peter Maydell
2018-05-22 10:58 ` Alex Bennée
2018-05-22 16:20 ` Richard Henderson
2018-05-21 14:03 ` [Qemu-devel] [PATCH 09/27] Make flatview_access_valid() " Peter Maydell
2018-05-22 10:58 ` Alex Bennée
2018-05-22 16:33 ` Richard Henderson
2018-05-22 16:37 ` Peter Maydell
2018-05-21 14:03 ` [Qemu-devel] [PATCH 10/27] Make flatview_translate() " Peter Maydell
2018-05-22 10:58 ` Alex Bennée
2018-05-22 16:33 ` Richard Henderson
2018-05-21 14:03 ` [Qemu-devel] [PATCH 11/27] Make address_space_get_iotlb_entry() " Peter Maydell
2018-05-22 11:00 ` Alex Bennée
2018-05-22 17:29 ` Richard Henderson
2018-05-21 14:03 ` [Qemu-devel] [PATCH 12/27] Make flatview_do_translate() " Peter Maydell
2018-05-22 11:00 ` Alex Bennée
2018-05-22 17:29 ` Richard Henderson
2018-05-21 14:03 ` [Qemu-devel] [PATCH 13/27] Make address_space_translate_iommu " Peter Maydell
2018-05-22 11:00 ` Alex Bennée
2018-05-22 17:30 ` Richard Henderson
2018-05-21 14:03 ` [Qemu-devel] [PATCH 14/27] iommu: Add IOMMU index concept to IOMMU API Peter Maydell
2018-05-22 3:03 ` Peter Xu
2018-05-22 8:40 ` Peter Maydell
2018-05-22 11:02 ` Peter Xu
2018-05-22 11:11 ` Peter Maydell
2018-05-23 1:06 ` Peter Xu
2018-05-23 11:47 ` Peter Maydell
2018-05-24 6:23 ` Peter Xu
2018-05-24 10:54 ` Peter Maydell
2018-05-25 2:50 ` Peter Xu
2018-05-25 9:27 ` Auger Eric
2018-05-25 9:34 ` Peter Maydell
2018-05-22 12:58 ` Auger Eric
2018-05-22 13:22 ` Peter Maydell
2018-05-22 14:11 ` Auger Eric
2018-05-22 14:19 ` Peter Maydell
2018-05-22 14:22 ` Auger Eric
2018-05-22 17:42 ` Richard Henderson
2018-05-22 17:51 ` Peter Maydell
2018-05-22 17:52 ` Richard Henderson
2018-05-21 14:03 ` [Qemu-devel] [PATCH 15/27] iommu: Add IOMMU index argument to notifier APIs Peter Maydell
2018-05-22 17:45 ` Richard Henderson
2018-05-23 9:08 ` Alex Bennée
2018-06-04 13:03 ` Peter Maydell
2018-06-04 15:09 ` Alex Bennée
2018-06-04 15:23 ` Peter Maydell
2018-05-24 15:29 ` Auger Eric
2018-05-24 17:03 ` Peter Maydell
2018-05-24 19:13 ` Auger Eric
2018-05-21 14:03 ` [Qemu-devel] [PATCH 16/27] iommu: Add IOMMU index argument to translate method Peter Maydell
2018-05-22 18:06 ` Richard Henderson
2018-05-23 9:11 ` Alex Bennée [this message]
2018-05-21 14:03 ` [Qemu-devel] [PATCH 17/27] exec.c: Handle IOMMUs in address_space_translate_for_iotlb() Peter Maydell
2018-05-23 9:51 ` Alex Bennée
2018-05-23 11:52 ` Peter Maydell
2018-05-24 19:54 ` Auger Eric
2018-05-25 8:52 ` Peter Maydell
2018-05-25 9:50 ` Auger Eric
2018-05-25 9:59 ` Peter Maydell
2018-05-21 14:03 ` [Qemu-devel] [PATCH 18/27] hw/misc/tz-mpc.c: Implement the Arm TrustZone Memory Protection Controller Peter Maydell
2018-05-22 11:30 ` Auger Eric
2018-05-22 11:56 ` Peter Maydell
2018-05-22 12:23 ` Auger Eric
2018-05-23 10:41 ` Alex Bennée
2018-05-21 14:03 ` [Qemu-devel] [PATCH 19/27] hw/misc/tz-mpc.c: Implement registers Peter Maydell
2018-05-23 10:44 ` Alex Bennée
2018-05-21 14:03 ` [Qemu-devel] [PATCH 20/27] hw/misc/tz-mpc.c: Implement correct blocked-access behaviour Peter Maydell
2018-05-23 10:49 ` Alex Bennée
2018-05-23 11:54 ` Peter Maydell
2018-05-21 14:03 ` [Qemu-devel] [PATCH 21/27] hw/misc/tz_mpc.c: Honour the BLK_LUT settings in translate Peter Maydell
2018-05-21 14:03 ` [Qemu-devel] [PATCH 22/27] vmstate.h: Provide VMSTATE_BOOL_SUB_ARRAY Peter Maydell
2018-05-23 11:01 ` Alex Bennée
2018-05-21 14:03 ` [Qemu-devel] [PATCH 23/27] hw/core/or-irq: Support more than 16 inputs to an OR gate Peter Maydell
2018-05-21 14:34 ` Paolo Bonzini
2018-05-21 15:02 ` Peter Maydell
2018-05-30 16:59 ` Paolo Bonzini
2018-05-30 17:35 ` Peter Maydell
2018-05-31 10:21 ` Paolo Bonzini
2018-05-31 10:50 ` Peter Maydell
2018-05-31 11:50 ` Paolo Bonzini
2018-05-31 11:59 ` Peter Maydell
2018-05-21 14:03 ` [Qemu-devel] [PATCH 24/27] hw/misc/iotkit-secctl.c: Implement SECMPCINTSTATUS Peter Maydell
2018-05-21 14:04 ` [Qemu-devel] [PATCH 25/27] hw/arm/iotkit: Instantiate MPC Peter Maydell
2018-05-23 11:38 ` Alex Bennée
2018-05-21 14:04 ` [Qemu-devel] [PATCH 26/27] hw/arm/iotkit: Wire up MPC interrupt lines Peter Maydell
2018-05-23 11:39 ` Alex Bennée
2018-05-21 14:04 ` [Qemu-devel] [PATCH 27/27] hw/arm/mps2-tz.c: Instantiate MPCs Peter Maydell
2018-05-23 11:41 ` Alex Bennée
2018-05-21 15:10 ` [Qemu-devel] [PATCH 00/27] iommu: support txattrs, support TCG execution, implement TZ MPC no-reply
2018-05-30 16:58 ` Paolo Bonzini
2018-05-31 9:54 ` Peter Maydell
2018-05-31 13:37 ` Peter Maydell
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=874liyviqu.fsf@linaro.org \
--to=alex.bennee@linaro.org \
--cc=patches@linaro.org \
--cc=pbonzini@redhat.com \
--cc=peter.maydell@linaro.org \
--cc=qemu-arm@nongnu.org \
--cc=qemu-devel@nongnu.org \
--cc=rth@twiddle.net \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).