From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:55697) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aiPqO-0002Th-OO for qemu-devel@nongnu.org; Tue, 22 Mar 2016 13:11:49 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1aiPqJ-0008Pu-Vv for qemu-devel@nongnu.org; Tue, 22 Mar 2016 13:11:48 -0400 Received: from mail-wm0-x22f.google.com ([2a00:1450:400c:c09::22f]:34411) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aiPqJ-0008Pi-Ei for qemu-devel@nongnu.org; Tue, 22 Mar 2016 13:11:43 -0400 Received: by mail-wm0-x22f.google.com with SMTP id p65so201805828wmp.1 for ; Tue, 22 Mar 2016 10:11:43 -0700 (PDT) References: <102a10b5ede9a4c8dc06d2f4f81c57c4e2a71a1c.1457470980.git.alistair.francis@xilinx.com> From: Alex =?utf-8?Q?Benn=C3=A9e?= In-reply-to: <102a10b5ede9a4c8dc06d2f4f81c57c4e2a71a1c.1457470980.git.alistair.francis@xilinx.com> Date: Tue, 22 Mar 2016 17:11:40 +0000 Message-ID: <874mbysaib.fsf@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit Subject: Re: [Qemu-devel] [PATCH v5 07/15] register: Add block initialise helper List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Alistair Francis Cc: edgar.iglesias@xilinx.com, peter.maydell@linaro.org, qemu-devel@nongnu.org, crosthwaitepeter@gmail.com, edgar.iglesias@gmail.com, afaerber@suse.de, fred.konrad@greensocs.com Alistair Francis writes: > From: Peter Crosthwaite > > Add a helper that will scan a static RegisterAccessInfo Array > and populate a container MemoryRegion with registers as defined. > > Signed-off-by: Peter Crosthwaite > Signed-off-by: Alistair Francis > --- > V3: > - Fix typo > V2: > - Use memory_region_add_subregion_no_print() > > hw/core/register.c | 39 +++++++++++++++++++++++++++++++++++++++ > include/hw/register.h | 20 ++++++++++++++++++++ > 2 files changed, 59 insertions(+) > > diff --git a/hw/core/register.c b/hw/core/register.c > index 28f3776..5db8f62 100644 > --- a/hw/core/register.c > +++ b/hw/core/register.c > @@ -228,6 +228,45 @@ uint64_t register_read_memory_le(void *opaque, hwaddr addr, unsigned size) > return register_read_memory(opaque, addr, size, false); > } > > +void register_init_block32(DeviceState *owner, const RegisterAccessInfo *rae, > + int num, RegisterInfo *ri, uint32_t *data, > + MemoryRegion *container, const MemoryRegionOps *ops, > + bool debug_enabled, uint64_t memory_size) > +{ > + const char *device_prefix = object_get_typename(OBJECT(owner)); > + RegisterInfoArray *r_array = g_malloc(sizeof(RegisterInfoArray)); > + int i; > + > + r_array->num_elements = 0; > + r_array->r = g_malloc_n(num, sizeof(RegisterInfo *)); Don't re-invent the wheel if you don't have to. glib already has an array type which means your boilerplate becomes: GArray *r_array = g_array_sized_new(true, true, sizeof(RegisterInfo *),num); for (...) { ...create r... g_array_append_val(r_array, r); } > + > + for (i = 0; i < num; i++) { > + int index = rae[i].decode.addr / 4; > + RegisterInfo *r = &ri[index]; > + > + *r = (RegisterInfo) { > + .data = &data[index], > + .data_size = sizeof(uint32_t), > + .access = &rae[i], > + .debug = debug_enabled, > + .prefix = device_prefix, > + .opaque = owner, > + }; > + register_init(r); > + > + r_array->r[r_array->num_elements] = r; > + r_array->num_elements++; > + } > + > + r_array->num_elements--; That's just plain confusing. > + > + memory_region_init_io(&r_array->mem, OBJECT(owner), ops, r_array, > + device_prefix, memory_size); > + memory_region_add_subregion(container, > + r_array->r[0]->access->decode.addr, > + &r_array->mem); > +} > + > static const TypeInfo register_info = { > .name = TYPE_REGISTER, > .parent = TYPE_DEVICE, > diff --git a/include/hw/register.h b/include/hw/register.h > index d732f55..00df7d5 100644 > --- a/include/hw/register.h > +++ b/include/hw/register.h > @@ -176,6 +176,26 @@ void register_write_memory_le(void *opaque, hwaddr addr, uint64_t value, > uint64_t register_read_memory_be(void *opaque, hwaddr addr, unsigned size); > uint64_t register_read_memory_le(void *opaque, hwaddr addr, unsigned size); > > +/** > + * Init a block of consecutive registers into a container MemoryRegion. A > + * number of constant register definitions are parsed to create a corresponding > + * array of RegisterInfo's. > + * > + * @owner: device owning the registers > + * @rae: Register definitions to init > + * @num: number of registers to init (length of @rae) > + * @ri: Register array to init > + * @data: Array to use for register data > + * @container: Memory region to contain new registers > + * @ops: Memory region ops to access registers. > + * @debug enabled: turn on/off verbose debug information > + */ > + > +void register_init_block32(DeviceState *owner, const RegisterAccessInfo *rae, > + int num, RegisterInfo *ri, uint32_t *data, > + MemoryRegion *container, const MemoryRegionOps *ops, > + bool debug_enabled, uint64_t memory_size); > + > /* Define constants for a 32 bit register */ > #define REG32(reg, addr) \ > enum { A_ ## reg = (addr) }; \ -- Alex Bennée