From: "Alex Bennée" <alex.bennee@linaro.org>
To: Paolo Bonzini <pbonzini@redhat.com>
Cc: peter.maydell@linaro.org, qemu-devel@nongnu.org
Subject: Re: [PATCH] target/i386: do not access beyond the low 128 bits of SSE registers
Date: Wed, 13 Apr 2022 19:44:13 +0100 [thread overview]
Message-ID: <875yncygac.fsf@linaro.org> (raw)
In-Reply-To: <20220413160945.544176-1-pbonzini@redhat.com>
Paolo Bonzini <pbonzini@redhat.com> writes:
> The i386 target consolidates all vector registers so that instead of
> XMMReg, YMMReg and ZMMReg structs there is a single ZMMReg that can
> fit all of SSE, AVX and AVX512.
>
> When TCG copies data from and to the SSE registers, it uses the
> full 64-byte width. This is not a correctness issue because TCG
> never lets guest code see beyond the first 128 bits of the ZMM
> registers, however it causes uninitialized stack memory to
> make it to the CPU's migration stream.
>
> Fix it by only copying the low 16 bytes of the ZMMReg union into
> the destination register.
>
> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
And:
Fixes: b7711471f5 ("target-i386: make xmm_regs 512-bit wide")
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/420
?
--
Alex Bennée
next prev parent reply other threads:[~2022-04-13 18:46 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-04-13 16:09 [PATCH] target/i386: do not access beyond the low 128 bits of SSE registers Paolo Bonzini
2022-04-13 16:25 ` Peter Maydell
2022-04-13 18:44 ` Alex Bennée [this message]
2022-04-13 20:11 ` Paolo Bonzini
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