From: "Alex Bennée" <alex.bennee@linaro.org>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: Marc Zyngier <maz@kernel.org>,
Shashi Mallela <shashi.mallela@linaro.org>,
qemu-arm@nongnu.org,
Richard Henderson <richard.henderson@linaro.org>,
qemu-devel@nongnu.org
Subject: Re: [PATCH for-6.2? 1/2] hw/intc/arm_gicv3: Add new gicv3_intid_is_special() function
Date: Sun, 28 Nov 2021 16:29:58 +0000 [thread overview]
Message-ID: <875yscnsz8.fsf@linaro.org> (raw)
In-Reply-To: <20211126163915.1048353-2-peter.maydell@linaro.org>
Peter Maydell <peter.maydell@linaro.org> writes:
> The GICv3/v4 pseudocode has a function IsSpecial() which returns true
> if passed a "special" interrupt ID number (anything between 1020 and
> 1023 inclusive). We open-code this condition in a couple of places,
> so abstract it out into a new function gicv3_intid_is_special().
>
> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
--
Alex Bennée
next prev parent reply other threads:[~2021-11-28 16:31 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-11-26 16:39 [PATCH for-6.2? 0/2] arm_gicv3: Fix handling of LPIs in list registers Peter Maydell
2021-11-26 16:39 ` [PATCH for-6.2? 1/2] hw/intc/arm_gicv3: Add new gicv3_intid_is_special() function Peter Maydell
2021-11-28 16:29 ` Alex Bennée [this message]
2021-11-26 16:39 ` [PATCH for-6.2? 2/2] hw/intc/arm_gicv3: fix handling of LPIs in list registers Peter Maydell
2021-11-29 9:19 ` [PATCH for-6.2? 0/2] arm_gicv3: Fix " Marc Zyngier
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