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Thu, 15 Apr 2021 11:13:08 -0700 (PDT) Received: from zen.linaroharston ([51.148.130.216]) by smtp.gmail.com with ESMTPSA id b16sm4307917wmb.39.2021.04.15.11.13.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 15 Apr 2021 11:13:07 -0700 (PDT) Received: from zen (localhost [127.0.0.1]) by zen.linaroharston (Postfix) with ESMTP id 38DDA1FF7E; Thu, 15 Apr 2021 19:13:07 +0100 (BST) References: <20210415162454.22056-1-alex.bennee@linaro.org> User-agent: mu4e 1.5.11; emacs 28.0.50 From: Alex =?utf-8?Q?Benn=C3=A9e?= To: Peter Maydell Subject: Re: [RFC PATCH] accel/tcg: avoid re-translating one-shot instructions Date: Thu, 15 Apr 2021 19:12:50 +0100 In-reply-to: Message-ID: <875z0nl8lo.fsf@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Received-SPF: pass client-ip=2a00:1450:4864:20::32c; envelope-from=alex.bennee@linaro.org; helo=mail-wm1-x32c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , Richard Henderson , QEMU Developers Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Peter Maydell writes: > On Thu, 15 Apr 2021 at 17:25, Alex Benn=C3=A9e w= rote: >> >> By definition a single instruction is capable of being an IO >> instruction. This avoids a problem of triggering a cpu_io_recompile on >> a non-recorded translation which then fails because it expects >> tcg_tb_lookup() to succeed unconditionally. The normal use case >> requires a TB to be able to resolve machine state. >> >> The other users of tcg_tb_lookup() are able to tolerate a missing TB >> if the machine state has been resolved by other means - which in the >> single-shot case is always true because machine state is synced at the >> start of a block. >> >> Reported-by: Peter Maydell >> Signed-off-by: Alex Benn=C3=A9e >> --- >> accel/tcg/translate-all.c | 2 +- >> 1 file changed, 1 insertion(+), 1 deletion(-) >> >> diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c >> index ba6ab09790..b12d0898d0 100644 >> --- a/accel/tcg/translate-all.c >> +++ b/accel/tcg/translate-all.c >> @@ -1863,7 +1863,7 @@ TranslationBlock *tb_gen_code(CPUState *cpu, >> >> if (phys_pc =3D=3D -1) { >> /* Generate a one-shot TB with 1 insn in it */ >> - cflags =3D (cflags & ~CF_COUNT_MASK) | 1; >> + cflags =3D (cflags & ~CF_COUNT_MASK) | CF_LAST_IO | 1; >> } >> >> max_insns =3D cflags & CF_COUNT_MASK; >> -- > > Reviewed-by: Peter Maydell Are you going to apply this directly or do you want it through a tree? > > thanks > -- PMM --=20 Alex Benn=C3=A9e