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From: "Alex Bennée" <alex.bennee@linaro.org>
To: qemu-arm@nongnu.org
Cc: peter.maydell@linaro.org, qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [Qemu-arm] [PATCH v5 02/17] target/arm: Split out rebuild_hflags_a64
Date: Thu, 05 Sep 2019 16:28:41 +0100	[thread overview]
Message-ID: <875zm692za.fsf@linaro.org> (raw)
In-Reply-To: <20190820210720.18976-3-richard.henderson@linaro.org>


Richard Henderson <richard.henderson@linaro.org> writes:

> Create a function to compute the values of the TBFLAG_A64 bits
> that will be cached.  For now, the env->hflags variable is not
> used, and the results are fed back to cpu_get_tb_cpu_state.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
>  target/arm/helper.c | 131 +++++++++++++++++++++++---------------------
>  1 file changed, 69 insertions(+), 62 deletions(-)
>
> diff --git a/target/arm/helper.c b/target/arm/helper.c
> index f2c6419369..02cb43cf58 100644
> --- a/target/arm/helper.c
> +++ b/target/arm/helper.c
> @@ -11032,6 +11032,71 @@ static uint32_t rebuild_hflags_common(CPUARMState *env, int fp_el,
>      return flags;
>  }
>
> +static uint32_t rebuild_hflags_a64(CPUARMState *env, int el, int fp_el,
> +                                   ARMMMUIdx mmu_idx)
> +{
<snip>
> +
> +    if (cpu_isar_feature(aa64_bti, env_archcpu(env))) {
> +        /* Note that SCTLR_EL[23].BT == SCTLR_BT1.  */
> +        if (sctlr & (el == 0 ? SCTLR_BT0 : SCTLR_BT1)) {
> +            flags = FIELD_DP32(flags, TBFLAG_A64, BT, 1);
> +        }
> +    }
> +
> +    return rebuild_hflags_common(env, fp_el, mmu_idx, flags);
> +}
> +
>  void cpu_get_tb_cpu_state(CPUARMState *env, target_ulong *pc,
>                            target_ulong *cs_base, uint32_t *pflags)
>  {
> @@ -11041,67 +11106,9 @@ void cpu_get_tb_cpu_state(CPUARMState *env, target_ulong *pc,
>      uint32_t flags = 0;
>
>      if (is_a64(env)) {
<snip>
> -
> -        if (cpu_isar_feature(aa64_bti, cpu)) {
> -            /* Note that SCTLR_EL[23].BT == SCTLR_BT1.  */
> -            if (sctlr & (current_el == 0 ? SCTLR_BT0 : SCTLR_BT1)) {
> -                flags = FIELD_DP32(flags, TBFLAG_A64, BT, 1);
> -            }
> +        flags = rebuild_hflags_a64(env, current_el, fp_el, mmu_idx);
> +        if (cpu_isar_feature(aa64_bti, env_archcpu(env))) {
>              flags = FIELD_DP32(flags, TBFLAG_A64, BTYPE, env->btype);

It seems off to only hoist part of the BTI flag check into the helper,
was it just missed or is there a reason? If so it could probably do with
an additional comment.

>          }
>      } else {
> @@ -11121,9 +11128,9 @@ void cpu_get_tb_cpu_state(CPUARMState *env, target_ulong *pc,
>              flags = FIELD_DP32(flags, TBFLAG_A32,
>                                 XSCALE_CPAR, env->cp15.c15_cpar);
>          }
> -    }
>
> -    flags = rebuild_hflags_common(env, fp_el, mmu_idx, flags);
> +        flags = rebuild_hflags_common(env, fp_el, mmu_idx, flags);
> +    }
>
>      /* The SS_ACTIVE and PSTATE_SS bits correspond to the state machine
>       * states defined in the ARM ARM for software singlestep:


--
Alex Bennée


  reply	other threads:[~2019-09-05 15:30 UTC|newest]

Thread overview: 31+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-08-20 21:07 [Qemu-devel] [PATCH v5 00/17] target/arm: Reduce overhead of cpu_get_tb_cpu_state Richard Henderson
2019-08-20 21:07 ` [Qemu-devel] [PATCH v5 01/17] target/arm: Split out rebuild_hflags_common Richard Henderson
2019-09-05 13:58   ` [Qemu-devel] [Qemu-arm] " Alex Bennée
2019-08-20 21:07 ` [Qemu-devel] [PATCH v5 02/17] target/arm: Split out rebuild_hflags_a64 Richard Henderson
2019-09-05 15:28   ` Alex Bennée [this message]
2019-09-06  3:26     ` [Qemu-devel] [Qemu-arm] " Richard Henderson
2019-09-06 15:52       ` Alex Bennée
2019-08-20 21:07 ` [Qemu-devel] [PATCH v5 03/17] target/arm: Split out rebuild_hflags_common_32 Richard Henderson
2019-08-20 21:07 ` [Qemu-devel] [PATCH v5 04/17] target/arm: Split arm_cpu_data_is_big_endian Richard Henderson
2019-08-20 21:07 ` [Qemu-devel] [PATCH v5 05/17] target/arm: Split out rebuild_hflags_m32 Richard Henderson
2019-08-20 21:07 ` [Qemu-devel] [PATCH v5 06/17] target/arm: Reduce tests vs M-profile in cpu_get_tb_cpu_state Richard Henderson
2019-08-20 21:07 ` [Qemu-devel] [PATCH v5 07/17] target/arm: Split out rebuild_hflags_a32 Richard Henderson
2019-08-20 21:07 ` [Qemu-devel] [PATCH v5 08/17] target/arm: Split out rebuild_hflags_aprofile Richard Henderson
2019-08-20 21:07 ` [Qemu-devel] [PATCH v5 09/17] target/arm: Hoist XSCALE_CPAR, VECLEN, VECSTRIDE in cpu_get_tb_cpu_state Richard Henderson
2019-08-20 21:07 ` [Qemu-devel] [PATCH v5 10/17] target/arm: Simplify set of PSTATE_SS " Richard Henderson
2019-08-20 21:07 ` [Qemu-devel] [PATCH v5 11/17] target/arm: Hoist computation of TBFLAG_A32.VFPEN Richard Henderson
2019-08-20 21:07 ` [Qemu-devel] [PATCH v5 12/17] target/arm: Add arm_rebuild_hflags Richard Henderson
2019-08-20 21:07 ` [Qemu-devel] [PATCH v5 13/17] target/arm: Split out arm_mmu_idx_el Richard Henderson
2019-09-06  7:12   ` Philippe Mathieu-Daudé
2019-08-20 21:07 ` [Qemu-devel] [PATCH v5 14/17] target/arm: Hoist store to cs_base in cpu_get_tb_cpu_state Richard Henderson
2019-08-20 21:07 ` [Qemu-devel] [PATCH v5 15/17] target/arm: Add HELPER(rebuild_hflags_{a32, a64, m32}) Richard Henderson
2019-08-20 21:07 ` [Qemu-devel] [PATCH v5 16/17] target/arm: Rebuild hflags at EL changes and MSR writes Richard Henderson
2019-09-05 13:53   ` Alex Bennée
2019-08-20 21:07 ` [Qemu-devel] [PATCH v5 17/17] target/arm: Rely on hflags correct in cpu_get_tb_cpu_state Richard Henderson
2019-09-05 15:23   ` [Qemu-devel] [Qemu-arm] " Alex Bennée
2019-09-05 15:40     ` Laurent Desnogues
2019-09-05 15:50       ` Alex Bennée
2019-09-06  3:02         ` Richard Henderson
2019-08-20 23:54 ` [Qemu-devel] [PATCH v5 00/17] target/arm: Reduce overhead of cpu_get_tb_cpu_state Richard Henderson
2019-09-04 10:48   ` Peter Maydell
2019-09-04 17:26     ` Richard Henderson

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