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From: Alex =?utf-8?Q?Benn=C3=A9e?= <alex.bennee@linaro.org>
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Date: Wed, 12 Jul 2017 10:21:21 +0100
Message-ID: <8760ey9fji.fsf@linaro.org>
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Subject: Re: [Qemu-devel] [PATCH v12 07/27] target/i386: [tcg] Port to
 insn_start
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To: =?utf-8?Q?Llu=C3=ADs?= Vilanova <vilanova@ac.upc.edu>
Cc: qemu-devel@nongnu.org, "Emilio G. Cota" <cota@braap.org>, Richard Henderson <rth@twiddle.net>, Peter Crosthwaite <crosthwaite.peter@gmail.com>, Paolo Bonzini <pbonzini@redhat.com>, Eduardo Habkost <ehabkost@redhat.com>


Lluís Vilanova <vilanova@ac.upc.edu> writes:

> Incrementally paves the way towards using the generic instruction translation
> loop.
>
> Signed-off-by: Lluís Vilanova <vilanova@ac.upc.edu>
> Reviewed-by: Emilio G. Cota <cota@braap.org>
> Reviewed-by: Richard Henderson <rth@twiddle.net>

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>

> ---
>  target/i386/translate.c |    9 ++++++++-
>  1 file changed, 8 insertions(+), 1 deletion(-)
>
> diff --git a/target/i386/translate.c b/target/i386/translate.c
> index 7819545e37..a4b9e5628f 100644
> --- a/target/i386/translate.c
> +++ b/target/i386/translate.c
> @@ -8448,6 +8448,13 @@ static void i386_tr_init_disas_context(DisasContextBase *dcbase, CPUState *cpu)
>      cpu_cc_srcT = tcg_temp_local_new();
>  }
>
> +static void i386_tr_insn_start(DisasContextBase *dcbase, CPUState *cpu)
> +{
> +    DisasContext *dc = container_of(dcbase, DisasContext, base);
> +
> +    tcg_gen_insn_start(dc->base.pc_next, dc->cc_op);
> +}
> +
>  /* generate intermediate code for basic block 'tb'.  */
>  void gen_intermediate_code(CPUState *cs, TranslationBlock *tb)
>  {
> @@ -8475,7 +8482,7 @@ void gen_intermediate_code(CPUState *cs, TranslationBlock *tb)
>
>      gen_tb_start(tb);
>      for(;;) {
> -        tcg_gen_insn_start(dc->base.pc_next, dc->cc_op);
> +        i386_tr_insn_start(&dc->base, cs);
>          num_insns++;
>
>          /* If RF is set, suppress an internally generated breakpoint.  */


--
Alex Bennée