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Wed, 2 Jul 2025 08:46:59 +0000 (UTC) Received: from localhost (dhcp-192-236.str.redhat.com [10.33.192.236]) by mx-prod-int-03.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTPS id 6A5AA19560B3; Wed, 2 Jul 2025 08:46:56 +0000 (UTC) From: Cornelia Huck To: Jinqian Yang , eric.auger.pro@gmail.com, eric.auger@redhat.com, qemu-devel@nongnu.org, qemu-arm@nongnu.org, kvmarm@lists.linux.dev, peter.maydell@linaro.org, richard.henderson@linaro.org, alex.bennee@linaro.org, maz@kernel.org, oliver.upton@linux.dev, sebott@redhat.com, shameerali.kolothum.thodi@huawei.com, armbru@redhat.com, berrange@redhat.com, abologna@redhat.com, jdenemar@redhat.com, Zhou Wang , liuyonglong Cc: agraf@csgraf.de, shahuang@redhat.com, mark.rutland@arm.com, philmd@linaro.org, pbonzini@redhat.com Subject: Re: [PATCH v3 07/10] arm/kvm: write back modified ID regs to KVM In-Reply-To: Organization: "Red Hat GmbH, Sitz: Werner-von-Siemens-Ring 12, D-85630 Grasbrunn, Handelsregister: Amtsgericht =?utf-8?Q?M=C3=BCnchen=2C?= HRB 153243, =?utf-8?Q?Gesch=C3=A4ftsf=C3=BChrer=3A?= Ryan Barnhart, Charles Cachera, Avril Crosse O'Flaherty" References: <20250414163849.321857-1-cohuck@redhat.com> <20250414163849.321857-8-cohuck@redhat.com> User-Agent: Notmuch/0.38.3 (https://notmuchmail.org) Date: Wed, 02 Jul 2025 10:46:53 +0200 Message-ID: <878ql7q8si.fsf@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable X-Scanned-By: MIMEDefang 3.0 on 10.30.177.12 Received-SPF: pass client-ip=170.10.129.124; envelope-from=cohuck@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: 12 X-Spam_score: 1.2 X-Spam_bar: + X-Spam_report: (1.2 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H5=0.001, RCVD_IN_MSPIKE_WL=0.001, RCVD_IN_SBL_CSS=3.335, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On Wed, Jul 02 2025, Jinqian Yang wrote: > On 2025/4/15 0:38, Cornelia Huck wrote: >> From: Eric Auger >> >> We want to give a chance to override the value of host ID regs. >> In a previous patch we made sure all their values could be fetched >> through kvm_get_one_reg() calls before their modification. After >> their potential modification we need to make sure we write back >> the values through kvm_set_one_reg() calls. >> >> Make sure the cpreg_list is modified with updated values and >> transfer those values back to kvm. >> >> Signed-off-by: Eric Auger >> Signed-off-by: Cornelia Huck >> --- >> target/arm/kvm.c | 44 ++++++++++++++++++++++++++++++++++++++++- >> target/arm/trace-events | 1 + >> 2 files changed, 44 insertions(+), 1 deletion(-) >> >> diff --git a/target/arm/kvm.c b/target/arm/kvm.c >> index b07d5f16db50..9e4cca1705c8 100644 >> --- a/target/arm/kvm.c >> +++ b/target/arm/kvm.c >> @@ -1083,6 +1083,39 @@ void kvm_arm_cpu_post_load(ARMCPU *cpu) >> } >> } >>=20=20=20 >> +static void kvm_arm_writable_idregs_to_cpreg_list(ARMCPU *cpu) >> +{ >> + if (!cpu->writable_map) { >> + return; >> + } >> + for (int i =3D 0; i < NR_ID_REGS; i++) { >> + uint64_t writable_mask =3D cpu->writable_map->regs[i]; >> + uint64_t *cpreg; >> + >> + if (writable_mask) { >> + uint64_t previous, new; >> + int idx =3D kvm_idx_to_idregs_idx(i); >> + ARM64SysReg *sysregdesc; >> + uint32_t sysreg; >> + >> + if (idx =3D=3D -1) { >> + /* sysreg writable, but we don't know it */ >> + continue; >> + } >> + sysregdesc =3D &arm64_id_regs[idx]; >> + sysreg =3D sysregdesc->sysreg; >> + cpreg =3D kvm_arm_get_cpreg_ptr(cpu, idregs_sysreg_to_kvm_r= eg(sysreg)); >> + previous =3D *cpreg; >> + new =3D cpu->isar.idregs[idx]; >> + if (previous !=3D new) { >> + *cpreg =3D new; >> + trace_kvm_arm_writable_idregs_to_cpreg_list(sysregdesc-= >name, >> + previous, n= ew); >> + } >> + } >> + } >> +} >> + >> void kvm_arm_reset_vcpu(ARMCPU *cpu) >> { >> int ret; >> @@ -2050,7 +2083,16 @@ int kvm_arch_init_vcpu(CPUState *cs) >> } >> cpu->mp_affinity =3D mpidr & ARM64_AFFINITY_MASK; >>=20=20=20 >> - return kvm_arm_init_cpreg_list(cpu); >> + ret =3D kvm_arm_init_cpreg_list(cpu); >> + if (ret) { >> + return ret; >> + } >> + /* overwrite writable ID regs with their updated property values */ >> + kvm_arm_writable_idregs_to_cpreg_list(cpu); >> + >> + write_list_to_kvmstate(cpu, 3); >> + >> + return 0; >> } > > Hi, > > When I was testing this series, I found a problem. On the host,=20 > SYSREG_ID_AA64MMFR3_EL1_TCRX=3D0x1, > I configured it to 0x0 in=C2=A0qemu, and qemu cannot start. > The ID_AA64MMFR3_EL1 TCRX field controls whether the TCR2_EL1 and=20 > TCR2_EL2 registers are used. > In the kernel, when TCRX is 0, TCR2_EL1 is invisible to the guest, and=20 > when it is 1, it is visible. When we > configure this field segment to 0, the configuration is not yet written=20 > to KVM, but the cpreg list is initialized, > adding TCR2_EL1 to the cpreg list. Therefore, after writing the=20 > QEMU-configured registers to KVM, the > cpreg list needs to be updated again. > > @@ -2227,7 +2229,7 @@ int kvm_arch_init_vcpu(CPUState *cs) > > =C2=A0 =C2=A0 =C2=A0write_list_to_kvmstate(cpu, 3); > > -=C2=A0 =C2=A0 return 0; > +=C2=A0 =C2=A0 return kvm_arm_init_cpreg_list(cpu); > =C2=A0} > > The above modification can solve the problem, but it may not be the best= =20 > way. Thanks for testing. Indeed, if we write something that changes the visibility of registers, we need to do an update. Probably needs some thinking (e.g. what happens if a register disappears, but the user set some fields?)