From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 9C675C3DA6E for ; Sun, 17 Dec 2023 07:38:05 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1rEliM-0001RJ-6I; Sun, 17 Dec 2023 02:37:30 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rEliJ-0001Qx-NR; Sun, 17 Dec 2023 02:37:27 -0500 Received: from zoidberg.rfc1149.net ([195.154.227.159]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rEliG-0002a0-4t; Sun, 17 Dec 2023 02:37:27 -0500 Received: from 127.0.0.1 (localhost [127.0.0.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (prime256v1) server-signature RSA-PSS (2048 bits) server-digest SHA256) (Client did not present a certificate) by zoidberg.rfc1149.net (Postfix) with ESMTPSA id 995DE80025; Sun, 17 Dec 2023 08:37:18 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=rfc1149.net; s=smtp; t=1702798638; bh=WJtvAqRs6pqgFMDIUz7FqRnqdA6ge5oy8hsHAq+8alE=; h=References:From:To:Cc:Subject:Date:In-reply-to; b=c1ZmcisYoBZZrAFU83G8C/0FieLZt3yQYXmRKUvS/FrxY13D/ZnldKgLzO8+uCR97 /YdaLFBNTeeqHCZ58gcg+qxC6pjF8tAA86YQbumdoFFsiwibu04aqm88BFadVMYzqX i2dtkXNZ8R2I3xctIvnMa+K9P2s4PEINaz0+dviaN6aoNH05HEX+rAy3LrwT9ZzfEg 9nHPoRpOO/R6HWSR70LG0RYaiZEGPUgCQ4eZ+KUxww9RD9JR7g2nqP7ydP1IqdWEoz BbVNxsVjaG251N/RcmX0rhvVHFPLji75d9FNSFO1kU4BzQLvmmGogpb+yQWr78kWfb E+42aJHJrNiPg== References: <20231216182740.3305724-1-sam@rfc1149.net> User-agent: mu4e 1.10.8; emacs 29.1 From: Samuel Tardieu To: qemu-devel@nongnu.org Cc: Anton Kochkov , qemu-arm@nongnu.org, Alexandre Iooss , Alistair Francis , Peter Maydell Subject: Re: [PATCH 0/3] Add "num-prio-bits" property for Cortex-M devices Date: Sun, 17 Dec 2023 08:35:31 +0100 In-reply-to: <20231216182740.3305724-1-sam@rfc1149.net> Message-ID: <878r5tqnyu.fsf@rfc1149.net> MIME-Version: 1.0 Content-Type: text/plain; format=flowed Received-SPF: pass client-ip=195.154.227.159; envelope-from=sam@rfc1149.net; helo=zoidberg.rfc1149.net X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org > Samuel Tardieu (3): > hw/intc/armv7m_nvic: add "num-prio-bits" property > hw/arm/armv7m: alias the NVIC "num-prio-bits" property > hw/arm/socs: configure priority bits for existing SOCs Any idea to why patchew fails to apply thoses patches? The mbox at applies cleanly on master AFAICS. Sam -- Samuel Tardieu