From: "Alex Bennée" <alex.bennee@linaro.org>
To: qemu-arm@nongnu.org
Cc: laurent.desnogues@gmail.com, peter.maydell@linaro.org,
qemu-devel@nongnu.org
Subject: Re: [PATCH v6 16/20] target/arm: Rebuild hflags at EL changes
Date: Mon, 14 Oct 2019 20:01:39 +0100 [thread overview]
Message-ID: <878spnm9rg.fsf@linaro.org> (raw)
In-Reply-To: <20191011155546.14342-17-richard.henderson@linaro.org>
Richard Henderson <richard.henderson@linaro.org> writes:
> Begin setting, but not relying upon, env->hflags.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
> ---
> linux-user/syscall.c | 1 +
> target/arm/cpu.c | 1 +
> target/arm/helper-a64.c | 3 +++
> target/arm/helper.c | 2 ++
> target/arm/machine.c | 1 +
> target/arm/op_helper.c | 1 +
> 6 files changed, 9 insertions(+)
>
> diff --git a/linux-user/syscall.c b/linux-user/syscall.c
> index e2af3c1494..ebefd05140 100644
> --- a/linux-user/syscall.c
> +++ b/linux-user/syscall.c
> @@ -9982,6 +9982,7 @@ static abi_long do_syscall1(void *cpu_env, int num, abi_long arg1,
> aarch64_sve_narrow_vq(env, vq);
> }
> env->vfp.zcr_el[1] = vq - 1;
> + arm_rebuild_hflags(env);
> ret = vq * 16;
> }
> return ret;
> diff --git a/target/arm/cpu.c b/target/arm/cpu.c
> index 2399c14471..d043e75166 100644
> --- a/target/arm/cpu.c
> +++ b/target/arm/cpu.c
> @@ -406,6 +406,7 @@ static void arm_cpu_reset(CPUState *s)
>
> hw_breakpoint_update_all(cpu);
> hw_watchpoint_update_all(cpu);
> + arm_rebuild_hflags(env);
> }
>
> bool arm_cpu_exec_interrupt(CPUState *cs, int interrupt_request)
> diff --git a/target/arm/helper-a64.c b/target/arm/helper-a64.c
> index bca80bdc38..b4cd680fc4 100644
> --- a/target/arm/helper-a64.c
> +++ b/target/arm/helper-a64.c
> @@ -1025,6 +1025,7 @@ void HELPER(exception_return)(CPUARMState *env, uint64_t new_pc)
> } else {
> env->regs[15] = new_pc & ~0x3;
> }
> + helper_rebuild_hflags_a32(env, new_el);
> qemu_log_mask(CPU_LOG_INT, "Exception return from AArch64 EL%d to "
> "AArch32 EL%d PC 0x%" PRIx32 "\n",
> cur_el, new_el, env->regs[15]);
> @@ -1036,10 +1037,12 @@ void HELPER(exception_return)(CPUARMState *env, uint64_t new_pc)
> }
> aarch64_restore_sp(env, new_el);
> env->pc = new_pc;
> + helper_rebuild_hflags_a64(env, new_el);
> qemu_log_mask(CPU_LOG_INT, "Exception return from AArch64 EL%d to "
> "AArch64 EL%d PC 0x%" PRIx64 "\n",
> cur_el, new_el, env->pc);
> }
> +
> /*
> * Note that cur_el can never be 0. If new_el is 0, then
> * el0_a64 is return_to_aa64, else el0_a64 is ignored.
> diff --git a/target/arm/helper.c b/target/arm/helper.c
> index b2d701cf00..aae7b62458 100644
> --- a/target/arm/helper.c
> +++ b/target/arm/helper.c
> @@ -7998,6 +7998,7 @@ static void take_aarch32_exception(CPUARMState *env, int new_mode,
> env->regs[14] = env->regs[15] + offset;
> }
> env->regs[15] = newpc;
> + arm_rebuild_hflags(env);
> }
>
> static void arm_cpu_do_interrupt_aarch32_hyp(CPUState *cs)
> @@ -8345,6 +8346,7 @@ static void arm_cpu_do_interrupt_aarch64(CPUState *cs)
> pstate_write(env, PSTATE_DAIF | new_mode);
> env->aarch64 = 1;
> aarch64_restore_sp(env, new_el);
> + helper_rebuild_hflags_a64(env, new_el);
>
> env->pc = addr;
>
> diff --git a/target/arm/machine.c b/target/arm/machine.c
> index 5c36707a7c..eb28b2381b 100644
> --- a/target/arm/machine.c
> +++ b/target/arm/machine.c
> @@ -756,6 +756,7 @@ static int cpu_post_load(void *opaque, int version_id)
> if (!kvm_enabled()) {
> pmu_op_finish(&cpu->env);
> }
> + arm_rebuild_hflags(&cpu->env);
>
> return 0;
> }
> diff --git a/target/arm/op_helper.c b/target/arm/op_helper.c
> index 0fd4bd0238..ccc2cecb46 100644
> --- a/target/arm/op_helper.c
> +++ b/target/arm/op_helper.c
> @@ -404,6 +404,7 @@ void HELPER(cpsr_write_eret)(CPUARMState *env, uint32_t val)
> * state. Do the masking now.
> */
> env->regs[15] &= (env->thumb ? ~1 : ~3);
> + arm_rebuild_hflags(env);
>
> qemu_mutex_lock_iothread();
> arm_call_el_change_hook(env_archcpu(env));
--
Alex Bennée
next prev parent reply other threads:[~2019-10-14 19:03 UTC|newest]
Thread overview: 43+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-10-11 15:55 [PATCH v6 00/20] target/arm: Reduce overhead of cpu_get_tb_cpu_state Richard Henderson
2019-10-11 15:55 ` [PATCH v6 01/20] target/arm: Split out rebuild_hflags_common Richard Henderson
2019-10-11 15:55 ` [PATCH v6 02/20] target/arm: Split out rebuild_hflags_a64 Richard Henderson
2019-10-14 15:43 ` Alex Bennée
2019-10-11 15:55 ` [PATCH v6 03/20] target/arm: Split out rebuild_hflags_common_32 Richard Henderson
2019-10-14 15:53 ` Alex Bennée
2019-10-11 15:55 ` [PATCH v6 04/20] target/arm: Split arm_cpu_data_is_big_endian Richard Henderson
2019-10-14 16:01 ` Alex Bennée
2019-10-11 15:55 ` [PATCH v6 05/20] target/arm: Split out rebuild_hflags_m32 Richard Henderson
2019-10-14 16:13 ` Alex Bennée
2019-10-11 15:55 ` [PATCH v6 06/20] target/arm: Reduce tests vs M-profile in cpu_get_tb_cpu_state Richard Henderson
2019-10-14 16:17 ` Alex Bennée
2019-10-11 15:55 ` [PATCH v6 07/20] target/arm: Split out rebuild_hflags_a32 Richard Henderson
2019-10-14 16:17 ` Alex Bennée
2019-10-11 15:55 ` [PATCH v6 08/20] target/arm: Split out rebuild_hflags_aprofile Richard Henderson
2019-10-14 16:19 ` Alex Bennée
2019-10-11 15:55 ` [PATCH v6 09/20] target/arm: Hoist XSCALE_CPAR, VECLEN, VECSTRIDE in cpu_get_tb_cpu_state Richard Henderson
2019-10-14 16:39 ` Alex Bennée
2019-10-11 15:55 ` [PATCH v6 10/20] target/arm: Simplify set of PSTATE_SS " Richard Henderson
2019-10-14 18:21 ` Alex Bennée
2019-10-11 15:55 ` [PATCH v6 11/20] target/arm: Hoist computation of TBFLAG_A32.VFPEN Richard Henderson
2019-10-14 18:46 ` Alex Bennée
2019-10-11 15:55 ` [PATCH v6 12/20] target/arm: Add arm_rebuild_hflags Richard Henderson
2019-10-14 18:47 ` Alex Bennée
2019-10-11 15:55 ` [PATCH v6 13/20] target/arm: Split out arm_mmu_idx_el Richard Henderson
2019-10-14 18:49 ` Alex Bennée
2019-10-11 15:55 ` [PATCH v6 14/20] target/arm: Hoist store to cs_base in cpu_get_tb_cpu_state Richard Henderson
2019-10-14 18:51 ` Alex Bennée
2019-10-11 15:55 ` [PATCH v6 15/20] target/arm: Add HELPER(rebuild_hflags_{a32, a64, m32}) Richard Henderson
2019-10-14 18:59 ` Alex Bennée
2019-10-11 15:55 ` [PATCH v6 16/20] target/arm: Rebuild hflags at EL changes Richard Henderson
2019-10-14 19:01 ` Alex Bennée [this message]
2019-10-11 15:55 ` [PATCH v6 17/20] target/arm: Rebuild hflags at MSR writes Richard Henderson
2019-10-14 19:03 ` Alex Bennée
2019-10-11 15:55 ` [PATCH v6 18/20] target/arm: Rebuild hflags at CPSR writes Richard Henderson
2019-10-14 19:08 ` Alex Bennée
2019-10-14 19:15 ` Richard Henderson
2019-10-11 15:55 ` [PATCH v6 19/20] target/arm: Rebuild hflags for M-profile Richard Henderson
2019-10-14 19:08 ` Alex Bennée
2019-10-11 15:55 ` [PATCH v6 20/20] target/arm: Rely on hflags correct in cpu_get_tb_cpu_state Richard Henderson
2019-10-17 15:26 ` [PATCH v6 00/20] target/arm: Reduce overhead of cpu_get_tb_cpu_state Peter Maydell
2019-10-17 16:25 ` Richard Henderson
2019-10-17 17:01 ` Peter Maydell
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=878spnm9rg.fsf@linaro.org \
--to=alex.bennee@linaro.org \
--cc=laurent.desnogues@gmail.com \
--cc=peter.maydell@linaro.org \
--cc=qemu-arm@nongnu.org \
--cc=qemu-devel@nongnu.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).