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X-Received-From: 2a00:1450:4864:20::344 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: laurent.desnogues@gmail.com, peter.maydell@linaro.org, qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Richard Henderson writes: > Begin setting, but not relying upon, env->hflags. > > Signed-off-by: Richard Henderson Reviewed-by: Alex Benn=C3=A9e > --- > linux-user/syscall.c | 1 + > target/arm/cpu.c | 1 + > target/arm/helper-a64.c | 3 +++ > target/arm/helper.c | 2 ++ > target/arm/machine.c | 1 + > target/arm/op_helper.c | 1 + > 6 files changed, 9 insertions(+) > > diff --git a/linux-user/syscall.c b/linux-user/syscall.c > index e2af3c1494..ebefd05140 100644 > --- a/linux-user/syscall.c > +++ b/linux-user/syscall.c > @@ -9982,6 +9982,7 @@ static abi_long do_syscall1(void *cpu_env, int num,= abi_long arg1, > aarch64_sve_narrow_vq(env, vq); > } > env->vfp.zcr_el[1] =3D vq - 1; > + arm_rebuild_hflags(env); > ret =3D vq * 16; > } > return ret; > diff --git a/target/arm/cpu.c b/target/arm/cpu.c > index 2399c14471..d043e75166 100644 > --- a/target/arm/cpu.c > +++ b/target/arm/cpu.c > @@ -406,6 +406,7 @@ static void arm_cpu_reset(CPUState *s) > > hw_breakpoint_update_all(cpu); > hw_watchpoint_update_all(cpu); > + arm_rebuild_hflags(env); > } > > bool arm_cpu_exec_interrupt(CPUState *cs, int interrupt_request) > diff --git a/target/arm/helper-a64.c b/target/arm/helper-a64.c > index bca80bdc38..b4cd680fc4 100644 > --- a/target/arm/helper-a64.c > +++ b/target/arm/helper-a64.c > @@ -1025,6 +1025,7 @@ void HELPER(exception_return)(CPUARMState *env, uin= t64_t new_pc) > } else { > env->regs[15] =3D new_pc & ~0x3; > } > + helper_rebuild_hflags_a32(env, new_el); > qemu_log_mask(CPU_LOG_INT, "Exception return from AArch64 EL%d t= o " > "AArch32 EL%d PC 0x%" PRIx32 "\n", > cur_el, new_el, env->regs[15]); > @@ -1036,10 +1037,12 @@ void HELPER(exception_return)(CPUARMState *env, u= int64_t new_pc) > } > aarch64_restore_sp(env, new_el); > env->pc =3D new_pc; > + helper_rebuild_hflags_a64(env, new_el); > qemu_log_mask(CPU_LOG_INT, "Exception return from AArch64 EL%d t= o " > "AArch64 EL%d PC 0x%" PRIx64 "\n", > cur_el, new_el, env->pc); > } > + > /* > * Note that cur_el can never be 0. If new_el is 0, then > * el0_a64 is return_to_aa64, else el0_a64 is ignored. > diff --git a/target/arm/helper.c b/target/arm/helper.c > index b2d701cf00..aae7b62458 100644 > --- a/target/arm/helper.c > +++ b/target/arm/helper.c > @@ -7998,6 +7998,7 @@ static void take_aarch32_exception(CPUARMState *env= , int new_mode, > env->regs[14] =3D env->regs[15] + offset; > } > env->regs[15] =3D newpc; > + arm_rebuild_hflags(env); > } > > static void arm_cpu_do_interrupt_aarch32_hyp(CPUState *cs) > @@ -8345,6 +8346,7 @@ static void arm_cpu_do_interrupt_aarch64(CPUState *= cs) > pstate_write(env, PSTATE_DAIF | new_mode); > env->aarch64 =3D 1; > aarch64_restore_sp(env, new_el); > + helper_rebuild_hflags_a64(env, new_el); > > env->pc =3D addr; > > diff --git a/target/arm/machine.c b/target/arm/machine.c > index 5c36707a7c..eb28b2381b 100644 > --- a/target/arm/machine.c > +++ b/target/arm/machine.c > @@ -756,6 +756,7 @@ static int cpu_post_load(void *opaque, int version_id) > if (!kvm_enabled()) { > pmu_op_finish(&cpu->env); > } > + arm_rebuild_hflags(&cpu->env); > > return 0; > } > diff --git a/target/arm/op_helper.c b/target/arm/op_helper.c > index 0fd4bd0238..ccc2cecb46 100644 > --- a/target/arm/op_helper.c > +++ b/target/arm/op_helper.c > @@ -404,6 +404,7 @@ void HELPER(cpsr_write_eret)(CPUARMState *env, uint32= _t val) > * state. Do the masking now. > */ > env->regs[15] &=3D (env->thumb ? ~1 : ~3); > + arm_rebuild_hflags(env); > > qemu_mutex_lock_iothread(); > arm_call_el_change_hook(env_archcpu(env)); -- Alex Benn=C3=A9e