* [Qemu-devel] [PATCH v4 1/1] configure: Define target access alignment in configure
2019-07-31 8:20 [Qemu-devel] [PATCH v4 0/1] configure: Define target access alignment in configure tony.nguyen
@ 2019-07-31 8:22 ` tony.nguyen
2019-07-31 14:51 ` [Qemu-devel] [EXTERNAL] " Aleksandar Markovic
2019-07-31 10:00 ` [Qemu-devel] " tony.nguyen
2019-07-31 14:20 ` [Qemu-devel] [PATCH v4 0/1] " Alex Bennée
2 siblings, 1 reply; 6+ messages in thread
From: tony.nguyen @ 2019-07-31 8:22 UTC (permalink / raw)
To: qemu-devel
Cc: ehabkost, arikalo, mark.cave-ayland, jcmvbkbc, aurelien,
amarkovic, atar4qemu, rth
Rename ALIGNED_ONLY to TARGET_ALIGNED_ONLY for clarity and move
defines out of target/foo/cpu.h into configure, as we do with
TARGET_WORDS_BIGENDIAN, so that it is always defined early.
Poison TARGET_ALIGNED_ONLY to prevent use in common code.
Signed-off-by: Tony Nguyen <tony.nguyen@bt.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
configure | 10 +++++++++-
include/exec/poison.h | 1 +
include/qom/cpu.h | 2 +-
target/alpha/cpu.h | 2 --
target/hppa/cpu.h | 1 -
target/mips/cpu.h | 2 --
target/sh4/cpu.h | 2 --
target/sparc/cpu.h | 2 --
target/xtensa/cpu.h | 2 --
tcg/tcg.c | 2 +-
tcg/tcg.h | 8 +++++---
11 files changed, 17 insertions(+), 17 deletions(-)
diff --git a/configure b/configure
index 714e7fb6a1..482ba0b240 100755
--- a/configure
+++ b/configure
@@ -7431,8 +7431,13 @@ for target in $target_list; do
target_dir="$target"
config_target_mak=$target_dir/config-target.mak
target_name=$(echo $target | cut -d '-' -f 1)
+target_aligned_only="no"
+case "$target_name" in
+ alpha|hppa|mips64el|mips64|mipsel|mips|mipsn32|mipsn32el|sh4|sh4eb|sparc|sparc64|sparc32plus|xtensa|xtensaeb)
+ target_aligned_only="yes"
+ ;;
+esac
target_bigendian="no"
-
case "$target_name" in
armeb|aarch64_be|hppa|lm32|m68k|microblaze|mips|mipsn32|mips64|moxie|or1k|ppc|ppc64|ppc64abi32|s390x|sh4eb|sparc|sparc64|sparc32plus|xtensaeb)
target_bigendian=yes
@@ -7717,6 +7722,9 @@ fi
if supported_whpx_target $target; then
echo "CONFIG_WHPX=y" >> $config_target_mak
fi
+if test "$target_aligned_only" = "yes" ; then
+ echo "TARGET_ALIGNED_ONLY=y" >> $config_target_mak
+fi
if test "$target_bigendian" = "yes" ; then
echo "TARGET_WORDS_BIGENDIAN=y" >> $config_target_mak
fi
diff --git a/include/exec/poison.h b/include/exec/poison.h
index b862320fa6..955eb863ab 100644
--- a/include/exec/poison.h
+++ b/include/exec/poison.h
@@ -35,6 +35,7 @@
#pragma GCC poison TARGET_UNICORE32
#pragma GCC poison TARGET_XTENSA
+#pragma GCC poison TARGET_ALIGNED_ONLY
#pragma GCC poison TARGET_HAS_BFLT
#pragma GCC poison TARGET_NAME
#pragma GCC poison TARGET_SUPPORTS_MTTCG
diff --git a/include/qom/cpu.h b/include/qom/cpu.h
index 5ee0046b62..9b50b73339 100644
--- a/include/qom/cpu.h
+++ b/include/qom/cpu.h
@@ -89,7 +89,7 @@ struct TranslationBlock;
* @do_unassigned_access: Callback for unassigned access handling.
* (this is deprecated: new targets should use do_transaction_failed instead)
* @do_unaligned_access: Callback for unaligned access handling, if
- * the target defines #ALIGNED_ONLY.
+ * the target defines #TARGET_ALIGNED_ONLY.
* @do_transaction_failed: Callback for handling failed memory transactions
* (ie bus faults or external aborts; not MMU faults)
* @virtio_is_big_endian: Callback to return %true if a CPU which supports
diff --git a/target/alpha/cpu.h b/target/alpha/cpu.h
index b3e8a823e1..16eb8047cf 100644
--- a/target/alpha/cpu.h
+++ b/target/alpha/cpu.h
@@ -23,8 +23,6 @@
#include "cpu-qom.h"
#include "exec/cpu-defs.h"
-#define ALIGNED_ONLY
-
/* Alpha processors have a weak memory model */
#define TCG_GUEST_DEFAULT_MO (0)
diff --git a/target/hppa/cpu.h b/target/hppa/cpu.h
index aab251bc4b..2be67c289a 100644
--- a/target/hppa/cpu.h
+++ b/target/hppa/cpu.h
@@ -30,7 +30,6 @@
basis. It's probably easier to fall back to a strong memory model. */
#define TCG_GUEST_DEFAULT_MO TCG_MO_ALL
-#define ALIGNED_ONLY
#define MMU_KERNEL_IDX 0
#define MMU_USER_IDX 3
#define MMU_PHYS_IDX 4
diff --git a/target/mips/cpu.h b/target/mips/cpu.h
index 21c0615e02..c13cd4eb31 100644
--- a/target/mips/cpu.h
+++ b/target/mips/cpu.h
@@ -1,8 +1,6 @@
#ifndef MIPS_CPU_H
#define MIPS_CPU_H
-#define ALIGNED_ONLY
-
#include "cpu-qom.h"
#include "exec/cpu-defs.h"
#include "fpu/softfloat.h"
diff --git a/target/sh4/cpu.h b/target/sh4/cpu.h
index aee733eaaa..ecaa7a18a9 100644
--- a/target/sh4/cpu.h
+++ b/target/sh4/cpu.h
@@ -23,8 +23,6 @@
#include "cpu-qom.h"
#include "exec/cpu-defs.h"
-#define ALIGNED_ONLY
-
/* CPU Subtypes */
#define SH_CPU_SH7750 (1 << 0)
#define SH_CPU_SH7750S (1 << 1)
diff --git a/target/sparc/cpu.h b/target/sparc/cpu.h
index 8ed2250cd0..1406f0ba2e 100644
--- a/target/sparc/cpu.h
+++ b/target/sparc/cpu.h
@@ -5,8 +5,6 @@
#include "cpu-qom.h"
#include "exec/cpu-defs.h"
-#define ALIGNED_ONLY
-
#if !defined(TARGET_SPARC64)
#define TARGET_DPREGS 16
#else
diff --git a/target/xtensa/cpu.h b/target/xtensa/cpu.h
index 2c277134f1..0459243e6b 100644
--- a/target/xtensa/cpu.h
+++ b/target/xtensa/cpu.h
@@ -32,8 +32,6 @@
#include "exec/cpu-defs.h"
#include "xtensa-isa.h"
-#define ALIGNED_ONLY
-
/* Xtensa processors have a weak memory model */
#define TCG_GUEST_DEFAULT_MO (0)
diff --git a/tcg/tcg.c b/tcg/tcg.c
index be2c33c400..8d23fb0592 100644
--- a/tcg/tcg.c
+++ b/tcg/tcg.c
@@ -1926,7 +1926,7 @@ static const char * const ldst_name[] =
};
static const char * const alignment_name[(MO_AMASK >> MO_ASHIFT) + 1] = {
-#ifdef ALIGNED_ONLY
+#ifdef TARGET_ALIGNED_ONLY
[MO_UNALN >> MO_ASHIFT] = "un+",
[MO_ALIGN >> MO_ASHIFT] = "",
#else
diff --git a/tcg/tcg.h b/tcg/tcg.h
index b411e17a28..529acb2ed8 100644
--- a/tcg/tcg.h
+++ b/tcg/tcg.h
@@ -333,10 +333,12 @@ typedef enum TCGMemOp {
MO_TE = MO_LE,
#endif
- /* MO_UNALN accesses are never checked for alignment.
+ /*
+ * MO_UNALN accesses are never checked for alignment.
* MO_ALIGN accesses will result in a call to the CPU's
* do_unaligned_access hook if the guest address is not aligned.
- * The default depends on whether the target CPU defines ALIGNED_ONLY.
+ * The default depends on whether the target CPU defines
+ * TARGET_ALIGNED_ONLY.
*
* Some architectures (e.g. ARMv8) need the address which is aligned
* to a size more than the size of the memory access.
@@ -353,7 +355,7 @@ typedef enum TCGMemOp {
*/
MO_ASHIFT = 4,
MO_AMASK = 7 << MO_ASHIFT,
-#ifdef ALIGNED_ONLY
+#ifdef TARGET_ALIGNED_ONLY
MO_ALIGN = 0,
MO_UNALN = MO_AMASK,
#else
--
2.22.0
^ permalink raw reply related [flat|nested] 6+ messages in thread* Re: [Qemu-devel] [EXTERNAL] [PATCH v4 1/1] configure: Define target access alignment in configure
2019-07-31 8:22 ` [Qemu-devel] [PATCH v4 1/1] " tony.nguyen
@ 2019-07-31 14:51 ` Aleksandar Markovic
0 siblings, 0 replies; 6+ messages in thread
From: Aleksandar Markovic @ 2019-07-31 14:51 UTC (permalink / raw)
To: tony.nguyen@bt.com, qemu-devel@nongnu.org
Cc: ehabkost@redhat.com, Aleksandar Rikalo,
mark.cave-ayland@ilande.co.uk, jcmvbkbc@gmail.com,
atar4qemu@gmail.com, aurelien@aurel32.net, rth@twiddle.net
> From: tony.nguyen@bt.com <tony.nguyen@bt.com>
> Subject: [EXTERNAL][Qemu-devel] [PATCH v4 1/1] configure: Define target access alignment in configure
>
> Rename ALIGNED_ONLY to TARGET_ALIGNED_ONLY for clarity and move
> defines out of target/foo/cpu.h into configure, as we do with
> TARGET_WORDS_BIGENDIAN, so that it is always defined early.
>
> Poison TARGET_ALIGNED_ONLY to prevent use in common code.
>
> Signed-off-by: Tony Nguyen <tony.nguyen@bt.com>
> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
> ---
Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Advice: Try to always check and, if possible, improve commit messages
prior to submissions. This doesn't take a lot of time, but improves the
quality of one's contributions and increases overall submitter's reputation
significantly.
^ permalink raw reply [flat|nested] 6+ messages in thread
* [Qemu-devel] [PATCH v4 1/1] configure: Define target access alignment in configure
2019-07-31 8:20 [Qemu-devel] [PATCH v4 0/1] configure: Define target access alignment in configure tony.nguyen
2019-07-31 8:22 ` [Qemu-devel] [PATCH v4 1/1] " tony.nguyen
@ 2019-07-31 10:00 ` tony.nguyen
2019-07-31 14:20 ` [Qemu-devel] [PATCH v4 0/1] " Alex Bennée
2 siblings, 0 replies; 6+ messages in thread
From: tony.nguyen @ 2019-07-31 10:00 UTC (permalink / raw)
To: qemu-devel
Cc: ehabkost, arikalo, mark.cave-ayland, jcmvbkbc, aurelien,
amarkovic, atar4qemu, rth
Rename ALIGNED_ONLY to TARGET_ALIGNED_ONLY for clarity and move
defines out of target/foo/cpu.h into configure, as we do with
TARGET_WORDS_BIGENDIAN, so that it is always defined early.
Poison TARGET_ALIGNED_ONLY to prevent use in common code.
Signed-off-by: Tony Nguyen <tony.nguyen@bt.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
configure | 10 +++++++++-
include/exec/poison.h | 1 +
include/qom/cpu.h | 2 +-
target/alpha/cpu.h | 2 --
target/hppa/cpu.h | 1 -
target/mips/cpu.h | 2 --
target/sh4/cpu.h | 2 --
target/sparc/cpu.h | 2 --
target/xtensa/cpu.h | 2 --
tcg/tcg.c | 2 +-
tcg/tcg.h | 8 +++++---
11 files changed, 17 insertions(+), 17 deletions(-)
diff --git a/configure b/configure
index 714e7fb6a1..482ba0b240 100755
--- a/configure
+++ b/configure
@@ -7431,8 +7431,13 @@ for target in $target_list; do
target_dir="$target"
config_target_mak=$target_dir/config-target.mak
target_name=$(echo $target | cut -d '-' -f 1)
+target_aligned_only="no"
+case "$target_name" in
+ alpha|hppa|mips64el|mips64|mipsel|mips|mipsn32|mipsn32el|sh4|sh4eb|sparc|sparc64|sparc32plus|xtensa|xtensaeb)
+ target_aligned_only="yes"
+ ;;
+esac
target_bigendian="no"
-
case "$target_name" in
armeb|aarch64_be|hppa|lm32|m68k|microblaze|mips|mipsn32|mips64|moxie|or1k|ppc|ppc64|ppc64abi32|s390x|sh4eb|sparc|sparc64|sparc32plus|xtensaeb)
target_bigendian=yes
@@ -7717,6 +7722,9 @@ fi
if supported_whpx_target $target; then
echo "CONFIG_WHPX=y" >> $config_target_mak
fi
+if test "$target_aligned_only" = "yes" ; then
+ echo "TARGET_ALIGNED_ONLY=y" >> $config_target_mak
+fi
if test "$target_bigendian" = "yes" ; then
echo "TARGET_WORDS_BIGENDIAN=y" >> $config_target_mak
fi
diff --git a/include/exec/poison.h b/include/exec/poison.h
index b862320fa6..955eb863ab 100644
--- a/include/exec/poison.h
+++ b/include/exec/poison.h
@@ -35,6 +35,7 @@
#pragma GCC poison TARGET_UNICORE32
#pragma GCC poison TARGET_XTENSA
+#pragma GCC poison TARGET_ALIGNED_ONLY
#pragma GCC poison TARGET_HAS_BFLT
#pragma GCC poison TARGET_NAME
#pragma GCC poison TARGET_SUPPORTS_MTTCG
diff --git a/include/qom/cpu.h b/include/qom/cpu.h
index 5ee0046b62..9b50b73339 100644
--- a/include/qom/cpu.h
+++ b/include/qom/cpu.h
@@ -89,7 +89,7 @@ struct TranslationBlock;
* @do_unassigned_access: Callback for unassigned access handling.
* (this is deprecated: new targets should use do_transaction_failed instead)
* @do_unaligned_access: Callback for unaligned access handling, if
- * the target defines #ALIGNED_ONLY.
+ * the target defines #TARGET_ALIGNED_ONLY.
* @do_transaction_failed: Callback for handling failed memory transactions
* (ie bus faults or external aborts; not MMU faults)
* @virtio_is_big_endian: Callback to return %true if a CPU which supports
diff --git a/target/alpha/cpu.h b/target/alpha/cpu.h
index b3e8a823e1..16eb8047cf 100644
--- a/target/alpha/cpu.h
+++ b/target/alpha/cpu.h
@@ -23,8 +23,6 @@
#include "cpu-qom.h"
#include "exec/cpu-defs.h"
-#define ALIGNED_ONLY
-
/* Alpha processors have a weak memory model */
#define TCG_GUEST_DEFAULT_MO (0)
diff --git a/target/hppa/cpu.h b/target/hppa/cpu.h
index aab251bc4b..2be67c289a 100644
--- a/target/hppa/cpu.h
+++ b/target/hppa/cpu.h
@@ -30,7 +30,6 @@
basis. It's probably easier to fall back to a strong memory model. */
#define TCG_GUEST_DEFAULT_MO TCG_MO_ALL
-#define ALIGNED_ONLY
#define MMU_KERNEL_IDX 0
#define MMU_USER_IDX 3
#define MMU_PHYS_IDX 4
diff --git a/target/mips/cpu.h b/target/mips/cpu.h
index 21c0615e02..c13cd4eb31 100644
--- a/target/mips/cpu.h
+++ b/target/mips/cpu.h
@@ -1,8 +1,6 @@
#ifndef MIPS_CPU_H
#define MIPS_CPU_H
-#define ALIGNED_ONLY
-
#include "cpu-qom.h"
#include "exec/cpu-defs.h"
#include "fpu/softfloat.h"
diff --git a/target/sh4/cpu.h b/target/sh4/cpu.h
index aee733eaaa..ecaa7a18a9 100644
--- a/target/sh4/cpu.h
+++ b/target/sh4/cpu.h
@@ -23,8 +23,6 @@
#include "cpu-qom.h"
#include "exec/cpu-defs.h"
-#define ALIGNED_ONLY
-
/* CPU Subtypes */
#define SH_CPU_SH7750 (1 << 0)
#define SH_CPU_SH7750S (1 << 1)
diff --git a/target/sparc/cpu.h b/target/sparc/cpu.h
index 8ed2250cd0..1406f0ba2e 100644
--- a/target/sparc/cpu.h
+++ b/target/sparc/cpu.h
@@ -5,8 +5,6 @@
#include "cpu-qom.h"
#include "exec/cpu-defs.h"
-#define ALIGNED_ONLY
-
#if !defined(TARGET_SPARC64)
#define TARGET_DPREGS 16
#else
diff --git a/target/xtensa/cpu.h b/target/xtensa/cpu.h
index 2c277134f1..0459243e6b 100644
--- a/target/xtensa/cpu.h
+++ b/target/xtensa/cpu.h
@@ -32,8 +32,6 @@
#include "exec/cpu-defs.h"
#include "xtensa-isa.h"
-#define ALIGNED_ONLY
-
/* Xtensa processors have a weak memory model */
#define TCG_GUEST_DEFAULT_MO (0)
diff --git a/tcg/tcg.c b/tcg/tcg.c
index be2c33c400..8d23fb0592 100644
--- a/tcg/tcg.c
+++ b/tcg/tcg.c
@@ -1926,7 +1926,7 @@ static const char * const ldst_name[] =
};
static const char * const alignment_name[(MO_AMASK >> MO_ASHIFT) + 1] = {
-#ifdef ALIGNED_ONLY
+#ifdef TARGET_ALIGNED_ONLY
[MO_UNALN >> MO_ASHIFT] = "un+",
[MO_ALIGN >> MO_ASHIFT] = "",
#else
diff --git a/tcg/tcg.h b/tcg/tcg.h
index b411e17a28..529acb2ed8 100644
--- a/tcg/tcg.h
+++ b/tcg/tcg.h
@@ -333,10 +333,12 @@ typedef enum TCGMemOp {
MO_TE = MO_LE,
#endif
- /* MO_UNALN accesses are never checked for alignment.
+ /*
+ * MO_UNALN accesses are never checked for alignment.
* MO_ALIGN accesses will result in a call to the CPU's
* do_unaligned_access hook if the guest address is not aligned.
- * The default depends on whether the target CPU defines ALIGNED_ONLY.
+ * The default depends on whether the target CPU defines
+ * TARGET_ALIGNED_ONLY.
*
* Some architectures (e.g. ARMv8) need the address which is aligned
* to a size more than the size of the memory access.
@@ -353,7 +355,7 @@ typedef enum TCGMemOp {
*/
MO_ASHIFT = 4,
MO_AMASK = 7 << MO_ASHIFT,
-#ifdef ALIGNED_ONLY
+#ifdef TARGET_ALIGNED_ONLY
MO_ALIGN = 0,
MO_UNALN = MO_AMASK,
#else
--
2.22.0
^ permalink raw reply related [flat|nested] 6+ messages in thread* Re: [Qemu-devel] [PATCH v4 0/1] configure: Define target access alignment in configure
2019-07-31 8:20 [Qemu-devel] [PATCH v4 0/1] configure: Define target access alignment in configure tony.nguyen
2019-07-31 8:22 ` [Qemu-devel] [PATCH v4 1/1] " tony.nguyen
2019-07-31 10:00 ` [Qemu-devel] " tony.nguyen
@ 2019-07-31 14:20 ` Alex Bennée
2 siblings, 0 replies; 6+ messages in thread
From: Alex Bennée @ 2019-07-31 14:20 UTC (permalink / raw)
To: qemu-devel
Cc: ehabkost, arikalo, mark.cave-ayland, jcmvbkbc, aurelien,
amarkovic, atar4qemu, rth
tony.nguyen@bt.com writes:
> Move the define of target access alignment earlier from
> target/foo/cpu.h to configure.
>
> Suggested in Richard Henderson's reply to "[PATCH 1/4] tcg: TCGMemOp
> is now accelerator independent MemOp"
>
> Analysed target/foo/cpu.h for more candidates to define earlier but
> did not spot any other straight forward predicates.
>
> Possible future clean ups:
> - TCG_GUEST_DEFAULT_MO and TCG_TARGET_DEFAULT_MO seems like duplicates
These aren't duplicates. This is used to work out if the host memory
order is compatible with running the guest under TCG with multiple
threads (MTTCG). See check_tcg_memory_orders_compatible.
> - TARGET_INSN_START_EXTRA_WORDS 1 seems redundant as ifndef value is 1
>
> v2:
> - split cosmetic changes into separate patch
> - cc corresponding maintainers
>
> v3:
> - dropped cosmetic changes
> - improved commit message
>
> v4:
> - further improved commit message
>
> Tony Nguyen (1):
> configure: Define TARGET_ALIGNED_ONLY in configure
>
> configure | 10 +++++++++-
> include/exec/poison.h | 1 +
> include/qom/cpu.h | 2 +-
> target/alpha/cpu.h | 2 --
> target/hppa/cpu.h | 1 -
> target/mips/cpu.h | 2 --
> target/sh4/cpu.h | 2 --
> target/sparc/cpu.h | 2 --
> target/xtensa/cpu.h | 2 --
> tcg/tcg.c | 2 +-
> tcg/tcg.h | 8 +++++---
> 11 files changed, 17 insertions(+), 17 deletions(-)
--
Alex Bennée
^ permalink raw reply [flat|nested] 6+ messages in thread