From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:44991) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gTlYC-0006aj-JL for qemu-devel@nongnu.org; Mon, 03 Dec 2018 05:34:05 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gTlY7-0003Mi-0N for qemu-devel@nongnu.org; Mon, 03 Dec 2018 05:34:04 -0500 Received: from mail-wm1-x342.google.com ([2a00:1450:4864:20::342]:39534) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1gTlY4-0003IP-Bp for qemu-devel@nongnu.org; Mon, 03 Dec 2018 05:33:58 -0500 Received: by mail-wm1-x342.google.com with SMTP id f81so2665793wmd.4 for ; Mon, 03 Dec 2018 02:33:55 -0800 (PST) References: <20181130215221.20554-1-richard.henderson@linaro.org> <20181130215221.20554-7-richard.henderson@linaro.org> From: Alex =?utf-8?Q?Benn=C3=A9e?= In-reply-to: <20181130215221.20554-7-richard.henderson@linaro.org> Date: Mon, 03 Dec 2018 10:33:53 +0000 Message-ID: <878t16527i.fsf@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Subject: Re: [Qemu-devel] [PATCH v3 06/16] tcg/arm: Fold away "noaddr" branch routines List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Richard Henderson Cc: qemu-devel@nongnu.org Richard Henderson writes: > There are one use apiece for these. There is no longer a need for > preserving branch offset operands, as we no longer re-translate. > > Signed-off-by: Richard Henderson Reviewed-by: Alex Benn=C3=A9e > --- > tcg/arm/tcg-target.inc.c | 22 +++------------------- > 1 file changed, 3 insertions(+), 19 deletions(-) > > diff --git a/tcg/arm/tcg-target.inc.c b/tcg/arm/tcg-target.inc.c > index 1142eb13ad..1651f00281 100644 > --- a/tcg/arm/tcg-target.inc.c > +++ b/tcg/arm/tcg-target.inc.c > @@ -366,22 +366,6 @@ static inline void tcg_out_b(TCGContext *s, int cond= , int32_t offset) > (((offset - 8) >> 2) & 0x00ffffff)); > } > > -static inline void tcg_out_b_noaddr(TCGContext *s, int cond) > -{ > - /* We pay attention here to not modify the branch target by masking > - the corresponding bytes. This ensure that caches and memory are > - kept coherent during retranslation. */ > - tcg_out32(s, deposit32(*s->code_ptr, 24, 8, (cond << 4) | 0x0a)); > -} > - > -static inline void tcg_out_bl_noaddr(TCGContext *s, int cond) > -{ > - /* We pay attention here to not modify the branch target by masking > - the corresponding bytes. This ensure that caches and memory are > - kept coherent during retranslation. */ > - tcg_out32(s, deposit32(*s->code_ptr, 24, 8, (cond << 4) | 0x0b)); > -} > - > static inline void tcg_out_bl(TCGContext *s, int cond, int32_t offset) > { > tcg_out32(s, (cond << 28) | 0x0b000000 | > @@ -1082,7 +1066,7 @@ static inline void tcg_out_goto_label(TCGContext *s= , int cond, TCGLabel *l) > tcg_out_goto(s, cond, l->u.value_ptr); > } else { > tcg_out_reloc(s, s->code_ptr, R_ARM_PC24, l, 0); > - tcg_out_b_noaddr(s, cond); > + tcg_out_b(s, cond, 0); > } > } > > @@ -1628,7 +1612,7 @@ static void tcg_out_qemu_ld(TCGContext *s, const TC= GArg *args, bool is64) > /* This a conditional BL only to load a pointer within this opcode i= nto LR > for the slow path. We will not be using the value for a tail cal= l. */ > label_ptr =3D s->code_ptr; > - tcg_out_bl_noaddr(s, COND_NE); > + tcg_out_bl(s, COND_NE, 0); > > tcg_out_qemu_ld_index(s, opc, datalo, datahi, addrlo, addend); > > @@ -1760,7 +1744,7 @@ static void tcg_out_qemu_st(TCGContext *s, const TC= GArg *args, bool is64) > > /* The conditional call must come last, as we're going to return her= e. */ > label_ptr =3D s->code_ptr; > - tcg_out_bl_noaddr(s, COND_NE); > + tcg_out_bl(s, COND_NE, 0); > > add_qemu_ldst_label(s, false, oi, datalo, datahi, addrlo, addrhi, > s->code_ptr, label_ptr); -- Alex Benn=C3=A9e