From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:43273) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1c5rG4-0005as-0t for qemu-devel@nongnu.org; Sun, 13 Nov 2016 04:39:29 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1c5rG0-0003DC-UU for qemu-devel@nongnu.org; Sun, 13 Nov 2016 04:39:28 -0500 Received: from mail-wm0-x22c.google.com ([2a00:1450:400c:c09::22c]:35018) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1c5rG0-0003Bx-Ef for qemu-devel@nongnu.org; Sun, 13 Nov 2016 04:39:24 -0500 Received: by mail-wm0-x22c.google.com with SMTP id a197so49931906wmd.0 for ; Sun, 13 Nov 2016 01:39:23 -0800 (PST) References: <54f6f6ed-9d1e-1bce-d665-a282863c2028@twiddle.net> From: Alex =?utf-8?Q?Benn=C3=A9e?= In-reply-to: <54f6f6ed-9d1e-1bce-d665-a282863c2028@twiddle.net> Date: Sun, 13 Nov 2016 09:39:20 +0000 Message-ID: <878tsnafcn.fsf@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit Subject: Re: [Qemu-devel] target-alpha mttcg success List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Richard Henderson Cc: qemu-devel , Pranith Kumar Richard Henderson writes: >> PID USER PR NI VIRT RES S P %CPU %MEM TIME+ COMMAND >> 7817 rth 20 0 5304360 712404 R 3 94.4 9.1 2:45.21 qemu-system-alp >> 7819 rth 20 0 5304360 712404 R 1 90.7 9.1 2:01.84 qemu-system-alp >> 7818 rth 20 0 5304360 712404 R 2 90.1 9.1 2:04.52 qemu-system-alp >> 7820 rth 20 0 5304360 712404 R 0 89.4 9.1 1:49.37 qemu-system-alp >> 7811 rth 20 0 5304360 712404 S 1 9.6 9.1 0:10.76 qemu-system-alp > > Whee! During a guest make -j4 build of glibc. \o/ > > On top of Alex's latest patch set all that is required for basic success is an > update to the alpha bios. Which until today didn't support smp at all. > > There does appear to be a problem with delivery of ISA interrupts for smp, > regardless whether mttcg is enabled or not, though PCI interrupts are working > fine. This appears in that both serial console and ps2 keyboard are > non-responsive, but one can ssh into the guest. Which doesn't make a whole lot > of sense. More debugging required, I suppose. Hmm weird. I was helping Pranith with debugging one of his aarch64 guest setups under TCG and it seemed to be loosing IRQs, I could see level=1 breakpoints being hit in qemu_set_irq but no delivery of the IRQ to the CPU. Unfortunately I had to head home before we got to the bottom of it but I wonder if it is related. As far as the core code is concerned IRQ updates should be protected by the BQL. > > I'll post the palcode update once the mttcg patch set is merged. > > > r~ Good stuff ;-) -- Alex Bennée