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From: "Alex Bennée" <alex.bennee@linaro.org>
To: Shannon Zhao <zhaoshenglong@huawei.com>
Cc: peter.maydell@linaro.org, hangaohuai@huawei.com, mst@redhat.com,
	a.spyridakis@virtualopensystems.com, claudio.fontana@huawei.com,
	qemu-devel@nongnu.org, peter.huangpeng@huawei.com,
	hanjun.guo@linaro.org, imammedo@redhat.com, pbonzini@redhat.com,
	lersek@redhat.com, christoffer.dall@linaro.org,
	shannon.zhao@linaro.org
Subject: Re: [Qemu-devel] [PATCH v7 06/23] hw/arm/virt-acpi-build: Generation of DSDT table for virt devices
Date: Thu, 21 May 2015 15:30:15 +0100	[thread overview]
Message-ID: <878ucihuko.fsf@linaro.org> (raw)
In-Reply-To: <1431595182-7552-7-git-send-email-zhaoshenglong@huawei.com>


Shannon Zhao <zhaoshenglong@huawei.com> writes:

> From: Shannon Zhao <shannon.zhao@linaro.org>
>
> DSDT consists of the usual common table header plus a definition
> block in AML encoding which describes all devices in the platform.
>
> After initializing DSDT with header information the namespace is
> created which is followed by the device encodings. The devices are
> described using the Resource Template for the 32-Bit Fixed Memory
> Range and the Extended Interrupt Descriptors.
>
> Signed-off-by: Shannon Zhao <zhaoshenglong@huawei.com>
> Signed-off-by: Shannon Zhao <shannon.zhao@linaro.org>

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>

> ---
>  hw/arm/virt-acpi-build.c | 130 +++++++++++++++++++++++++++++++++++++++++++++++
>  1 file changed, 130 insertions(+)
>
> diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
> index b8a5bd8..58a2469 100644
> --- a/hw/arm/virt-acpi-build.c
> +++ b/hw/arm/virt-acpi-build.c
> @@ -40,6 +40,132 @@
>  #include "hw/hw.h"
>  #include "hw/acpi/aml-build.h"
>  
> +static void acpi_dsdt_add_cpus(Aml *scope, int smp_cpus)
> +{
> +    uint16_t i;
> +
> +    for (i = 0; i < smp_cpus; i++) {
> +        Aml *dev = aml_device("C%03x", i);
> +        aml_append(dev, aml_name_decl("_HID", aml_string("ACPI0007")));
> +        aml_append(dev, aml_name_decl("_UID", aml_int(i)));
> +        Aml *crs = aml_resource_template();
> +        aml_append(dev, aml_name_decl("_CRS", crs));
> +        aml_append(scope, dev);
> +    }
> +}
> +
> +static void acpi_dsdt_add_uart(Aml *scope, const MemMapEntry *uart_memmap,
> +                                           int uart_irq)
> +{
> +    Aml *dev = aml_device("COM0");
> +    aml_append(dev, aml_name_decl("_HID", aml_string("ARMH0011")));
> +    aml_append(dev, aml_name_decl("_UID", aml_int(0)));
> +
> +    Aml *crs = aml_resource_template();
> +    aml_append(crs, aml_memory32_fixed(uart_memmap->base,
> +                                       uart_memmap->size, aml_ReadWrite));
> +    aml_append(crs,
> +               aml_interrupt(aml_consumer, aml_level, aml_active_high,
> +               aml_exclusive, aml_not_wake_capable, uart_irq + 32));
> +    aml_append(dev, aml_name_decl("_CRS", crs));
> +    aml_append(scope, dev);
> +}
> +
> +static void acpi_dsdt_add_rtc(Aml *scope, const MemMapEntry *rtc_memmap,
> +                                          int rtc_irq)
> +{
> +    Aml *dev = aml_device("RTC0");
> +    aml_append(dev, aml_name_decl("_HID", aml_string("LNRO0013")));
> +    aml_append(dev, aml_name_decl("_UID", aml_int(0)));
> +
> +    Aml *crs = aml_resource_template();
> +    aml_append(crs, aml_memory32_fixed(rtc_memmap->base,
> +                                       rtc_memmap->size, aml_ReadWrite));
> +    aml_append(crs,
> +               aml_interrupt(aml_consumer, aml_level, aml_active_high,
> +               aml_exclusive, aml_not_wake_capable, rtc_irq + 32));
> +    aml_append(dev, aml_name_decl("_CRS", crs));
> +    aml_append(scope, dev);
> +}
> +
> +static void acpi_dsdt_add_flash(Aml *scope, const MemMapEntry *flash_memmap)
> +{
> +    Aml *dev, *crs;
> +    hwaddr base = flash_memmap->base;
> +    hwaddr size = flash_memmap->size;
> +
> +    dev = aml_device("FLS0");
> +    aml_append(dev, aml_name_decl("_HID", aml_string("LNRO0015")));
> +    aml_append(dev, aml_name_decl("_UID", aml_int(0)));
> +
> +    crs = aml_resource_template();
> +    aml_append(crs, aml_memory32_fixed(base, size, aml_ReadWrite));
> +    aml_append(dev, aml_name_decl("_CRS", crs));
> +    aml_append(scope, dev);
> +
> +    dev = aml_device("FLS1");
> +    aml_append(dev, aml_name_decl("_HID", aml_string("LNRO0015")));
> +    aml_append(dev, aml_name_decl("_UID", aml_int(1)));
> +    crs = aml_resource_template();
> +    aml_append(crs, aml_memory32_fixed(base + size, size, aml_ReadWrite));
> +    aml_append(dev, aml_name_decl("_CRS", crs));
> +    aml_append(scope, dev);
> +}
> +
> +static void acpi_dsdt_add_virtio(Aml *scope,
> +                                 const MemMapEntry *virtio_mmio_memmap,
> +                                 int mmio_irq, int num)
> +{
> +    hwaddr base = virtio_mmio_memmap->base;
> +    hwaddr size = virtio_mmio_memmap->size;
> +    int irq = mmio_irq + 32;
> +    int i;
> +
> +    for (i = 0; i < num; i++) {
> +        Aml *dev = aml_device("VR%02u", i);
> +        aml_append(dev, aml_name_decl("_HID", aml_string("LNRO0005")));
> +        aml_append(dev, aml_name_decl("_UID", aml_int(i)));
> +
> +        Aml *crs = aml_resource_template();
> +        aml_append(crs, aml_memory32_fixed(base, size, aml_ReadWrite));
> +        aml_append(crs,
> +                   aml_interrupt(aml_consumer, aml_level, aml_active_high,
> +                   aml_exclusive, aml_not_wake_capable, irq + i));
> +        aml_append(dev, aml_name_decl("_CRS", crs));
> +        aml_append(scope, dev);
> +        base += size;
> +    }
> +}
> +
> +/* DSDT */
> +static void
> +build_dsdt(GArray *table_data, GArray *linker, VirtGuestInfo *guest_info)
> +{
> +    Aml *scope, *dsdt;
> +    const MemMapEntry *memmap = guest_info->memmap;
> +    const int *irqmap = guest_info->irqmap;
> +
> +    dsdt = init_aml_allocator();
> +    /* Reserve space for header */
> +    acpi_data_push(dsdt->buf, sizeof(AcpiTableHeader));
> +
> +    scope = aml_scope("\\_SB");
> +    acpi_dsdt_add_cpus(scope, guest_info->smp_cpus);
> +    acpi_dsdt_add_uart(scope, &memmap[VIRT_UART], irqmap[VIRT_UART]);
> +    acpi_dsdt_add_rtc(scope, &memmap[VIRT_RTC], irqmap[VIRT_RTC]);
> +    acpi_dsdt_add_flash(scope, &memmap[VIRT_FLASH]);
> +    acpi_dsdt_add_virtio(scope, &memmap[VIRT_MMIO],
> +                                irqmap[VIRT_MMIO], NUM_VIRTIO_TRANSPORTS);
> +    aml_append(dsdt, scope);
> +
> +    /* copy AML table into ACPI tables blob and patch header there */
> +    g_array_append_vals(table_data, dsdt->buf->data, dsdt->buf->len);
> +    build_header(linker, table_data,
> +        (void *)(table_data->data + table_data->len - dsdt->buf->len),
> +        "DSDT", dsdt->buf->len, 5);
> +    free_aml_allocator();
> +}
> +
>  typedef
>  struct AcpiBuildState {
>      /* Copy of table in RAM (for patching). */
> @@ -55,6 +181,7 @@ static
>  void virt_acpi_build(VirtGuestInfo *guest_info, AcpiBuildTables *tables)
>  {
>      GArray *table_offsets;
> +    GArray *tables_blob = tables->table_data;
>  
>      table_offsets = g_array_new(false, true /* clear */,
>                                          sizeof(uint32_t));
> @@ -72,6 +199,9 @@ void virt_acpi_build(VirtGuestInfo *guest_info, AcpiBuildTables *tables)
>       * DSDT
>       */
>  
> +    /* DSDT is pointed to by FADT */
> +    build_dsdt(tables_blob, tables->linker, guest_info);
> +
>      /* Cleanup memory that's no longer used. */
>      g_array_free(table_offsets, true);
>  }

-- 
Alex Bennée

  reply	other threads:[~2015-05-21 14:30 UTC|newest]

Thread overview: 52+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-05-14  9:19 [Qemu-devel] [PATCH v7 00/23] Generate ACPI v5.1 tables and expose them to guest over fw_cfg on ARM Shannon Zhao
2015-05-14  9:19 ` [Qemu-devel] [PATCH v7 01/23] hw/arm/virt: Move common definitions to virt.h Shannon Zhao
2015-05-14  9:19 ` [Qemu-devel] [PATCH v7 02/23] hw/arm/virt: Record PCIe ranges in MemMapEntry array Shannon Zhao
2015-05-14  9:19 ` [Qemu-devel] [PATCH v7 03/23] hw/arm/virt-acpi-build: Basic framework for building ACPI tables on ARM Shannon Zhao
2015-05-14  9:19 ` [Qemu-devel] [PATCH v7 04/23] hw/acpi/aml-build: Add aml_memory32_fixed() term Shannon Zhao
2015-05-18 16:06   ` Michael S. Tsirkin
2015-05-14  9:19 ` [Qemu-devel] [PATCH v7 05/23] hw/acpi/aml-build: Add aml_interrupt() term Shannon Zhao
2015-05-18 16:07   ` Michael S. Tsirkin
2015-05-20  4:23   ` [Qemu-devel] [RESEND PATCH " Shannon Zhao
2015-05-20 11:05     ` Igor Mammedov
2015-05-20 11:28       ` Shannon Zhao
2015-05-20 13:49         ` Igor Mammedov
2015-05-14  9:19 ` [Qemu-devel] [PATCH v7 06/23] hw/arm/virt-acpi-build: Generation of DSDT table for virt devices Shannon Zhao
2015-05-21 14:30   ` Alex Bennée [this message]
2015-05-14  9:19 ` [Qemu-devel] [PATCH v7 07/23] hw/arm/virt-acpi-build: Generate FADT table and update ACPI headers Shannon Zhao
2015-05-14  9:19 ` [Qemu-devel] [PATCH v7 08/23] hw/arm/virt-acpi-build: Generate MADT table Shannon Zhao
2015-05-14  9:19 ` [Qemu-devel] [PATCH v7 09/23] hw/arm/virt-acpi-build: Generate GTDT table Shannon Zhao
2015-05-21 14:31   ` Alex Bennée
2015-05-14  9:19 ` [Qemu-devel] [PATCH v7 10/23] hw/arm/virt-acpi-build: Generate RSDT table Shannon Zhao
2015-05-21 14:38   ` Alex Bennée
2015-05-14  9:19 ` [Qemu-devel] [PATCH v7 11/23] hw/arm/virt-acpi-build: Generate RSDP table Shannon Zhao
2015-05-14  9:19 ` [Qemu-devel] [PATCH v7 12/23] hw/arm/virt-acpi-build: Generate MCFG table Shannon Zhao
2015-05-21 14:38   ` Alex Bennée
2015-05-14  9:19 ` [Qemu-devel] [PATCH v7 13/23] hw/acpi/aml-build: Make aml_buffer() definition consistent with the spec Shannon Zhao
2015-05-18 16:08   ` Michael S. Tsirkin
2015-05-14  9:19 ` [Qemu-devel] [PATCH v7 14/23] hw/acpi/aml-build: Add ToUUID macro Shannon Zhao
2015-05-18 16:17   ` Michael S. Tsirkin
2015-05-18 18:34     ` Laszlo Ersek
2015-05-19  0:41     ` Shannon Zhao
2015-05-19  8:37       ` Michael S. Tsirkin
2015-05-20  4:19   ` [Qemu-devel] [RESEND PATCH " Shannon Zhao
2015-05-20 10:57     ` Igor Mammedov
2015-05-20 11:02       ` Shannon Zhao
2015-05-20 13:41         ` Igor Mammedov
2015-05-20 13:46           ` Shannon Zhao
2015-05-14  9:19 ` [Qemu-devel] [PATCH v7 15/23] hw/acpi/aml-build: Add aml_or() term Shannon Zhao
2015-05-14  9:19 ` [Qemu-devel] [PATCH v7 16/23] hw/acpi/aml-build: Add aml_lnot() term Shannon Zhao
2015-05-14  9:19 ` [Qemu-devel] [PATCH v7 17/23] hw/acpi/aml-build: Add aml_else() term Shannon Zhao
2015-05-14  9:19 ` [Qemu-devel] [PATCH v7 18/23] hw/acpi/aml-build: Add aml_create_dword_field() term Shannon Zhao
2015-05-14  9:19 ` [Qemu-devel] [PATCH v7 19/23] hw/acpi/aml-build: Add aml_dword_io() term Shannon Zhao
2015-05-14  9:19 ` [Qemu-devel] [PATCH v7 20/23] hw/acpi/aml-build: Add Unicode macro Shannon Zhao
2015-05-18 16:18   ` Michael S. Tsirkin
2015-05-20  5:00   ` [Qemu-devel] [RESEND PATCH " Shannon Zhao
2015-05-20 11:01     ` Igor Mammedov
2015-05-20 11:12       ` Shannon Zhao
2015-05-20 13:47         ` Igor Mammedov
2015-05-14  9:19 ` [Qemu-devel] [PATCH v7 21/23] hw/arm/virt-acpi-build: Add PCIe controller in ACPI DSDT table Shannon Zhao
2015-05-14  9:19 ` [Qemu-devel] [PATCH v7 22/23] ACPI: split CONFIG_ACPI into 4 pieces Shannon Zhao
2015-05-18 16:19   ` Michael S. Tsirkin
2015-05-20  5:02   ` [Qemu-devel] [RESEND PATCH " Shannon Zhao
2015-05-14  9:19 ` [Qemu-devel] [PATCH v7 23/23] hw/arm/virt: Enable dynamic generation of ACPI v5.1 tables Shannon Zhao
2015-05-18 15:59 ` [Qemu-devel] [PATCH v7 00/23] Generate ACPI v5.1 tables and expose them to guest over fw_cfg on ARM Peter Maydell

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