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Fri, 05 Sep 2025 05:36:19 -0700 (PDT) Received: from draig.lan ([185.126.160.19]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-6222f293a31sm493115a12.12.2025.09.05.05.36.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 05 Sep 2025 05:36:18 -0700 (PDT) Received: from draig (localhost [IPv6:::1]) by draig.lan (Postfix) with ESMTP id 6C5925F879; Fri, 05 Sep 2025 13:36:17 +0100 (BST) From: =?utf-8?Q?Alex_Benn=C3=A9e?= To: Igor Mammedov Cc: qemu-devel , Paolo Bonzini , Peter Xu , Xin Wang Subject: Re: [PATCH v2 001/281] target/i386: Add support for save/load of exception error code In-Reply-To: <20250904140844.5b670290@fedora> (Igor Mammedov's message of "Thu, 4 Sep 2025 14:08:44 +0200") References: <20250904081128.1942269-1-alex.bennee@linaro.org> <20250904081128.1942269-2-alex.bennee@linaro.org> <20250904140844.5b670290@fedora> User-Agent: mu4e 1.12.12; emacs 30.1 Date: Fri, 05 Sep 2025 13:36:17 +0100 Message-ID: <87a539vzy6.fsf@draig.linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Received-SPF: pass client-ip=2a00:1450:4864:20::529; envelope-from=alex.bennee@linaro.org; helo=mail-ed1-x529.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, T_SPF_TEMPERROR=0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Igor Mammedov writes: (trim the CC list somewhat) > On Thu, 4 Sep 2025 09:06:35 +0100 > Alex Benn=C3=A9e wrote: > >> From: Xin Wang >>=20 >> For now, qemu save/load CPU exception info(such as exception_nr and >> has_error_code), while the exception error_code is ignored. This will >> cause the dest hypervisor reinject a vCPU exception with error_code(0), >> potentially causing a guest kernel panic. >>=20 >> For instance, if src VM stopped with an user-mode write #PF (error_code = 6), >> the dest hypervisor will reinject an #PF with error_code(0) when vCPU re= sume, >> then guest kernel panic as: >> BUG: unable to handle page fault for address: 00007f80319cb010 >> #PF: supervisor read access in user mode >> #PF: error_code(0x0000) - not-present page >> RIP: 0033:0x40115d >>=20 >> To fix it, support save/load exception error_code. > > this potentially will break migration between new/old QEMU versions > due to presence new subsection. But then according to commit message > the guest might panic (on dst) when resumed anyways. > > So patch changes how guest will fail > (panic: old =3D> old, old =3D> new > vs migration error: new =3D> old ). > > Peter, > do we care and do we need a compat knob to make existing > machine type behave old way? Igor, So this patch is already in master, it was only posted in this series because my master is never upto date with origin/master. Apologies again for the noise. > >>=20 >> Signed-off-by: Xin Wang >> Link: https://lore.kernel.org/r/20250819145834.3998-1-wangxinxin.wang@hu= awei.com >> Signed-off-by: Paolo Bonzini >> --- >> target/i386/machine.c | 19 +++++++++++++++++++ >> 1 file changed, 19 insertions(+) >>=20 >> diff --git a/target/i386/machine.c b/target/i386/machine.c >> index dd2dac1d443..45b7cea80aa 100644 >> --- a/target/i386/machine.c >> +++ b/target/i386/machine.c >> @@ -462,6 +462,24 @@ static const VMStateDescription vmstate_exception_i= nfo =3D { >> } >> }; >>=20=20 >> +static bool cpu_errcode_needed(void *opaque) >> +{ >> + X86CPU *cpu =3D opaque; >> + >> + return cpu->env.has_error_code !=3D 0; >> +} >> + >> +static const VMStateDescription vmstate_error_code =3D { >> + .name =3D "cpu/error_code", >> + .version_id =3D 1, >> + .minimum_version_id =3D 1, >> + .needed =3D cpu_errcode_needed, >> + .fields =3D (const VMStateField[]) { >> + VMSTATE_INT32(env.error_code, X86CPU), >> + VMSTATE_END_OF_LIST() >> + } >> +}; >> + >> /* Poll control MSR enabled by default */ >> static bool poll_control_msr_needed(void *opaque) >> { >> @@ -1746,6 +1764,7 @@ const VMStateDescription vmstate_x86_cpu =3D { >> }, >> .subsections =3D (const VMStateDescription * const []) { >> &vmstate_exception_info, >> + &vmstate_error_code, >> &vmstate_async_pf_msr, >> &vmstate_async_pf_int_msr, >> &vmstate_pv_eoi_msr, --=20 Alex Benn=C3=A9e Virtualisation Tech Lead @ Linaro