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From: Sven Schnelle <svens@stackframe.org>
To: Richard Henderson <richard.henderson@linaro.org>
Cc: qemu-devel@nongnu.org,  Helge Deller <deller@gmx.de>
Subject: Re: [PATCH] target/hppa: mask upper iaoq bits when returning to narrow mode
Date: Mon, 01 Apr 2024 23:31:08 +0200	[thread overview]
Message-ID: <87a5mczs6b.fsf@t14.stackframe.org> (raw)
In-Reply-To: <f7e67270-5ff1-4d93-979c-3b501d8fca98@linaro.org> (Richard Henderson's message of "Mon, 1 Apr 2024 11:21:02 -1000")

Richard Henderson <richard.henderson@linaro.org> writes:

> On 4/1/24 10:39, Sven Schnelle wrote:
>> Richard Henderson <richard.henderson@linaro.org> writes:
>>>> For unknown reasons, Java 1.5 on 64-bit HP-UX 11.11 does signed
>>>> computation of the new IAOQ value in the signal handler. In the
>>>> current code these bits are not masked when returning to narrow
>>>> mode, causing java to crash.
>>>> Signed-off-by: Sven Schnelle <svens@stackframe.org>
>> INT   3530: instruction tlb miss fault @ 0000000000000000:ffffffffc0000007 for 0000000000000000:40000000c0000004
>> INT   3531: external interrupt @ 0000000000000000:ffffffffc0000007 for 0000000000000000:40000000c0000004
>> INT   3532: instruction tlb miss fault @ 0000000000000000:ffffffffc0000007 for 0000000000000000:40000000c0000004
>> INT   3533: external interrupt @ 0000000000000000:ffffffffc0000007 for 0000000000000000:40000000c0000004
>> So the PSW indicates narrow mode, but IAOQ seems to contain all the
>> ffff... bits.
>
> I believe that the IAOQ *should* contain all of the bits.  The bits
> should only be discarded when we form the GVA -- exactly like "ldb
> 0(r2)", where r2 contains all of the offset bits.  In particular, I
> believe that "b,l .+8,r2" should copy all of those bits to r2 from
> IAOQ_Back+4 and the fact that mainline crops those bits is a bug.
>
>
>> Also interesting is that the second TLB miss (INT 3530)
>> misses the Space ID.
>
> That is a bit curious, yes.
>
>> Any thoughts? Otherwise i need to investigate and make a wrong patch
>> again :-)
>> The only patch i have on top which touches target/hppa is the space
>> id
>> hashing mask patch:
>
> Ok.  I do have an hppa 11.11 iso -- for clarity, what is your command-line?

I'm using:

./build/qemu-system-hppa -M C3700 -m 1024 -cdrom /home/svens/parisc/hpux/11.11/HP-UX 11.11 (2004-12) - TCOE - Core OS, Install and Recovery - DVD.iso -bios /home/svens/seabios-hppa/out-64/hppa-firmware64.img -nographic -hda /home/svens/parisc/hpux1111.img -boot d


The qemu i'm using is: https://github.com/svenschnelle/qemu/tree/devel

You also need a special seabios-hppa version, because a special console
driver is needed:

https://github.com/hdeller/seabios-hppa/tree/devel


      reply	other threads:[~2024-04-01 21:32 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-04-01 14:52 [PATCH] target/hppa: mask upper iaoq bits when returning to narrow mode Sven Schnelle
2024-04-01 18:43 ` Richard Henderson
2024-04-01 20:39   ` Sven Schnelle
2024-04-01 20:49     ` Sven Schnelle
2024-04-01 20:56       ` Sven Schnelle
2024-04-01 21:17         ` Richard Henderson
2024-04-01 21:21     ` Richard Henderson
2024-04-01 21:31       ` Sven Schnelle [this message]

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