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Fri, 15 Dec 2023 15:18:00 +0000 (GMT) From: =?utf-8?Q?Alex_Benn=C3=A9e?= To: Akihiko Odaki Cc: Palmer Dabbelt , Alistair Francis , Bin Meng , Weiwei Li , Daniel Henrique Barboza , Liu Zhiwei , Mikhail Tyutin , Aleksandr Anenkov , Philippe =?utf-8?Q?Mathieu-Daud=C3=A9?= , Fabiano Rosas , qemu-riscv@nongnu.org, qemu-devel@nongnu.org Subject: Re: [PATCH v7 0/4] gdbstub and TCG plugin improvements In-Reply-To: <20231213-riscv-v7-0-a760156a337f@daynix.com> (Akihiko Odaki's message of "Wed, 13 Dec 2023 14:19:28 +0900") References: <20231213-riscv-v7-0-a760156a337f@daynix.com> User-Agent: mu4e 1.11.26; emacs 29.1 Date: Fri, 15 Dec 2023 15:18:00 +0000 Message-ID: <87a5qb8pg7.fsf@draig.linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Received-SPF: pass client-ip=2a00:1450:4864:20::336; envelope-from=alex.bennee@linaro.org; helo=mail-wm1-x336.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Akihiko Odaki writes: > This series extracts fixes and refactorings that can be applied > independently from "[PATCH v9 00/23] plugins: Allow to read registers". > > The patch "target/riscv: Move MISA limits to class" was replaced with > patch "target/riscv: Move misa_mxl_max to class" since I found instances > may have different misa_ext_mask. I'm happy to take this through my tree with the register work if the remaining patches get some review from the RiscV maintainers. --=20 Alex Benn=C3=A9e Virtualisation Tech Lead @ Linaro