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auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=cohuck@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain Received-SPF: pass client-ip=216.205.24.124; envelope-from=cohuck@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -29 X-Spam_score: -3.0 X-Spam_bar: --- X-Spam_report: (-3.0 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.199, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Thomas Huth , Matthew Rosato , David Hildenbrand , Richard Henderson , Halil Pasic , Christian Borntraeger , Alex Williamson Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On Fri, Jun 11 2021, Eric Farman wrote: > On Fri, 2021-06-11 at 12:21 +0200, Cornelia Huck wrote: >> On Fri, Jun 11 2021, Cornelia Huck wrote: >> >> > On Thu, Jun 10 2021, Eric Farman wrote: >> > > diff --git a/hw/s390x/css.c b/hw/s390x/css.c >> > > index bed46f5ec3..29234daa27 100644 >> > > --- a/hw/s390x/css.c >> > > +++ b/hw/s390x/css.c >> > > @@ -1661,7 +1661,8 @@ int css_do_tsch_get_irb(SubchDev *sch, IRB >> > > *target_irb, int *irb_len) >> > > } >> > > /* If a unit check is pending, copy sense data. */ >> > > if ((schib->scsw.dstat & SCSW_DSTAT_UNIT_CHECK) && >> > > - (schib->pmcw.chars & PMCW_CHARS_MASK_CSENSE)) { >> > > + (schib->pmcw.chars & PMCW_CHARS_MASK_CSENSE) && >> > > + (sch->sense_data[0] != 0)) { >> > > int i; >> > > >> > > irb.scsw.flags |= SCSW_FLAGS_MASK_ESWF | >> > > SCSW_FLAGS_MASK_ECTL; >> >> This function is where we build the esw/ecw... >> >> > > diff --git a/hw/vfio/ccw.c b/hw/vfio/ccw.c >> > > index 139a3d9d1b..a4dc4acb34 100644 >> > > --- a/hw/vfio/ccw.c >> > > +++ b/hw/vfio/ccw.c >> > > @@ -371,12 +371,6 @@ static void >> > > vfio_ccw_io_notifier_handler(void *opaque) >> > > copy_scsw_to_guest(&s, &irb.scsw); >> > > schib->scsw = s; >> > > >> > > - /* If a uint check is pending, copy sense data. */ >> > > - if ((schib->scsw.dstat & SCSW_DSTAT_UNIT_CHECK) && >> > > - (schib->pmcw.chars & PMCW_CHARS_MASK_CSENSE)) { >> >> ...and here we actually do have the esw/ecw provided by the hardware. >> >> > If I'm reading the PoP correctly, turning on concurrent sense only >> > means >> > that we may have sense data already available, but not that it's >> > guaranteed. > > Agreed. > >> > Would it be enough to look at the relevant bit in the erw >> > and only copy sense data if it is actually set (here and/or above)? > > Do we have the hardware ERW in the css_do_tsch routine? > > Oh, but we have SCSW, and POPS says if ERW.S is set, SCSW.E is set. So > that would make this a pretty simple change then. Nod, that looks good. > >> >> Maybe the root of the problem is that we actually try to build the >> esw >> ourselves? If we copy it from the irb received by the hardware, we >> should already have the correct data, I think. > > Yeah, that's part of the problem. As you note above, the PMCW.CSENSE > bit only says if concurrent sense is possible, not that it was actually > stored in the IRB. > > I (mistakenly) thought that removing this hunk would get the whole IRB > copied over, but I see now that css_do_tsch_get_irb() only copies the > SCSW, and builds the ESW/ECW based off sch->sense_data. Might be a good idea to go over what we pass through vs. what we emulate for vfio-ccw devices, in case we have more conditions like this. We probably should not overwrite information that we can just move guestward. > >> >> > > - memcpy(sch->sense_data, irb.ecw, sizeof(irb.ecw)); >> > > - } >> > > - >> > > read_err: >> > > css_inject_io_interrupt(sch); >> > > }