From: "Alex Bennée" <alex.bennee@linaro.org>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: "MTTCG Devel" <mttcg@listserver.greensocs.com>,
"KONRAD Frédéric" <fred.konrad@greensocs.com>,
"Alvise Rigo" <a.rigo@virtualopensystems.com>,
"Sergey Fedorov" <serge.fdrv@gmail.com>,
"Emilio G. Cota" <cota@braap.org>,
"QEMU Developers" <qemu-devel@nongnu.org>,
"Mark Burton" <mark.burton@greensocs.com>,
"Paolo Bonzini" <pbonzini@redhat.com>,
"J. Kiszka" <jan.kiszka@siemens.com>,
"Richard Henderson" <rth@twiddle.net>,
"Claudio Fontana" <claudio.fontana@huawei.com>,
"Peter Crosthwaite" <crosthwaite.peter@gmail.com>
Subject: Re: [Qemu-devel] [RFC v1 12/12] cpus: default MTTCG to on for 32 bit ARM on x86
Date: Mon, 06 Jun 2016 15:28:39 +0100 [thread overview]
Message-ID: <87a8iyie7c.fsf@linaro.org> (raw)
In-Reply-To: <CAFEAcA9RdzvMFn8YiFxzYmc-=m7-nRq1U_h7qgx2bSagDwQ2iA@mail.gmail.com>
Peter Maydell <peter.maydell@linaro.org> writes:
> On 15 April 2016 at 15:23, Alex Bennée <alex.bennee@linaro.org> wrote:
>> This makes multi-threading the default for 32 bit ARM on x86. It has
>> been tested with Debian Jessie as well as my extended KVM unit tests
>> which stress the SMC and TB invalidation code. Those tests can be found
>> at:
>>
>> https://github.com/stsquad/kvm-unit-tests/tree/mttcg/current-tests-v5
>>
>> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
>> ---
>> cpus.c | 20 ++++++++++++++++----
>> 1 file changed, 16 insertions(+), 4 deletions(-)
>>
>> diff --git a/cpus.c b/cpus.c
>> index 860e2a9..daa92c7 100644
>> --- a/cpus.c
>> +++ b/cpus.c
>> @@ -171,12 +171,24 @@ opts_init(tcg_register_config);
>>
>> static bool default_mttcg_enabled(void)
>> {
>> - /*
>> - * TODO: Check if we have a chance to have MTTCG working on this guest/host.
>> - * Basically is the atomic instruction implemented? Is there any
>> - * memory ordering issue?
>> + /* Checklist for enabling MTTCG on a given frontend/backend combination
>> + *
>> + * - Are atomics correctly modelled for an MTTCG environment
>> + * - If the backend is weakly ordered
>> + * - has the front-end implemented explicit memory ordering ops
>> + * - does the back-end generate code to ensure memory ordering
>> */
>> +#if defined(__i386__) || defined(__x86_64__)
>> + /* x86 backend is strongly ordered which helps a lot */
>> + #if defined(TARGET_ARM)
>> + return true;
>> + #else
>> + return false;
>> + #endif
>> +#else
>> + /* Until memory ordering implemented things will likely break */
>> return false;
>> +#endif
>
> No new per-host ifdef ladders, please (or per-target ifdef ladders,
> either). Have some #defines for "TCG backend supports MTTCG" and
> "TCG frontend supports MTTCG" which get set in some suitable per-host
> and per-target header, and only enable if they're both set.
Will do so. I guess the middling case of backend is strongly ordered
enough to get away with partial barrier implementation at the front end
should be skipped? We'll only turn on the frontend/backend support flags
when:
* All frontends fully express the ordering constraints to the TCG
(e.g. all barriers and annotations complete)
* The backend emits enough code to ensure any ordering constraint
expressed in TCG ops can be satisfied.
Are you happy to keep the commentary here with the default function as
that is where people are likely to end up when searching?
>
> thanks
> -- PMM
--
Alex Bennée
next prev parent reply other threads:[~2016-06-06 14:28 UTC|newest]
Thread overview: 41+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-04-15 14:23 [Qemu-devel] [RFC v1 00/12] Enable MTTCG for 32 bit arm on x86 Alex Bennée
2016-04-15 14:23 ` Alex Bennée
2016-04-15 14:23 ` [Qemu-devel] [RFC v1 01/12] include: move CPU-related definitions out of qemu-common.h Alex Bennée
2016-04-15 14:23 ` [Qemu-devel] [RFC v1 02/12] tcg/i386: Make direct jump patching thread-safe Alex Bennée
2016-04-15 14:23 ` [Qemu-devel] [RFC v1 03/12] qemu-thread: add simple test-and-set spinlock Alex Bennée
2016-04-15 14:23 ` [Qemu-devel] [RFC v1 04/12] atomic: introduce atomic_dec_fetch Alex Bennée
2016-06-02 20:34 ` Sergey Fedorov
2016-04-15 14:23 ` [Qemu-devel] [RFC v1 05/12] atomic: introduce cmpxchg_bool Alex Bennée
2016-04-15 16:22 ` Richard Henderson
2016-04-15 17:06 ` Alex Bennée
2016-06-03 16:45 ` Sergey Fedorov
2016-06-03 19:12 ` Alex Bennée
2016-06-03 19:20 ` Eric Blake
2016-04-15 14:23 ` [Qemu-devel] [RFC v1 06/12] cpus: pass CPUState to run_on_cpu helpers Alex Bennée
2016-04-20 18:59 ` Eduardo Habkost
2016-04-20 19:50 ` Alex Bennée
2016-04-15 14:23 ` [Qemu-devel] [RFC v1 07/12] cpus: introduce async_safe_run_on_cpu Alex Bennée
2016-06-05 16:01 ` Sergey Fedorov
2016-06-06 8:50 ` Alex Bennée
2016-06-06 9:38 ` Sergey Fedorov
2016-06-05 16:44 ` Sergey Fedorov
2016-04-15 14:23 ` [Qemu-devel] [RFC v1 08/12] cputlb: introduce tlb_flush_* async work Alex Bennée
2016-06-05 16:39 ` Sergey Fedorov
2016-06-06 8:54 ` Alex Bennée
2016-06-06 10:04 ` Sergey Fedorov
2016-04-15 14:23 ` [Qemu-devel] [RFC v1 09/12] translate-all: introduces tb_flush_safe Alex Bennée
2016-06-05 16:48 ` Sergey Fedorov
2016-06-06 8:54 ` Alex Bennée
2016-06-06 10:06 ` Sergey Fedorov
2016-04-15 14:23 ` [Qemu-devel] [RFC v1 10/12] arm: use tlb_flush_page_all for tlbimva[a] Alex Bennée
2016-06-05 16:54 ` Sergey Fedorov
2016-06-06 8:55 ` Alex Bennée
2016-04-15 14:23 ` [Qemu-devel] [RFC v1 11/12] arm: atomically check the exclusive value in a STREX Alex Bennée
2016-04-15 14:23 ` [Qemu-devel] [RFC v1 12/12] cpus: default MTTCG to on for 32 bit ARM on x86 Alex Bennée
2016-06-05 17:12 ` Sergey Fedorov
2016-06-06 8:58 ` Alex Bennée
2016-06-06 10:19 ` Sergey Fedorov
2016-06-06 10:26 ` Peter Maydell
2016-06-06 14:28 ` Alex Bennée [this message]
2016-06-06 14:37 ` Peter Maydell
2016-04-15 19:12 ` [Qemu-devel] [RFC v1 00/12] Enable MTTCG for 32 bit arm " Alex Bennée
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