From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:49708) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aTAu5-0006Hk-0k for qemu-devel@nongnu.org; Tue, 09 Feb 2016 11:12:37 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1aTAu1-0005FA-Jr for qemu-devel@nongnu.org; Tue, 09 Feb 2016 11:12:36 -0500 Received: from mail-wm0-x231.google.com ([2a00:1450:400c:c09::231]:33333) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aTAu1-0005F1-9U for qemu-devel@nongnu.org; Tue, 09 Feb 2016 11:12:33 -0500 Received: by mail-wm0-x231.google.com with SMTP id g62so180975891wme.0 for ; Tue, 09 Feb 2016 08:12:33 -0800 (PST) References: <31e7c7dfd48ae5221f9459c16324a0bcd5660a04.1454115217.git.alistair.francis@xilinx.com> From: Alex =?utf-8?Q?Benn=C3=A9e?= In-reply-to: <31e7c7dfd48ae5221f9459c16324a0bcd5660a04.1454115217.git.alistair.francis@xilinx.com> Date: Tue, 09 Feb 2016 16:12:30 +0000 Message-ID: <87a8n9x3pt.fsf@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit Subject: Re: [Qemu-devel] [PATCH v3 07/16] register: Add block initialise helper List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Alistair Francis Cc: edgar.iglesias@xilinx.com, peter.maydell@linaro.org, qemu-devel@nongnu.org, crosthwaitepeter@gmail.com, edgar.iglesias@gmail.com, afaerber@suse.de, fred.konrad@greensocs.com Alistair Francis writes: > From: Peter Crosthwaite > > Add a helper that will scan a static RegisterAccessInfo Array > and populate a container MemoryRegion with registers as defined. > > Signed-off-by: Peter Crosthwaite > Signed-off-by: Alistair Francis > --- > V3: > - Fix typo > V2: > - Use memory_region_add_subregion_no_print() > > hw/core/register.c | 29 +++++++++++++++++++++++++++++ > include/hw/register.h | 20 ++++++++++++++++++++ > 2 files changed, 49 insertions(+) > > diff --git a/hw/core/register.c b/hw/core/register.c > index 939f398..4d7dd95 100644 > --- a/hw/core/register.c > +++ b/hw/core/register.c > @@ -258,6 +258,35 @@ uint64_t register_read_memory_le(void *opaque, hwaddr addr, unsigned size) > return register_read_memory(opaque, addr, size, false); > } > > +void register_init_block32(DeviceState *owner, const RegisterAccessInfo *rae, > + int num, RegisterInfo *ri, uint32_t *data, > + MemoryRegion *container, const MemoryRegionOps *ops, > + bool debug_enabled) Are there going to be register_init_block8, 16 and 64 variants? Perhaps this should be a generic register_block function that takes the size and skip of the registers? > +{ > + const char *debug_prefix = object_get_typename(OBJECT(owner)); > + int i; > + > + for (i = 0; i < num; i++) { > + int index = rae[i].decode.addr / 4; > + RegisterInfo *r = &ri[index]; > + > + *r = (RegisterInfo) { > + .data = &data[index], > + .data_size = sizeof(uint32_t), > + .access = &rae[i], > + .debug = debug_enabled, > + .prefix = debug_prefix, > + .opaque = owner, > + }; > + register_init(r); > + > + memory_region_init_io(&r->mem, OBJECT(owner), ops, r, r->access->name, > + sizeof(uint32_t)); > + memory_region_add_subregion_no_print(container, > + r->access->decode.addr, > &r->mem); Why a memory region for every register? Couldn't we have a shared region for the whole block and handle dispatching in the register code? > + } > +} > + > static const TypeInfo register_info = { > .name = TYPE_REGISTER, > .parent = TYPE_DEVICE, > diff --git a/include/hw/register.h b/include/hw/register.h > index 3316458..30dedbf 100644 > --- a/include/hw/register.h > +++ b/include/hw/register.h > @@ -182,6 +182,26 @@ void register_write_memory_le(void *opaque, hwaddr addr, uint64_t value, > uint64_t register_read_memory_be(void *opaque, hwaddr addr, unsigned size); > uint64_t register_read_memory_le(void *opaque, hwaddr addr, unsigned size); > > +/** > + * Init a block of consecutive registers into a container MemoryRegion. A > + * number of constant register definitions are parsed to create a corresponding > + * array of RegisterInfo's. > + * > + * @owner: device owning the registers > + * @rae: Register definitions to init > + * @num: number of registers to init (length of @rae) > + * @ri: Register array to init > + * @data: Array to use for register data > + * @container: Memory region to contain new registers > + * @ops: Memory region ops to access registers. > + * @debug enabled: turn on/off verbose debug information > + */ > + > +void register_init_block32(DeviceState *owner, const RegisterAccessInfo *rae, > + int num, RegisterInfo *ri, uint32_t *data, > + MemoryRegion *container, const MemoryRegionOps *ops, > + bool debug_enabled); > + > /* Define constants for a 32 bit register */ > #define REG32(reg, addr) \ > enum { A_ ## reg = (addr) }; \ -- Alex Bennée