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Wed, 12 Apr 2023 09:43:12 +0100 (BST) References: <20230412073510.7158-1-jasowang@redhat.com> User-agent: mu4e 1.10.0; emacs 29.0.90 From: Alex =?utf-8?Q?Benn=C3=A9e?= To: Jason Wang Cc: mst@redhat.com, peterx@redhat.com, peter.maydell@linaro.org, qemu-devel@nongnu.org Subject: Re: [PATCH V2] intel_iommu: refine iotlb hash calculation Date: Wed, 12 Apr 2023 09:41:56 +0100 In-reply-to: <20230412073510.7158-1-jasowang@redhat.com> Message-ID: <87bkjtpk2n.fsf@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Received-SPF: pass client-ip=2a00:1450:4864:20::42d; envelope-from=alex.bennee@linaro.org; helo=mail-wr1-x42d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Jason Wang writes: > Commit 1b2b12376c8 ("intel-iommu: PASID support") takes PASID into > account when calculating iotlb hash like: > > static guint vtd_iotlb_hash(gconstpointer v) > { > const struct vtd_iotlb_key *key =3D v; > > return key->gfn | ((key->sid) << VTD_IOTLB_SID_SHIFT) | > (key->level) << VTD_IOTLB_LVL_SHIFT | > (key->pasid) << VTD_IOTLB_PASID_SHIFT; > } > > This turns out to be problematic since: > > - the shift will lose bits if not converting to uint64_t > - level should be off by one in order to fit into 2 bits > - VTD_IOTLB_PASID_SHIFT is 30 but PASID is 20 bits which will waste > some bits > - the hash result is uint64_t so we will lose bits when converting to > guint > > So this patch fixes them by > > - converting the keys into uint64_t before doing the shift > - off level by one to make it fit into two bits > - change the sid, lvl and pasid shift to 26, 42 and 44 in order to > take the full width of uint64_t > - perform an XOR to the top 32bit with the bottom 32bit for the final > result to fit guint > > Fixes: Coverity CID 1508100 > Fixes: 1b2b12376c8 ("intel-iommu: PASID support") > Signed-off-by: Jason Wang > --- > Changes since V1: > - perform XOR to avoid losing bits when converting to gint > --- > hw/i386/intel_iommu.c | 9 +++++---- > hw/i386/intel_iommu_internal.h | 6 +++--- > 2 files changed, 8 insertions(+), 7 deletions(-) > > diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c > index a62896759c..94d52f4205 100644 > --- a/hw/i386/intel_iommu.c > +++ b/hw/i386/intel_iommu.c > @@ -64,8 +64,8 @@ struct vtd_as_key { > struct vtd_iotlb_key { > uint64_t gfn; > uint32_t pasid; > - uint32_t level; > uint16_t sid; > + uint8_t level; > }; >=20=20 > static void vtd_address_space_refresh_all(IntelIOMMUState *s); > @@ -221,10 +221,11 @@ static gboolean vtd_iotlb_equal(gconstpointer v1, g= constpointer v2) > static guint vtd_iotlb_hash(gconstpointer v) > { > const struct vtd_iotlb_key *key =3D v; > + uint64_t hash64 =3D key->gfn | ((uint64_t)(key->sid) << VTD_IOTLB_SI= D_SHIFT) | > + (uint64_t)(key->level - 1) << VTD_IOTLB_LVL_SHIFT | > + (uint64_t)(key->pasid) << VTD_IOTLB_PASID_SHIFT; >=20=20 > - return key->gfn | ((key->sid) << VTD_IOTLB_SID_SHIFT) | > - (key->level) << VTD_IOTLB_LVL_SHIFT | > - (key->pasid) << VTD_IOTLB_PASID_SHIFT; > + return (guint)((hash64 >> 32) ^ (hash64 & 0xffffffffU)); Have you measured the distribution this hash gives you? Otherwise consider using the qemu_xxhash() functions to return a well distributed 32 bit hash value. --=20 Alex Benn=C3=A9e Virtualisation Tech Lead @ Linaro