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Tue, 17 Jan 2023 18:10:17 +0000 (GMT) References: <20230109014248.2894281-1-richard.henderson@linaro.org> <20230109014248.2894281-13-richard.henderson@linaro.org> User-agent: mu4e 1.9.15; emacs 29.0.60 From: Alex =?utf-8?Q?Benn=C3=A9e?= To: Richard Henderson Cc: qemu-devel@nongnu.org Subject: Re: [PATCH v2 12/22] tcg: Change tb_target_set_jmp_target arguments Date: Tue, 17 Jan 2023 18:05:00 +0000 In-reply-to: <20230109014248.2894281-13-richard.henderson@linaro.org> Message-ID: <87bkmx2fsm.fsf@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Received-SPF: pass client-ip=2a00:1450:4864:20::42f; envelope-from=alex.bennee@linaro.org; helo=mail-wr1-x42f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Richard Henderson writes: > Replace 'tc_ptr' and 'addr' with 'tb' and 'n'. > > Signed-off-by: Richard Henderson > --- > tcg/aarch64/tcg-target.h | 3 ++- > tcg/arm/tcg-target.h | 3 ++- > tcg/i386/tcg-target.h | 9 ++------- > tcg/loongarch64/tcg-target.h | 3 ++- > tcg/mips/tcg-target.h | 3 ++- > tcg/ppc/tcg-target.h | 3 ++- > tcg/riscv/tcg-target.h | 3 ++- > tcg/s390x/tcg-target.h | 10 ++-------- > tcg/sparc64/tcg-target.h | 3 ++- > tcg/tci/tcg-target.h | 3 ++- > accel/tcg/cpu-exec.c | 6 +++--- > tcg/aarch64/tcg-target.c.inc | 5 +++-- > tcg/i386/tcg-target.c.inc | 9 +++++++++ > tcg/loongarch64/tcg-target.c.inc | 5 +++-- > tcg/ppc/tcg-target.c.inc | 7 ++++--- > tcg/s390x/tcg-target.c.inc | 10 ++++++++++ > tcg/sparc64/tcg-target.c.inc | 7 ++++--- > 17 files changed, 56 insertions(+), 36 deletions(-) > > diff --git a/tcg/aarch64/tcg-target.h b/tcg/aarch64/tcg-target.h > index 413a5410c5..d491c198da 100644 > --- a/tcg/aarch64/tcg-target.h > +++ b/tcg/aarch64/tcg-target.h > @@ -152,7 +152,8 @@ typedef enum { > #define TCG_TARGET_DEFAULT_MO (0) > #define TCG_TARGET_HAS_MEMORY_BSWAP 0 >=20=20 > -void tb_target_set_jmp_target(uintptr_t, uintptr_t, uintptr_t, uintptr_t= ); > +void tb_target_set_jmp_target(const TranslationBlock *, int, > + uintptr_t, uintptr_t); >=20=20 > #define TCG_TARGET_NEED_LDST_LABELS > #define TCG_TARGET_NEED_POOL_LABELS > diff --git a/tcg/arm/tcg-target.h b/tcg/arm/tcg-target.h > index b7843d2d54..4c1433093c 100644 > --- a/tcg/arm/tcg-target.h > +++ b/tcg/arm/tcg-target.h > @@ -152,7 +152,8 @@ extern bool use_neon_instructions; > #define TCG_TARGET_HAS_MEMORY_BSWAP 0 >=20=20 > /* not defined -- call should be eliminated at compile time */ > -void tb_target_set_jmp_target(uintptr_t, uintptr_t, uintptr_t, uintptr_t= ); > +void tb_target_set_jmp_target(const TranslationBlock *tb, int n, > + uintptr_t, uintptr_t); >=20=20 > #define TCG_TARGET_NEED_LDST_LABELS > #define TCG_TARGET_NEED_POOL_LABELS > diff --git a/tcg/i386/tcg-target.h b/tcg/i386/tcg-target.h > index 7edb7f1d9a..7500ceaab9 100644 > --- a/tcg/i386/tcg-target.h > +++ b/tcg/i386/tcg-target.h > @@ -220,13 +220,8 @@ extern bool have_movbe; > #define TCG_TARGET_extract_i64_valid(ofs, len) \ > (((ofs) =3D=3D 8 && (len) =3D=3D 8) || ((ofs) + (len)) =3D=3D 32) >=20=20 > -static inline void tb_target_set_jmp_target(uintptr_t tc_ptr, uintptr_t = jmp_rx, > - uintptr_t jmp_rw, uintptr_t = addr) > -{ > - /* patch the branch destination */ > - qatomic_set((int32_t *)jmp_rw, addr - (jmp_rx + 4)); > - /* no need to flush icache explicitly */ > -} > +void tb_target_set_jmp_target(const TranslationBlock *, int, > + uintptr_t, uintptr_t); >=20=20 > /* This defines the natural memory order supported by this > * architecture before guarantees made by various barrier > diff --git a/tcg/loongarch64/tcg-target.h b/tcg/loongarch64/tcg-target.h > index e5f7a1f09d..a150c3c7b2 100644 > --- a/tcg/loongarch64/tcg-target.h > +++ b/tcg/loongarch64/tcg-target.h > @@ -171,7 +171,8 @@ typedef enum { > #define TCG_TARGET_HAS_muluh_i64 1 > #define TCG_TARGET_HAS_mulsh_i64 1 >=20=20 > -void tb_target_set_jmp_target(uintptr_t, uintptr_t, uintptr_t, uintptr_t= ); > +void tb_target_set_jmp_target(const TranslationBlock *tb, int n, > + uintptr_t, uintptr_t); >=20=20 > #define TCG_TARGET_DEFAULT_MO (0) >=20=20 > diff --git a/tcg/mips/tcg-target.h b/tcg/mips/tcg-target.h > index 15721c3e42..d1adf3e326 100644 > --- a/tcg/mips/tcg-target.h > +++ b/tcg/mips/tcg-target.h > @@ -206,7 +206,8 @@ extern bool use_mips32r2_instructions; > #define TCG_TARGET_HAS_MEMORY_BSWAP 1 >=20=20 > /* not defined -- call should be eliminated at compile time */ > -void tb_target_set_jmp_target(uintptr_t, uintptr_t, uintptr_t, uintptr_t) > +void tb_target_set_jmp_target(const TranslationBlock *tb, int n, > + uintptr_t, uintptr_t) > QEMU_ERROR("code path is reachable"); >=20=20 > #define TCG_TARGET_NEED_LDST_LABELS > diff --git a/tcg/ppc/tcg-target.h b/tcg/ppc/tcg-target.h > index b5cd225cfa..02764c3331 100644 > --- a/tcg/ppc/tcg-target.h > +++ b/tcg/ppc/tcg-target.h > @@ -180,7 +180,8 @@ extern bool have_vsx; > #define TCG_TARGET_HAS_bitsel_vec have_vsx > #define TCG_TARGET_HAS_cmpsel_vec 0 >=20=20 > -void tb_target_set_jmp_target(uintptr_t, uintptr_t, uintptr_t, uintptr_t= ); > +void tb_target_set_jmp_target(const TranslationBlock *tb, int n, > + uintptr_t, uintptr_t); >=20=20 > #define TCG_TARGET_DEFAULT_MO (0) > #define TCG_TARGET_HAS_MEMORY_BSWAP 1 > diff --git a/tcg/riscv/tcg-target.h b/tcg/riscv/tcg-target.h > index 232537ccea..bce164fde2 100644 > --- a/tcg/riscv/tcg-target.h > +++ b/tcg/riscv/tcg-target.h > @@ -166,7 +166,8 @@ typedef enum { > #endif >=20=20 > /* not defined -- call should be eliminated at compile time */ > -void tb_target_set_jmp_target(uintptr_t, uintptr_t, uintptr_t, uintptr_t= ); > +void tb_target_set_jmp_target(const TranslationBlock *tb, int n, > + uintptr_t, uintptr_t); >=20=20 > #define TCG_TARGET_DEFAULT_MO (0) >=20=20 > diff --git a/tcg/s390x/tcg-target.h b/tcg/s390x/tcg-target.h > index 68dcbc6645..57ba165800 100644 > --- a/tcg/s390x/tcg-target.h > +++ b/tcg/s390x/tcg-target.h > @@ -175,14 +175,8 @@ extern uint64_t s390_facilities[3]; >=20=20 > #define TCG_TARGET_DEFAULT_MO (TCG_MO_ALL & ~TCG_MO_ST_LD) >=20=20 > -static inline void tb_target_set_jmp_target(uintptr_t tc_ptr, uintptr_t = jmp_rx, > - uintptr_t jmp_rw, uintptr_t = addr) > -{ > - /* patch the branch destination */ > - intptr_t disp =3D addr - (jmp_rx - 2); > - qatomic_set((int32_t *)jmp_rw, disp / 2); > - /* no need to flush icache explicitly */ > -} > +void tb_target_set_jmp_target(const TranslationBlock *tb, int n, > + uintptr_t jmp_rx, uintptr_t jmp_rw); >=20=20 > #define TCG_TARGET_NEED_LDST_LABELS > #define TCG_TARGET_NEED_POOL_LABELS > diff --git a/tcg/sparc64/tcg-target.h b/tcg/sparc64/tcg-target.h > index 0044ac8d78..282833bd8d 100644 > --- a/tcg/sparc64/tcg-target.h > +++ b/tcg/sparc64/tcg-target.h > @@ -155,7 +155,8 @@ extern bool use_vis3_instructions; > #define TCG_TARGET_DEFAULT_MO (0) > #define TCG_TARGET_HAS_MEMORY_BSWAP 1 >=20=20 > -void tb_target_set_jmp_target(uintptr_t, uintptr_t, uintptr_t, uintptr_t= ); > +void tb_target_set_jmp_target(const TranslationBlock *tb, int n, > + uintptr_t, uintptr_t); >=20=20 > #define TCG_TARGET_NEED_POOL_LABELS >=20=20 > diff --git a/tcg/tci/tcg-target.h b/tcg/tci/tcg-target.h > index 94ec541b4e..f9ee83d751 100644 > --- a/tcg/tci/tcg-target.h > +++ b/tcg/tci/tcg-target.h > @@ -177,6 +177,7 @@ typedef enum { > #define TCG_TARGET_HAS_MEMORY_BSWAP 1 >=20=20 > /* not defined -- call should be eliminated at compile time */ > -void tb_target_set_jmp_target(uintptr_t, uintptr_t, uintptr_t, uintptr_t= ); > +void tb_target_set_jmp_target(const TranslationBlock *tb, int n, > + uintptr_t, uintptr_t); >=20=20 > #endif /* TCG_TARGET_H */ > diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c > index a87fbf74f4..ac5b581e52 100644 > --- a/accel/tcg/cpu-exec.c > +++ b/accel/tcg/cpu-exec.c > @@ -574,11 +574,11 @@ void tb_set_jmp_target(TranslationBlock *tb, int n,= uintptr_t addr) > { > tb->jmp_target_addr[n] =3D addr; > if (TCG_TARGET_HAS_direct_jump) { > + const TranslationBlock *c_tb =3D tcg_splitwx_to_rx(tb); This may be deserving of a small comment, "address of TB purely for calculation". Otherwise: Reviewed-by: Alex Benn=C3=A9e --=20 Alex Benn=C3=A9e Virtualisation Tech Lead @ Linaro