From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:43059) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aLySA-0003jr-2v for qemu-devel@nongnu.org; Wed, 20 Jan 2016 14:30:03 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1aLyS6-0006gY-Nj for qemu-devel@nongnu.org; Wed, 20 Jan 2016 14:30:02 -0500 Received: from mail-wm0-x22e.google.com ([2a00:1450:400c:c09::22e]:34917) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aLyS6-0006gS-Da for qemu-devel@nongnu.org; Wed, 20 Jan 2016 14:29:58 -0500 Received: by mail-wm0-x22e.google.com with SMTP id r129so144640021wmr.0 for ; Wed, 20 Jan 2016 11:29:57 -0800 (PST) References: <1453297780-12514-1-git-send-email-edgar.iglesias@gmail.com> <1453297780-12514-2-git-send-email-edgar.iglesias@gmail.com> From: Alex =?utf-8?Q?Benn=C3=A9e?= In-reply-to: <1453297780-12514-2-git-send-email-edgar.iglesias@gmail.com> Date: Wed, 20 Jan 2016 19:29:54 +0000 Message-ID: <87bn8gcaml.fsf@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit Subject: Re: [Qemu-devel] [PATCH v1 1/3] target-arm: Apply S2 MMU startlevel table size check to AArch64 List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: "Edgar E. Iglesias" Cc: edgar.iglesias@xilinx.com, peter.maydell@linaro.org, qemu-arm@nongnu.org, qemu-devel@nongnu.org Edgar E. Iglesias writes: > From: "Edgar E. Iglesias" > > The S2 starting level table size check applies to both AArch32 > and AArch64. Move it to common code. > > Signed-off-by: Edgar E. Iglesias > --- > target-arm/helper.c | 16 ++++++++-------- > 1 file changed, 8 insertions(+), 8 deletions(-) > > diff --git a/target-arm/helper.c b/target-arm/helper.c > index f956b67..8aedce9 100644 > --- a/target-arm/helper.c > +++ b/target-arm/helper.c > @@ -6581,11 +6581,19 @@ typedef enum { > static bool check_s2_startlevel(ARMCPU *cpu, bool is_aa64, int level, > int inputsize, int stride) > { > + const int grainsize = stride + 3; > + int startsizecheck; > + > /* Negative levels are never allowed. */ > if (level < 0) { > return false; > } > > + startsizecheck = inputsize - ((3 - level) * stride + grainsize); > + if (startsizecheck < 1 || startsizecheck > stride + 4) { > + return false; > + } > + > if (is_aa64) { > unsigned int pamax = arm_pamax(cpu); > > @@ -6609,20 +6617,12 @@ static bool check_s2_startlevel(ARMCPU *cpu, bool is_aa64, int level, > g_assert_not_reached(); > } > } else { > - const int grainsize = stride + 3; > - int startsizecheck; > - > /* AArch32 only supports 4KB pages. Assert on that. */ > assert(stride == 9); > > if (level == 0) { > return false; > } > - > - startsizecheck = inputsize - ((3 - level) * stride + grainsize); > - if (startsizecheck < 1 || startsizecheck > stride + 4) { > - return false; > - } > } > return true; > } Reviewed-by: Alex Bennée -- Alex Bennée