From: Richard Henderson <richard.henderson@linaro.org>
To: Song Gao <gaosong@loongson.cn>, qemu-devel@nongnu.org
Cc: maobibo@loongson.cn, philmd@linaro.org
Subject: Re: [PATCH 5/5] target/loongarch/tcg: Add hardware page table walker support
Date: Mon, 29 Jul 2024 13:57:01 +1000 [thread overview]
Message-ID: <87ca1589-089a-4ebb-90dd-21780897da98@linaro.org> (raw)
In-Reply-To: <20240729013939.1807982-6-gaosong@loongson.cn>
On 7/29/24 11:39, Song Gao wrote:
> /* Mapped address */
> - return loongarch_map_address(env, physical, prot, address,
> - access_type, mmu_idx);
> + ret = loongarch_map_address(env, physical, prot, address,
> + access_type, mmu_idx);
> +#ifdef CONFIG_TCG
> + if (!FIELD_EX32(env->cpucfg[2], CPUCFG2, HPTW)) {
> + return ret;
> + }
> +
> + if (!FIELD_EX32(env->CSR_PWCH, CSR_PWCH, HPTW_EN)) {
> + return ret;
> + }
> +
> + if (do_page_walk(env, address, access_type, ret)) {
When called from loongarch_cpu_get_phys_page_debug, you do not want ...
> + index = get_random_tlb_index(env, tlbehi, ps);
> + invalidate_tlb(env, index);
> + do_fill_tlb_entry(env, vppn, entrylo0, entrylo1, index, ps);
... to modify the TLB. This will cause gdbstub to modify the behaviour of the guest,
which you do not want.
> + entry = ldq_phys(cs->as, tmp0) & TARGET_PHYS_MASK;
> +
> + if (entry == 0) {
> + return ret;
> + }
> +
> + /* Check entry, and do tlb modify. */
> + if ((tlb_error == TLBRET_INVALID) &&
> + (access_type == MMU_DATA_LOAD ||
> + access_type == MMU_INST_FETCH )) {
> + if (!(FIELD_EX64(entry, TLBENTRY, PRESENT))) {
> + break;
> + }
> + entry = FIELD_DP64(entry, TLBENTRY, V, 1);
> + } else if ((tlb_error == TLBRET_INVALID) &&
> + access_type == MMU_DATA_STORE) {
> + if (!((FIELD_EX64(entry, TLBENTRY, PRESENT) &&
> + (FIELD_EX64(entry, TLBENTRY, WRITE))))){
> + break;
> + }
> + entry = FIELD_DP64(entry, TLBENTRY, V, 1);
> + entry = FIELD_DP64(entry, TLBENTRY, D, 1);
> + } else if (tlb_error == TLBRET_DIRTY) {
> + if (!(FIELD_EX64(entry, TLBENTRY, WRITE))) {
> + break;
> + }
> + entry = FIELD_DP64(entry, TLBENTRY, D, 1);
> + entry = FIELD_DP64(entry, TLBENTRY, V, 1);
> + }
> + stq_phys(cs->as, tmp0, entry);
You certainly want to use a compare and swap here, restarting if the compare fails.
r~
next prev parent reply other threads:[~2024-07-29 3:57 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-07-29 1:39 [PATCH 0/5] LoongArch/tcg: Add hardware page table walker support Song Gao
2024-07-29 1:39 ` [PATCH 1/5] target/loongarch: Add a new cpu_type la664 Song Gao
2024-09-05 10:32 ` Philippe Mathieu-Daudé
2024-09-05 12:29 ` gaosong
2024-07-29 1:39 ` [PATCH 2/5] target/loongarch: Add do_lddir/ldpte() Song Gao
2024-07-29 1:39 ` [PATCH 3/5] target/loongarch: Add do_fill_tlb_entry() Song Gao
2024-07-29 1:39 ` [PATCH 4/5] target/loongarch: Add get_random_tlb_index() Song Gao
2024-07-29 1:39 ` [PATCH 5/5] target/loongarch/tcg: Add hardware page table walker support Song Gao
2024-07-29 3:57 ` Richard Henderson [this message]
2024-09-05 8:27 ` gaosong
2024-09-05 19:39 ` Richard Henderson
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