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Wed, 26 Jan 2022 22:20:31 +0000 (GMT) Received: from b01ledav004.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id F27C3112061; Wed, 26 Jan 2022 22:20:29 +0000 (GMT) Received: from localhost (unknown [9.211.99.130]) by b01ledav004.gho.pok.ibm.com (Postfix) with ESMTPS; Wed, 26 Jan 2022 22:20:29 +0000 (GMT) From: Fabiano Rosas To: Richard Henderson , qemu-devel@nongnu.org Subject: Re: [PATCH v2 07/14] target/ppc: 405: External exception cleanup In-Reply-To: References: <20220118184448.852996-1-farosas@linux.ibm.com> <20220118184448.852996-8-farosas@linux.ibm.com> Date: Wed, 26 Jan 2022 19:20:26 -0300 Message-ID: <87czkeqgut.fsf@linux.ibm.com> MIME-Version: 1.0 Content-Type: text/plain X-TM-AS-GCONF: 00 X-Proofpoint-GUID: j-J1HaNv_xNVhRiXGlvyK6B8xI6IPPHE X-Proofpoint-ORIG-GUID: ZKvbSUvgjdQUpb36uuZ3-164IGFsdVwA X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.816,Hydra:6.0.425,FMLib:17.11.62.513 definitions=2022-01-26_08,2022-01-26_01,2021-12-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxlogscore=999 adultscore=0 spamscore=0 clxscore=1015 bulkscore=0 priorityscore=1501 phishscore=0 suspectscore=0 impostorscore=0 mlxscore=0 malwarescore=0 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2201110000 definitions=main-2201260128 Received-SPF: pass client-ip=148.163.158.5; envelope-from=farosas@linux.ibm.com; helo=mx0a-001b2d01.pphosted.com X-Spam_score_int: -19 X-Spam_score: -2.0 X-Spam_bar: -- X-Spam_report: (-2.0 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: danielhb413@gmail.com, qemu-ppc@nongnu.org, clg@kaod.org, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Richard Henderson writes: > On 1/19/22 5:44 AM, Fabiano Rosas wrote: >> 405 has no MSR_HV and EPR is BookE only so we can remove it all. >> >> Signed-off-by: Fabiano Rosas >> Reviewed-by: David Gibson >> --- >> target/ppc/excp_helper.c | 37 ------------------------------------- >> 1 file changed, 37 deletions(-) >> >> diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c >> index e98d783ecd..8fae8aa0be 100644 >> --- a/target/ppc/excp_helper.c >> +++ b/target/ppc/excp_helper.c >> @@ -472,44 +472,7 @@ static void powerpc_excp_40x(PowerPCCPU *cpu, int excp) >> msr |= env->error_code; >> break; >> case POWERPC_EXCP_EXTERNAL: /* External input */ >> - { >> - bool lpes0; >> - >> - cs = CPU(cpu); >> - >> - /* >> - * Exception targeting modifiers >> - * >> - * LPES0 is supported on POWER7/8/9 >> - * LPES1 is not supported (old iSeries mode) >> - * >> - * On anything else, we behave as if LPES0 is 1 >> - * (externals don't alter MSR:HV) >> - */ >> -#if defined(TARGET_PPC64) >> - if (excp_model == POWERPC_EXCP_POWER7 || >> - excp_model == POWERPC_EXCP_POWER8 || >> - excp_model == POWERPC_EXCP_POWER9 || >> - excp_model == POWERPC_EXCP_POWER10) { >> - lpes0 = !!(env->spr[SPR_LPCR] & LPCR_LPES0); >> - } else >> -#endif /* defined(TARGET_PPC64) */ >> - { >> - lpes0 = true; >> - } >> - >> - if (!lpes0) { >> - new_msr |= (target_ulong)MSR_HVB; >> - new_msr |= env->msr & ((target_ulong)1 << MSR_RI); >> - srr0 = SPR_HSRR0; >> - srr1 = SPR_HSRR1; >> - } >> - if (env->mpic_proxy) { >> - /* IACK the IRQ on delivery */ >> - env->spr[SPR_BOOKE_EPR] = ldl_phys(cs->as, env->mpic_iack); >> - } >> break; >> - } > > Bare break? Should this be reachable at all? > Should it in fact be g_assert_not_reached()? It should be reachable. It is a valid exception for this CPU. We just don't have anything else to do to dispatch it aside from what is done in the generic code outside the switch statement.