From: "Alex Bennée" <alex.bennee@linaro.org>
To: Richard Henderson <richard.henderson@linaro.org>
Cc: Peter Maydell <peter.maydell@linaro.org>,
keithp@keithp.com, "open list:ARM TCG CPUs" <qemu-arm@nongnu.org>,
qemu-devel@nongnu.org
Subject: Re: [PATCH v2 5/5] tests/tcg: add user version of dumb-as-bricks semiconsole test
Date: Tue, 07 Jan 2020 14:27:19 +0000 [thread overview]
Message-ID: <87d0bv4a0o.fsf@linaro.org> (raw)
In-Reply-To: <09322c6e-74d9-08d0-1138-f2d5581a7244@linaro.org>
Richard Henderson <richard.henderson@linaro.org> writes:
> On 12/21/19 12:22 AM, Alex Bennée wrote:
>> +#if defined(__arm__)
>> + register uintptr_t t asm("r0") = type;
>> + register uintptr_t a0 asm("r1") = arg0;
>> + asm("svc 0xab"
>> + : "=r" (t)
>> + : "r" (t), "r" (a0));
>
> This is the #ifdef __thumb__ svc code. Are you enforcing that with
> command-line arguments?
No it is dealing with aarch64 vs 32 bit and the __arm__ is a compiler
symbol.
>
> Might as well fix this, then test both arm and thumb.
I've enabled for Aarch64 just like the semihosting test.
>
>
> r~
--
Alex Bennée
next prev parent reply other threads:[~2020-01-07 14:30 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-12-20 13:22 [PATCH v2 0/5] semihosting read console support Alex Bennée
2019-12-20 13:22 ` [PATCH v2 1/5] target/arm: remove unused EXCP_SEMIHOST leg Alex Bennée
2019-12-20 13:22 ` [PATCH v2 2/5] target/arm: only update pc after semihosting completes Alex Bennée
2019-12-20 13:22 ` [PATCH v2 3/5] semihosting: add qemu_semihosting_console_inc for SYS_READC Alex Bennée
2019-12-29 2:58 ` Richard Henderson
2019-12-20 13:22 ` [PATCH v2 4/5] tests/tcg: add a dumb-as-bricks semihosting console test Alex Bennée
2019-12-29 2:57 ` Richard Henderson
2019-12-20 13:22 ` [PATCH v2 5/5] tests/tcg: add user version of dumb-as-bricks semiconsole test Alex Bennée
2019-12-29 2:55 ` Richard Henderson
2020-01-07 14:27 ` Alex Bennée [this message]
2020-01-08 1:13 ` Richard Henderson
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