From: Fabiano Rosas <farosas@linux.ibm.com>
To: David Gibson <david@gibson.dropbear.id.au>
Cc: Peter Maydell <peter.maydell@linaro.org>,
Cornelia Huck <cohuck@redhat.com>,
Eduardo Habkost <ehabkost@redhat.com>,
Peter Crosthwaite <crosthwaite.peter@gmail.com>,
James Hogan <jhogan@kernel.org>,
Marcelo Tosatti <mtosatti@redhat.com>,
David Hildenbrand <david@redhat.com>,
qemu-devel@nongnu.org,
Christian Borntraeger <borntraeger@de.ibm.com>,
Aleksandar Markovic <amarkovic@wavecomp.com>,
Paolo Bonzini <pbonzini@redhat.com>,
philmd@redhat.com, Aurelien Jarno <aurelien@aurel32.net>,
Richard Henderson <rth@twiddle.net>
Subject: Re: [Qemu-devel] [RFC PATCH v2 3/3] target/ppc: support single stepping with KVM HV
Date: Mon, 10 Dec 2018 10:52:18 -0200 [thread overview]
Message-ID: <87d0q9mtml.fsf@linux.ibm.com> (raw)
In-Reply-To: <20181202091317.GM30479@umbus.fritz.box>
David Gibson <david@gibson.dropbear.id.au> writes:
>> >> + if (arch_info->address == trace_handler_addr) {
>> >> + cpu_synchronize_state(cs);
>> >> + kvm_remove_breakpoint(cs, trace_handler_addr, 4, GDB_BREAKPOINT_SW);
>> >> +
>> >> + cpu_memory_rw_debug(cs, env->spr[SPR_SRR0] - 4, (uint8_t *)&insn,
>> >> + sizeof(insn), 0);
>> >> +
>> >> + /* If the last instruction was a mfmsr, make sure that the
>> >> + * MSR_SE bit is not set to avoid the guest kernel knowing
>> >> + * that it is being single-stepped */
>> >> + if (extract32(insn, 26, 6) == 31 && extract32(insn, 1, 10) == 83) {
>> >> + reg = extract32(insn, 21, 5);
>> >> + env->gpr[reg] &= ~(1ULL << MSR_SE);
>> >> + }
>> >
>> > Hm. What happens if both qemu and the guest itself attempt to single
>> > step at the same time? How do you distinguish between the cases?
>>
>> There is currently no distinction being made.
>
> This seems incorrect to me. Basically you're restoring !MSR_SE
> unconditionaly when you finish the hypervisor side step, which might
> not be correct if the guest is also attempting to single step itself.
> AFAICT it should be possible to track what the guest thinks is the
> value of MSR_SE and restore that.
I was skeptical of being able to do both single steps at the same time
but I found a way to reproduce it by stepping over an rfid when
SRR1_SE is already 1.
> If both hypervisor and guest
> attempt to single step, I'd expect to have the hypervisor trap first,
> then return to the guest's single step vector.
With the fix you suggest above, QEMU will be able to single step the
interrupt handler during the guest's single step. That means I'll have
to restore the SRRs as well so that the handler returns to the correct
place.
>> I could do the latter, if you prefer.
>
> I think that's better - I don't think it's safe to assume that you're
> *not* synchronized with KVM.
Ok, that's better indeed.
Thanks for the comments, I'll prepare another version with the
appropriate corrections.
next prev parent reply other threads:[~2018-12-10 12:52 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-11-21 18:13 [Qemu-devel] [RFC PATCH v2 0/3] target/ppc: single step for KVM HV Fabiano Rosas
2018-11-21 18:13 ` [Qemu-devel] [RFC PATCH v2 1/3] target/ppc: Add macro definitions for relocated interrupt vectors offsets Fabiano Rosas
2018-11-22 13:22 ` David Gibson
2018-11-22 18:10 ` Fabiano Rosas
2018-11-21 18:13 ` [Qemu-devel] [RFC PATCH v2 2/3] kvm-all: Introduce kvm_set_singlestep Fabiano Rosas
2018-11-21 18:40 ` Philippe Mathieu-Daudé
2018-11-23 8:57 ` Cornelia Huck
2018-11-25 7:54 ` David Gibson
2018-11-21 18:13 ` [Qemu-devel] [RFC PATCH v2 3/3] target/ppc: support single stepping with KVM HV Fabiano Rosas
2018-11-26 7:41 ` David Gibson
2018-11-30 20:46 ` Fabiano Rosas
2018-12-02 9:13 ` David Gibson
2018-12-10 12:52 ` Fabiano Rosas [this message]
2018-12-11 1:20 ` David Gibson
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